JPH0477719A - Manufacture of active matrix type liquid crystal display device - Google Patents

Manufacture of active matrix type liquid crystal display device

Info

Publication number
JPH0477719A
JPH0477719A JP19173390A JP19173390A JPH0477719A JP H0477719 A JPH0477719 A JP H0477719A JP 19173390 A JP19173390 A JP 19173390A JP 19173390 A JP19173390 A JP 19173390A JP H0477719 A JPH0477719 A JP H0477719A
Authority
JP
Japan
Prior art keywords
ito film
mask
photoresist
etching
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19173390A
Other languages
Japanese (ja)
Inventor
Keizo Kobayashi
敬三 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP19173390A priority Critical patent/JPH0477719A/en
Publication of JPH0477719A publication Critical patent/JPH0477719A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To improve an etching selection ratio among an object to be etched, mask member and base material and to enable high-accuracy and high-yield etching by forming an ITO film on a high fusing point metal wiring layer, patterning the ITO film while masking photoresist and afterwards patterning the high fusing point metal wiring with the ITO film as a mask. CONSTITUTION:As source drain metal 7, Cr is filmed by a sputtering method, and an ITO film 10 is similarly filmed by the sputtering method. Next, wet etching is executed to the ITO film 10 with photoresist 11 as the mask. Afterwards, the source drain metal 7 is selectively etched by using chlorine dry etching gas with the ITO film 10 as the mask. Then, an ITO film 8 for display pixel electrode is stuck and the photoresist 11 is patterned. Finally, wet etching is selectively executed to the ITO film 8 for display pixel electrode with a photoresist 11 as the mask. Thus, since the etching selection ratio can be enlarged, pattern conversion can be reduced and the defect of Cr disconnection can be eliminated.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、アクティブマトリックス型液晶ディスプレイ
装置の製造方法に関し、特に金属配線に用いられる高融
点金属を精度よく高歩留りでパターニングを行うための
製造方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing an active matrix liquid crystal display device, and in particular to a method for patterning a high-melting point metal used for metal wiring with high precision and high yield. Regarding the method.

〔従来の技術〕[Conventional technology]

従来、この種の液晶ディスプレイ装置の薄膜トランジス
タ(TPT)アレイ部の製造方法は代表的な逆スタガー
ド、チャネル掘り込み型を例にとると第3図(a)〜(
f)のようになっていた。
Conventionally, the manufacturing method of the thin film transistor (TPT) array part of this type of liquid crystal display device is as shown in FIGS.
f).

すなわち、ガラス基板1上にゲート金属2を設ける(第
3図(a))。次にゲート絶縁膜3.半導体Si4エツ
チングストッパー5を設ける(第3図(b))。次にn
”Si層6を設け、フォトレジスト工程により半導体S
i4とn”Si層6をパターニングする(第3図(c)
)、次にソースドレイン金属7を設け、フォトレジスト
工程によりドライエツチングによりソース・トレイン金
属をパターニングする(第3図(d))。次に表示ビク
セル電極用ITO膜を設はパターニングする(第3図(
e))。最後にチャネルエツチング開口部9を設けて完
成していた。ここで第3図(a)及び(d)にみられる
ゲート金属2及びソース・ドレイン金属7は通常Cr、
Mo等の高融点金属が用いられる。又、ソース・トレイ
ン金属7は下地シリコンとの境界に金属シリサイドを形
成するため、この金属シリサイドをソース・トレイン金
属7と同時にエツチング除去するために、ドライエツチ
ング技術が用いられるようになった。
That is, the gate metal 2 is provided on the glass substrate 1 (FIG. 3(a)). Next, gate insulating film 3. A semiconductor Si4 etching stopper 5 is provided (FIG. 3(b)). Then n
``A Si layer 6 is provided, and a semiconductor S layer is formed by a photoresist process.
Pattern i4 and n'' Si layer 6 (Fig. 3(c))
), then a source/drain metal 7 is provided, and the source/train metal is patterned by dry etching using a photoresist process (FIG. 3(d)). Next, an ITO film for display pixel electrodes is prepared and patterned (see Fig. 3).
e)). Finally, channel etching openings 9 were provided to complete the process. Here, the gate metal 2 and source/drain metal 7 shown in FIGS. 3(a) and 3(d) are usually made of Cr,
A high melting point metal such as Mo is used. Further, since the source train metal 7 forms metal silicide at the boundary with the underlying silicon, a dry etching technique has come to be used to remove this metal silicide at the same time as the source train metal 7.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の製造方法では、Crのドライエツチング
時のマスクとなるフォトレジスト膜とのエツチング選択
比が悪く、サイドエツチングが進みパターン変換を大き
くしたり、Crの断線不良を起こしたりする欠点がある
。例えばCrの場合、CCで4+02系のエツチングガ
スでCrのエツチング速度:フォトレジスト膜のエツチ
ング速度−0,6:1である。
The conventional manufacturing method described above has the drawback that the etching selectivity with respect to the photoresist film that serves as a mask during dry etching of Cr is poor, and side etching progresses, increasing pattern conversion and causing Cr disconnection defects. . For example, in the case of Cr, the etching rate of Cr using a 4+02 series etching gas is: the etching rate of the photoresist film -0.6:1.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の製造方法は、高融点金属をパターニングするた
めに高融点金属のパターニングとそれに続(IrO2の
成膜及びリングラフィ工程によるフォトレジスト膜をマ
スクにしたIT○膜のパタニング及びこのIT○膜をマ
スクにしf、:crのパターニングよりなる。かくして
それぞれのエツチングを実施する際の被エツチング物と
マスク材及び下地材料とのエツチング選択比を高め、高
精度で高歩留りの工・ソチングを可能としている。
The manufacturing method of the present invention involves patterning a high melting point metal, followed by patterning an IT○ film using a photoresist film as a mask by forming an IrO2 film and a phosphorography process, and patterning the IT○ film. This consists of patterning f and :cr using the mask as a mask.In this way, the etching selection ratio between the object to be etched, the mask material, and the underlying material is increased during each etching process, making it possible to perform machining and sowing with high precision and high yield. There is.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の第1の実施例の製造工程を示す縦断面
図である。本実施例では、ドレンインのCrに本発明を
適用した場合を示した。第1図(a)迄は従来法の第3
図(a)〜(c)迄に全く同じに製造する。次にソース
・ドレイン金属7としてCrをスパッタ法て成膜し、I
TOMIOを同じくスパッタ法で成膜する。フォトレジ
スト膜の塗布・露光・現像工程を経てフォトレジストコ
1をパターニングするく第1図(b))。次にフォトレ
ジスト11をマスクとしてIT○膜10を硝酸と塩酸あ
るいは塩化第二鉄と塩酸との水溶液により選択的にウェ
ットエツチングする(第1図(C))。次にITO膜1
0をマスクとしてソース・ドレンイン金属7を塩素系の
ドライエツチングガスを用いて選択的にエツチングする
(第1図(d))。次に表示ビクセル電極用のITO膜
8を付着し、フォトレジスト11をパターニングする。
FIG. 1 is a longitudinal sectional view showing the manufacturing process of the first embodiment of the present invention. This example shows a case where the present invention is applied to Cr drain-in. Up to Figure 1(a), the conventional method
Figures (a) to (c) are manufactured in exactly the same manner. Next, Cr was formed as a source/drain metal 7 by sputtering, and I
TOMIO is also formed into a film by the sputtering method. The photoresist layer 1 is patterned through coating, exposure and development steps of the photoresist film (FIG. 1(b)). Next, using the photoresist 11 as a mask, the IT◯ film 10 is selectively wet-etched with an aqueous solution of nitric acid and hydrochloric acid or ferric chloride and hydrochloric acid (FIG. 1(C)). Next, ITO film 1
Using 0 as a mask, the source/drain metal 7 is selectively etched using a chlorine-based dry etching gas (FIG. 1(d)). Next, an ITO film 8 for a display pixel electrode is deposited, and a photoresist 11 is patterned.

次にフォトレジスト11をマスクにして表示ビクセル電
極用IT○膜8を選択的にウェットエツチングする(第
1図(f))、第1図(f>の構造は従来法の第3図(
e)と同じである。但しITO膜厚はCr上で厚<(I
TO膜10の膜厚+表示ピクセル電極用ITO膜8の膜
厚)表示ビクセル電極で薄く(表示ビクセル電極用IT
O8の膜厚のみ)なっている。
Next, using the photoresist 11 as a mask, the IT○ film 8 for the display pixel electrode is selectively wet-etched (FIG. 1(f)).
Same as e). However, the ITO film thickness on Cr is less than (I
thickness of TO film 10 + thickness of ITO film 8 for display pixel electrode)
Only the O8 film thickness is).

このように本実施例ではソース・ドレイン金属のCrを
工・ンチングするマスクとして丁TOを用いるので、エ
ツチング選択比を大きくできるためパターン変換は小さ
く、Crの断線不良をなくすことができる。
As described above, in this embodiment, since the TO is used as a mask for etching the Cr source/drain metal, the etching selection ratio can be increased, pattern conversion is small, and Cr disconnection defects can be eliminated.

第2図は本発明の第2の実施例の製造工程分示す縦断面
図である。第2図(d)迄は第1の実施例の第1図(d
)′迄と全く同じである。次に硝酸と塩酸あるいは塩化
第二鉄と塩酸との水溶液によりITO膜10を全面エツ
チングする(第2図(e))。次に表示ビクセル電極用
ITO膜8を成膜しフォトリソグラフィ工程によるパタ
ーニングを行うく第2図(f))。
FIG. 2 is a longitudinal sectional view showing the manufacturing process of a second embodiment of the present invention. Up to FIG. 2(d), FIG. 1(d) of the first embodiment is shown.
)' is exactly the same as before. Next, the entire surface of the ITO film 10 is etched using an aqueous solution of nitric acid and hydrochloric acid or ferric chloride and hydrochloric acid (FIG. 2(e)). Next, an ITO film 8 for display pixel electrodes is formed and patterned by a photolithography process (FIG. 2(f)).

この実施例では、Cr上としてピクセル部のITO膜厚
は同一である。従って、Crパターンの段差部で、ピク
セルIT○の成膜、パターニング時に段切れによるオー
プン不良か無いという利点がある。
In this embodiment, the ITO film thickness of the pixel portion is the same as that of the Cr film. Therefore, there is an advantage that there is no open failure due to step breakage during film formation and patterning of the pixel IT◯ at the stepped portion of the Cr pattern.

これまでの実施例では高融点金属としてクロムを用いて
説明した。しかし本発明の趣旨からすれは、ドライエツ
チングでのエツチング速度が小さい他の高融点金属(M
o、Pt等)にも適応されることは云うまでもない。
In the previous embodiments, chromium was used as the high melting point metal. However, beyond the scope of the present invention, other high melting point metals (M
Needless to say, it is also applicable to other materials (e.g., O, Pt, etc.).

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明はCrを選択的に工ツチング
する際に、CrとITOを順次成膜しフォトレジストマ
スクによりITOを選択エツチングし、次にIT○マス
クによりCrを選択的にドライエツチングする。かくし
てITOをエツチングする際のマスクのフォトレジスト
及び下地Crとの選択比10以上を得ることができる。
As explained above, in the present invention, when selectively etching Cr, Cr and ITO are sequentially formed, ITO is selectively etched using a photoresist mask, and then Cr is selectively dry etched using an IT○ mask. do. In this way, it is possible to obtain a selectivity of 10 or more between the photoresist of the mask and the underlying Cr when etching ITO.

又、同様にCrをエツチングする際のマスクのITO及
び下地ゲート絶縁膜との選択比10以上も容易に得られ
る。従って、パターン変換は小さく、Crの断線不良を
無くすることが可能となる。
Similarly, when etching Cr, a selectivity ratio of 10 or more between the ITO mask and the underlying gate insulating film can be easily obtained. Therefore, pattern conversion is small and it is possible to eliminate Cr disconnection defects.

又、本発明では表示ビクセル電極用工TOを薄く、Cr
上のITOを厚くできる。従ってピクセル部の光透過率
を高く保ち、Cr配線をCrとITOの2層配線にして
低抵抗かつ冗長性を持たせることかできる。
In addition, in the present invention, the display pixel electrode TO is made thin and made of Cr.
The upper ITO can be made thicker. Therefore, the light transmittance of the pixel portion can be kept high, and the Cr wiring can be made into a two-layer wiring of Cr and ITO to provide low resistance and redundancy.

さらにITO膜は、アクティブマトリックス型液晶ディ
スプレイ装置の表示ピクセル部の透明電極材としてきわ
めて一般的に用いられる。従って、その成膜及びエツチ
ングのために新規な装置を導入する必要がない利点があ
る。
Further, ITO films are very commonly used as transparent electrode materials in display pixel portions of active matrix liquid crystal display devices. Therefore, there is an advantage that there is no need to introduce new equipment for film formation and etching.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(f)は、本発明の第1の実施例の製造
工程を示す断面図、第2図(a)〜(f)は、本発明の
第2の実施例の製造工程を示す断面図、第3図(a)〜
(f)は、従来の製造方法の各製造工程での断面図であ
る。 1・・・カラス基板、2・・・ゲート金属、3・・・ク
ー1−絶縁膜、4・・・半導体Si、5・・エツチング
ストッパー、6・・・n”Si層、7・・・ソース・ト
レイン金属、8・・・表示ピクセル電極用ITO19・
・チャネルエツチング開口部、10・・ITO膜、1]
・・・フォトレジスト。
FIGS. 1(a) to (f) are cross-sectional views showing the manufacturing process of the first embodiment of the present invention, and FIGS. 2(a) to (f) are sectional views showing the manufacturing process of the second embodiment of the present invention. Cross-sectional view showing the process, Figure 3(a)~
(f) is a cross-sectional view at each manufacturing step of the conventional manufacturing method. DESCRIPTION OF SYMBOLS 1...Crowd substrate, 2...Gate metal, 3...Cool 1-insulating film, 4...Semiconductor Si, 5...Etching stopper, 6...n'' Si layer, 7... Source train metal, 8...ITO19 for display pixel electrodes.
・Channel etching opening, 10...ITO film, 1]
...Photoresist.

Claims (1)

【特許請求の範囲】[Claims]  アクティブマトリックス型液晶ディスプレイ装置の製
造方法において、高融点金属配線のパターニングの際に
、高融点金属配線層上に接してその上に、透明導電膜で
あるインジウムと錫の酸化膜(ITO膜)を形成し、フ
ォトレジストをマスクとしてITO膜をパターニングし
、しかる後ITO膜をマスクとして高融点金属配線のパ
ターニングを行うことを特徴とするアクティブマトリッ
クス型液晶ディスプレイ装置の製造方法。
In the method for manufacturing an active matrix liquid crystal display device, when patterning the high melting point metal wiring, an indium and tin oxide film (ITO film), which is a transparent conductive film, is placed in contact with and on top of the high melting point metal wiring layer. 1. A method for manufacturing an active matrix liquid crystal display device, comprising forming an ITO film, patterning the ITO film using a photoresist as a mask, and then patterning a high melting point metal wiring using the ITO film as a mask.
JP19173390A 1990-07-19 1990-07-19 Manufacture of active matrix type liquid crystal display device Pending JPH0477719A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19173390A JPH0477719A (en) 1990-07-19 1990-07-19 Manufacture of active matrix type liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19173390A JPH0477719A (en) 1990-07-19 1990-07-19 Manufacture of active matrix type liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH0477719A true JPH0477719A (en) 1992-03-11

Family

ID=16279591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19173390A Pending JPH0477719A (en) 1990-07-19 1990-07-19 Manufacture of active matrix type liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH0477719A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100720433B1 (en) * 2000-08-30 2007-05-22 엘지.필립스 엘시디 주식회사 Method for manufacturing liquid crystal display device
US20120138569A1 (en) * 2010-12-02 2012-06-07 Chunghwa Picture Tubes, Ltd. Fabrication method of minute pattern

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100720433B1 (en) * 2000-08-30 2007-05-22 엘지.필립스 엘시디 주식회사 Method for manufacturing liquid crystal display device
US20120138569A1 (en) * 2010-12-02 2012-06-07 Chunghwa Picture Tubes, Ltd. Fabrication method of minute pattern
US8461048B2 (en) * 2010-12-02 2013-06-11 Chunghwa Picture Tubes, Ltd. Fabrication method of minute pattern

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