JPH0473339B2 - - Google Patents

Info

Publication number
JPH0473339B2
JPH0473339B2 JP2988382A JP2988382A JPH0473339B2 JP H0473339 B2 JPH0473339 B2 JP H0473339B2 JP 2988382 A JP2988382 A JP 2988382A JP 2988382 A JP2988382 A JP 2988382A JP H0473339 B2 JPH0473339 B2 JP H0473339B2
Authority
JP
Japan
Prior art keywords
value
values
modulation
input data
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2988382A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58147266A (ja
Inventor
Shinichi Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2988382A priority Critical patent/JPS58147266A/ja
Publication of JPS58147266A publication Critical patent/JPS58147266A/ja
Publication of JPH0473339B2 publication Critical patent/JPH0473339B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
JP2988382A 1982-02-26 1982-02-26 デイジタル変調方法 Granted JPS58147266A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2988382A JPS58147266A (ja) 1982-02-26 1982-02-26 デイジタル変調方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2988382A JPS58147266A (ja) 1982-02-26 1982-02-26 デイジタル変調方法

Publications (2)

Publication Number Publication Date
JPS58147266A JPS58147266A (ja) 1983-09-02
JPH0473339B2 true JPH0473339B2 (enrdf_load_html_response) 1992-11-20

Family

ID=12288368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2988382A Granted JPS58147266A (ja) 1982-02-26 1982-02-26 デイジタル変調方法

Country Status (1)

Country Link
JP (1) JPS58147266A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0683271B2 (ja) * 1983-10-27 1994-10-19 ソニー株式会社 情報変換方式

Also Published As

Publication number Publication date
JPS58147266A (ja) 1983-09-02

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