JPH0472835A - Pulse stuffing synchronization control system - Google Patents

Abstract

PURPOSE:To simplify circuit constitution by detecting the interruption of stuffing information at a reception end at the time of the interruption of an input signal so as to control the frequency of a PLL(Phase Locked Loop) circuit in the free-running state. CONSTITUTION:An input signal interruption detection circuit 23 detects an input signal interruption state to generate a detection signal 3. A gate 31 is closed through the production of the detection signal to inhibit the transmission of stuffing information 5. Since a reception end is interrupted for the stuffing information 13, a stuffing information interruption detection circuit 32 detects the interruption to generate a clock signal whose duty is 50%. The clock signal whose duty is 50% is the free-run control input signal of a VCO(voltage controlled oscillator) of a PLL circuit of a reception end synchronization conversion circuit 29 and the PLL circuit reaches a free run frequency control state. Thus, a reception end interface conversion circuit 30 outputs a specified equipment interface signal 17 by presetting a specified clock frequency decided by the system to the output clock signal in the free-run frequency control state.

Description

[Detailed Description of the Invention] Technical Field The present invention relates to a pulse stuffing synchronous control method, and particularly to digital transmission control using the pulse stuffing synchronous control method when transmitting wireless digital information using the pulse stuffing synchronous method and receiving the same. It is related to the method.

Conventionally, in such wireless digital transmission systems, when the human input signal of the transmitting end synchronous conversion circuit is cut off, fixed stuffing information close to the stuffing rate determined by the system is sent from the transmitting end, and the receiving end A method is adopted in which PLL frequency control is performed on the side in accordance with this fixed stuffing information.

FIG. 2 is a block diagram showing a conventional pulse stuffing synchronization control system, in which (A) is a block diagram of the sending end side and (B) is a block diagram of the receiving end side. In the figure, modulation/demodulation and transmission/reception functions are omitted.

Referring to FIG. 2(A), the device interface signal 1 to be transmitted is manually inputted to the sending end interface conversion circuit 21. As shown in FIG. The sending end interface conversion circuit 21 converts the interface code format into N RZ (Non 1ie
This signal cannot be converted into a turn to zero (turn to zero) signal.

The sending end synchronous conversion circuit 22 is the sending end interface conversion circuit 2.
Synchronous conversion is performed in order to multiplex output 2 of 1 and auxiliary signals and the like. This synchronous conversion is accomplished by the well-known pulse-stuff-ink synchronization method.

The fixed stuffing information generation circuit 24 generates P L L (
P)+asa 1. ,ocked 1. , oop) performs frequency control and converts the receiving end interface conversion circuit 3 in the subsequent stage.
0 (see FIG. 2(B)), stuffing information 4 close to the stuffing rate determined by the system is generated.

The human power signal disconnection detection circuit 23 detects that the output cuff of the sending end interface conversion circuit 21 is disconnected, and generates a human power signal disconnection detection signal 3. The J changeover switch 25 selectively derives fixed stuffing information 4 or stuffing information 5 during synchronous conversion based on this input signal disconnection detection signal 3,
It is supplied as an output signal 6 to the sending end multiplex conversion circuit 26.

The sending end multiplex conversion circuit 26 has a synchronous conversion signal 9 and an auxiliary signal 7.
and a position determination frame synchronization signal 8 for multiplexing, etc., and transmit it as a multiplexed signal 10.

Referring to FIG. 2(B), on the receiving end side, this multiplexed signal]0 is transferred to the receiving end separation conversion circuit 27 and the frame synchronization circuit 28.
Receive at. The receiving end separation conversion circuit 27 converts the multiplexed signal]
0 is separated based on the control signal 14 to generate a synchronous conversion signal 11,
It outputs an auxiliary signal 12 and stuffing information (or fixed stuffing information) 13.

The frame synchronization circuit 28 establishes frame synchronization for detecting, on the receiving side, the signal position necessary for multiplex conversion on the sending end side.
It generates a control signal 14 that controls the receiving end separation conversion circuit 27.

The two receiving-end synchronous conversion circuits perform PLL frequency control using stuffing information (or fixed stuffing information) 13, smooth the synchronous conversion signal with a phase gap]1 and output (1, 5:)L, and the receiving-end interface. A clock signal 16 synchronized with the human input signal for the conversion circuit 30
This is a circuit that outputs .

The receiving end interface conversion circuit 30 converts the device interface output signal 17 using the output signals 1.5.16 from the previous stage.
This is a circuit that outputs .

In this configuration, when a disconnection of the input signal 2 to the sending end synchronous conversion circuit 22 occurs, the human input signal disconnection detection circuit 23 detects this and generates the control signal 3.

Issuance of this control signal 3 41. In response to the selector switch 25
selects the fixed stuffing information 3 from the fixed stuffing information generating circuit 24 and uses it as the output signal 6. This fixed stuffing information is multiplexed and transmitted in the sending end multiplex conversion circuit 26.

Multiplexing on the receiving end side (No. 10 is separated and processed by the receiving end fractional conversion circuit 27, and fixed stuffing information 13 is extracted. With this fixed stuffing information 13, the two receiving end synchronization conversion circuits change the PLL frequency. Control is performed to derive a specified clock 16 to a receiving end interface conversion circuit 30, and a specified equipment interface signal]7 is sent from this receiving end interface conversion circuit 30.

In the conventional dual system, if the input signal to the sending end synchronous conversion circuit is disconnected, the receiving end PLL frequency is controlled by fixed stuff ink control, so the stuff rate is close to the stuff rate determined by the system. It is necessary to generate a fixed stuffing rate, which has the disadvantage that the configuration of the fixed stuffing information generation circuit 24 becomes complicated.

OBJECTS OF THE INVENTION An object of the present invention is to provide a pulse stuffing synchronization control system with an extremely simple configuration that does not require sending out fixed stuffing information.

Structure of the Invention According to the present invention, information to be sent (, -i) is multiplexed and transmitted together with stuff ink information using a pulse stuffing synchronization method, and the receiving side performs PLL frequency control using the stuffing information to A pulse stuff ink synchronous control system for receiving information to be transmitted, comprising means for detecting a 1ui state of the information to be transmitted on the transmitting side and prohibiting transmission of the stuff ink information, The reception side is provided with means for detecting the off state of the stuff ink information and generating a free run control signal, and the free run control signal causes the PL
A pulse stuffing synchronous control system is obtained, which is characterized in that L frequency control is performed.

Example Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, (A
) is a block diagram on the sending end side, and (B) is a block diagram on the receiving end side. Note that in FIG. 1, the same parts as in FIG. 2 are indicated by the same reference numerals.

On the sending end side, the input signal disconnection detection signal = 3, which is the output of the human input signal disconnection detection circuit 23, is the output of the input signal disconnection detection circuit 23, which is the output of the input signal disconnection detection circuit 23, which is the output of the input signal disconnection detection circuit 23.
Staffing information 5 is required for other inputs.
is applied. Output 18 of this anime game 1/31
is inputted to the sending end multiplex conversion circuit 26 and multiplexed with the auxiliary signal 7 and the frame synchronization signal 8 to form a multiplexed signal 10.

On the receiving end side, a stuffing information disconnection detection circuit 32 for detecting disconnection of the stuffing information 13 is provided, and in response to detection of the stuffing information disconnection, a PLL free run control signal 19 with a duty of 50%, for example, is generated. It has become.

The other configurations are the same as the example shown in FIG. 2, and their explanation will be omitted.

In this configuration, when an input signal disconnection state occurs, the input signal disconnection detection circuit 23 detects this and generates the detection signal 3. Due to the generation of this detection signal, the gate 31
is closed, so sending stuffing information 5 is prohibited 1
1-state.

Therefore, on the receiving end side, since the stuffing information 13 is disconnected, the stuffing information disconnection detection circuit '32
detects this disconnection and generates a clock signal with a duty of 50%. This clock signal with a duty of 50% becomes the free-run control signal for the VCO (voltage controlled oscillator) of the PLL circuit of the receiving end synchronous conversion circuit 29, and therefore, this PLL circuit enters the free-run frequency control state.

The output clock signal in this free-run frequency control state is
If the clock frequency is set in advance to a specified clock frequency determined by the system, the receiving end interface conversion circuit 30 that receives this clock signal 16 can generate and output the current device interface signal]7. It is.

In addition, in normal times when human signals are present, Antogame 1-3
1 is open, so the specified stuffing information 5
is manually input to the sending end multiplex conversion circuit 26 via the gate 3]. Then, on the receiving end side, this stuffing information is separated and used as the PLL control clock 13 of the two receiving end synchronous conversion circuits, as in the conventional example.

Effects of the Invention As described above, according to the present invention, the disconnection of stuffing information when the human input signal is disconnected is detected at the receiver 5 end, and the PLL
Since the circuit operates under frequency control in a free-run state, there is no need to generate and send special fixed stuffing information on the transmitting side, which has the effect of simplifying the circuit configuration.

[Brief explanation of drawings]

FIG. 1(A) is a block diagram on the sending end side of an embodiment of the present invention;
Figure 1 (B) is the receiving end pro-tsuk diagram. Figure 2 (A)
2 is a block diagram of the transmitting end side of the conventional pulse star softening synchronous control system, and FIG. 2(B) is a block diagram of the receiving end thereof. Explanation of symbols of main parts 23...Human signal disconnection detection circuit 29...Receiving end synchronization conversion circuit 31...Ant gate

Claims (1)

[Claims] (1) The information to be transmitted is multiplexed with stuffing information using a pulse stuffing synchronization method and transmitted, and the receiving side performs PLL frequency control using the stuffing information to receive the information to be transmitted. The pulse stuffing synchronization control method is provided with a means for detecting a disconnection state of the information to be transmitted and prohibiting the transmission of the stuffing information on the transmitting side, and a means for inhibiting the transmission of the stuffing information on the receiving side. 1. A pulse stuffing synchronous control system, characterized in that means is provided for detecting a disconnection state and generating a free-run control signal, and the PLL frequency control is performed by this free-run control signal.