JPH0472121A - Interlock monitor - Google Patents

Abstract

PURPOSE:To automatically detect bad causes, by detecting the generation intervals and the terms of interlocking signals transmitted from a first unit to a second unit and comparing the intervals and the terms with the respective reference values of generation intervals and the term. CONSTITUTION:The expected min. interval Tref and the expected min. term tref of the discharge direction signals are set in a combination scale 10 and a packer 12 which are an enbodiment of the present invention. When the discharge direction signal is received. the generation of the discharge direction signal and the extinction time are stored in a RAM 40 and the difference between a prior generation time and extinguish time is obtained to get the term T1, of the discharge direction signal and further, the difference of generated time or extinction time of the discharge direction signal generated before one from the generated time or extinction time of the objective discharge direction signal is obtained. And if the interval T1 of the discharge direction signal is less than interval Tref, as it is larger than the interval of discharge direction signal, a normal alarm of signal interval is given.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides a device for monitoring whether or not the interlock signal is normal in two devices that operate in conjunction without exchanging interlock signals. Regarding.

[Prior Art] Conventionally, two devices that operate in conjunction with each other while transmitting and receiving interlock signals as described above are 1, for example, combination scales 2a and 2b as shown in FIGS. 8 and 9, and a packaging machine 4.
There are b, 4b, etc. Combination scales weigh multiple items,
The packaging machines 4a and 4b combine the measured values in various ways, select one that is equal to or close to the total weight value or the target weight value from the combinations, and discharge the articles constituting the selected combination. These discharged items are packaged in bags or the like. Combination '#42a as shown in Figure 8
is attached to the upper part of the packaging machine 4a, and supplies the discharged articles to the parent device i4a via the collection chute 6 provided in the combination 142a. Combination scale 2b as shown in Fig. 9
is installed on the side of the packaging machine 4b, and the discharged articles are packaged by a conveyor 8 installed inside the combination weigher 2b.
supplied to a.

Such combination scales 2a, 2b and parent devices 114a, 4b
Examples of interlock signals used in the above include a discharge command signal, a discharge completion signal, a combination department discharge wait signal, a combination scale operation signal, and a packaging machine operation signal. The discharge command signal is a signal transmitted from the packaging machines 4a, 4b to the combination tillers 2a, 2b. When the lever signal is received, the combination scales 2a, 2b will either select the selected article or the combination scales 2a, 2.
It is discharged from b. The discharge completion signal is sent by the combination scale 2a,
A signal transmitted from the packaging machines 2b to the packaging machines 4a and 4b is transmitted from the combination scales 2a and 2b when an article is discharged from the combination N2a and 2b in response to the discharge command signal. The combination scale discharge wait signal is sent to the combination scales 2a, 2b or the packaging machines 4a, 4.
The signal transmitted to b is transmitted when the selection of the combination weigher or combination is completed and the packaging machines 4a and 4b are waiting for a discharge command signal. Some of the packaging machines 4a and 4b transmit the above-mentioned discharge command signal upon receiving this combination scale discharge waiting signal. Combination 14 operating signal is 1 combination weigher 2
This is a signal sent from a, 2b to the packaging machines 4a, 4b when the combination weigher is in operation. The packaging machine operation signal is
From the packaging machines 4a and 4b to the combination scales 2a and 2b, the packaging machine 4
A and 4b are signals transmitted while driving. Note that not all of these interlock signals are used, and only some of them may be used depending on the model of the combination weigher or packaging machine.

[Invention or section M to be solved] Whether the combination scales 2a, 2b and the packaging machines 4a, 4b are operated in conjunction with each other using the various interlock signals described above, or whether the interlock signals are exchanged due to some reason. There are cases where the interlocking operation is not performed properly, and the interlocking operation is not performed properly. As a result, for example, empty bags or packaging machine 4a,
4b, two sets of discharged articles are packaged in one bag, articles spill from the bag due to a difference in discharge timing from the combination scales 2a and 2b, combination scale 2a due to poor transmission and reception of interlock signals, 2b or the parent device 14a4b is stopped.

If an interlock failure occurs frequently, it is relatively easy to find the cause, or it may be difficult to find the cause of an interlock failure that occurs only several times a day or once every few days. is very difficult. As a countermeasure for interlock failures that occur only rarely, such as replacing the parts that are thought to be related to the cause and checking the situation, or connecting the foot base 114 to the combinations 142a and 2h and the packaging machines 4a and 4b, 1 for operating combined materials and packaging machines
During the day, we are doing the time-consuming process of waiting for interlock failures to occur.

The present invention adds a function to detect a defective interlock signal to the device itself that performs interlock operation,
The purpose is to automatically detect the cause of defects.

[Means for Solving the Problems] In order to achieve the above object, the first invention provides first and second devices that mutually transmit and receive interlock signals to operate in conjunction with each other; means for detecting the generation interval and duration of the interlock signal transmitted to the second device; and a first means for comparing the detected generation interval of the interlock signal with a generation interval reference value and outputting the comparison result. The apparatus includes a comparison means and a second comparison means for comparing the period of the detected interlock signal with a period reference value and outputting a comparison result.

The second invention operates in response to a first device and a first interlock signal transmitted from the first device, and transmits a second interlock signal to the first device in this operating state. a second device for counting the number of occurrences of the first interlock signal; a second counting means for counting the number of occurrences of the second interlock signal; and means for determining whether the difference between the count values is within a set value and outputting the determination result.

A third invention provides first and second devices that mutually exchange interlock signals and operate in conjunction with each other, a means provided in the first device for generating the interlock signal, and a means for generating the interlock signal from the generating means. an output circuit for receiving the interlock signal and outputting it to the second device; an input circuit provided in the first device and connected to the output circuit to receive the interlock signal; and an input circuit connected to the input circuit and outputting the interlock signal to the second device; and means for determining whether or not the interlock signal can be received from the input circuit while the interlock signal is being supplied to the output circuit, and outputting a 1 determination result.

[Operation] According to the first invention, the interlock signal generation interval and its generation period are detected, and each interval reference value and one period reference value are compared. The interlock signal generation interval and the generation interval are predefined, and the allowable limits thereof are also predefined.

Therefore, by comparing the interval and period of the actually generated interlock signal with the respective reference values, it is possible to determine whether or not the interlock signal is generated normally.

According to the second invention, when the first device sends the interlock signal to the second device, the second device sends the second interlock signal to the first device. Therefore, the difference in the number of occurrences of both interlock signals is a constant value as long as both interlocks are normal (this value differs depending on how the timing for taking the difference is set). It can be determined whether both interlock signals are normal or not by comparing them.

According to the third invention, the interlock signal of the first device is output from the output circuit to the second device. At this time, the interlock signal is supplied from the output circuit to the determining means via the input circuit. If the output circuit is working properly,
The determining means can detect the interlock signal from the input circuit, or if the output circuit is defective, the determining means cannot detect the interlock signal. Therefore, the quality of the output circuit, etc. can be determined depending on whether or not the interlock signal can be detected.

[Embodiment] FIG. 6 is a block diagram of an embodiment in which the present invention is implemented in a combination weigher lO and a packaging machine 12, and the combination weigher 10 is a CPU
14, this CPU 14 is supplied with weighing signals of articles weighed from a plurality of weighing machines (not shown), and it combines these weighing signals in various ways and calculates the total weight from among these combinations. performs a combination calculation to select a combination that is equal to or close to the target weight value, performs discharge control to discharge the articles constituting the selected combination from the weighing machine, and performs supply control to supply the discharged articles to the weighing machine. Then, the combination calculation, discharge control, and supply control are repeated.

The CPU 14 performs such operations according to the block diagram stored in the PROM]6. When performing such control, especially discharge control, it is necessary to establish an interlock with the packaging machine I2, and the interlock signal sent from the combination section 10 is supplied from the output circuit 18 to the input circuit 20 of the packaging machine 12. An interlock signal originating from the packaging machine 12 is supplied from an output circuit 22 of the packaging machine 12 to an input circuit 24 of the combination machine 10. It should be noted that the packaging machine 12 side is also provided with equipment such as a CPU, but since it is not directly related to the present invention, a description thereof will be omitted.

An example of the input circuits 2o, z+ and the output circuits 18 and 22 is shown in FIG. The output circuit 18 of the combination weigher 10 is composed of a relay circuit 26 and a photocoupler 28, and is connected to the packaging machine 1.
The second input circuit 20 also includes a photocoupler 30 and a relay circuit 32.
It is made up of. As described above, the interlock signals sent from this combination inquiry include a discharge completion signal, a combination scale discharge wait signal, and a combination scale operation signal.

The output circuit 22 of the packaging machine 12 is composed of a relay circuit 34 and a microswitch 35, and the input circuit 24 of the combination weigher IO is composed of photocouplers 381, 382...3
8n. The interlock signal sent from the parent device 112 includes the above-mentioned discharge command signal, packaging machine operating signal, and the like.

Returning again to FIG. 6, the CPU 14 uses the RA for temporary storage of data when performing the above-mentioned combinational calculations, etc.
I am using M40. Further, the CPU 14 uses a timer 42 for timing.

In this embodiment, the discharge command signal from the packaging machine 12 is first monitored to monitor the interlock signal. The packaging speed of packaging@12 should be constant during operation. Due to improper bag setting, poor sealing, temporary stoppage of the packaging machine 12, etc., the interval T of the discharge command signal shown in FIG.
Is it conceivable that ll, T, □, T13, etc. will be longer than the reference value T ref, but it is usually not conceivable that they will be shorter than the reference value T ref?Also, the period of the ejection command signal tll + j +2
, t13, etc., is normally unthinkable. If these values are shorter than the predetermined reference value jrer, it is considered that there is an abnormality in the transmitting circuit including the microswitch and cam on the packaging machine 12 side. If such an abnormality occurs, two sets of articles may be supplied to one bag, or the two sets of articles may not be able to fit into the bag and may spill. Therefore, in this embodiment, a program shown in the flowchart of FIG. 1 is executed.

That is, as shown in FIG. 1(a), first the expected minimum interval T ref and the expected minimum period jref of the discharge command signal are set (step S2). This setting is performed using a setting means such as a keyboard (not shown). Next, for example, R
It is determined whether the discharge command signal Δ flag configured in the AM is on (step S4).

This flag is turned on when an ejection command signal is received, and turned off when it is not received. Step S
If the result of the determination in step 4 is No, it is determined whether the input circuit 24 of the combination weigher 10 is receiving a discharge command signal (step S6). If the result of this judgment is No, the process will continue until the judgment result becomes YES, that is, until the discharge command signal is received.
Repeat step S4.6. If the judgment result in step S6 is YES, the discharge command signal receiving flag is turned on (step S8), and the generation time of the discharge command signal is set to RA.
Store it in a predetermined area of M40 (step 5IO),
Return to step S4. In addition, a clock is provided to memorize the time in this way, and this clock is shown in Figure 1 (b).
As shown in FIG. 6, the timer 42 shown in FIG. 6 interrupts the CPU 14 every time a predetermined period of time elapses to keep time (step 512).

When step S4 is executed again, the judgment result is YE.
S, and it is determined whether a discharge command signal is received (step 514). If the result of this judgment is YES,
Repeat step S14.2.4 until No. If the answer is No, that is, if the discharge command signal disappears, the time at that time is stored as the time of disappearance, and the discharge command signal receiving flag is turned off (step 516).

Next, the period t1 of the discharge command signal is determined by calculating the difference between the previous generation time and the disappearance time, and then the generation time or disappearance time of the discharge command signal that occurred one time before the current target discharge command signal. (This is stored in the RAM 40) and the generation time or disappearance time of the targeted ejection command signal, thereby obtaining the ejection command signal interval T (step 518). In this way, it is determined whether the interval T1 of the search discharge command signal is greater than or equal to the expected minimum interval Tref (Step 52
0).

If the result of this judgment is No, it means that there is an abnormality in the interval between the discharge command signals, and therefore, a discharge command signal interval abnormality alarm is generated (step 522). This alarm occurred on the 6th
This is done by displaying a message to that effect on a display unit (not shown) or by generating an alarm sound with a tone preset for this alarm from an alarm sound generation device (not shown). Further, the time of occurrence of the abnormality, the content of the occurrence, and in this case, the occurrence interval abnormality of the ejection command signal are stored in the RAM 40 and can be printed out later by a printer (not shown) or the like. Following step S22 or step S20
If the judgment result is YES, it is judged whether the calculated ejection command signal period t is greater than or equal to the expected minimum period j re (step 524).If the judgment result is No,
Since there is an abnormality during the period of the discharge command signal, a discharge command signal period abnormality alarm is generated (step 526).

The generation of this alarm is also performed by displaying a message to that effect on the display section or by generating an alarm sound preset for this alarm from the alarm sound generation device. Further, the time of occurrence of the abnormality, the content of the occurrence, and in this case, the period of the abnormality of the discharge command signal, are stored in the RAM 40, and can be printed out later by a printer or the like (not shown). Following step S26, or if the determination result in step S24 is YES, the process returns to step S4, and the same operations are performed thereafter. Therefore,
An alarm is generated when the occurrence interval or occurrence period of the discharge command signal is smaller than the expected minimum interval or expected minimum period.

In addition, in this embodiment, the number of occurrences of the discharge command signal from the packaging machine 12 and the discharge completion signal from the combination weigher 10 is also monitored to monitor the interlock signal. Combination Nl
Upon receiving the discharge command signal from the packaging machine 12, CPLJ+4 of O discharges the article and then transmits a discharge completion signal to the package 41112. Therefore, the ejection command signal and the ejection completion signal correspond to each other on a l-to-l basis unless there is some abnormality. Therefore, as long as they are normal, the number of occurrences of the ejection command signal and the ejection completion signal are counted, and the difference between them is calculated.If the difference is calculated at the timing shown as t2 in FIG. If the difference is found using the timing shown in , it will be O. That is, as long as it is normal, the difference will always be a constant value. If this difference is not a constant value, there is some kind of abnormality.
If the cause is on the combination scale 10 side, then the CPU 14
If the cause lies in the transmitting circuit other than the above, and if the cause lies in the packaging machine 12 side, then the cause lies in the receiving circuit including the input circuit 20. At this time, if the generation interval of the discharge command signal monitored by the first flowchart is shorter than the expected minimum interval, it means that there is an abnormality in the transmitting circuit on the package 4112 side. In order to determine whether these abnormalities exist, the program shown in the flowchart of FIG. 2 is executed.

That is, first, it is determined whether the discharge command signal receiving flag is on (step 528). If the result of this judgment is NO, it means that no ejection command signal has been received until now.
It is determined whether a new discharge command signal has been received this time (step S30). If the result of this judgment is YES, it means that a discharge command signal that has not been received before is received, so the discharge command signal receiving flag is turned on (step 532), and the number of occurrences of discharge command signals is determined. The value of the software counter C1 for counting is incremented by one step (step 534). On the other hand, if the answer to step S28 is YES, since a discharge command signal has been previously received, it is determined whether a discharge command signal is also received this time (step 536). If the result of this judgment is NO, it means that the ejection command signal has disappeared, and the ejection command signal receiving flag is turned off (step 538).

Following step S34, or following step S]8, or following the determination result of step S30 (No), or following the determination result of step S36 (YES), the sequence of one combination N10 is executed. (step 540). Since this sequence is well known, a detailed explanation will be omitted, or if it is performed following step S34 or if the judgment result in step S36 is YES, the ejection command signal is received. Discharge control of the selected article is performed as soon as the selected article is present. Furthermore, when the process is performed following step 338 or when the judgment result in step S30 is No, the ejection command signal has disappeared, so each control of article supply, weighing, and combination calculation is performed. It will be done.

Following step S40, it is determined whether the CPU]4 has issued a discharge completion signal (step 542). Is this the answer?
If S, the value of the software counter C2, which is current on the number of discharge completion signals, is incremented by one step (step 544).

Following this step S44, or following the determination result of step S42 being NO, the count value C2 of the counter C2 is subtracted from the count value of the counter C1, and the discharge completion signal is immediately calculated from the number of occurrences of the discharge command signal. The number of occurrences is subtracted, and it is determined whether this subtracted value is l or 0 (step 546). The reason for determining whether it is 1 or 0 is as follows.

As mentioned above, the ejection command signal and the ejection completion signal are 1:1.
If the subtracted value is calculated at the timing after the ejection command completion signal is generated, for example, the timing shown as t:l in FIG. For example, step 3 is performed at the timing shown as t2 in FIG. 5, that is, while the discharge command signal is being generated.
There is also a possibility that 46 will be executed. In this case, as is clear from FIG. 5, the above-mentioned subtraction value will be 1 even if both the combination weigher 1O1 and packaging machine 12 are normal. This is because this is taken into consideration. If the answer to step S46 is NO,
Since there is an abnormality as described above in the combination weigher 10 or the packaging machine 12, an abnormality alarm is generated indicating the number of occurrences of the discharge command signal and the discharge completion signal (step 548). This alarm is generated by displaying a message to that effect on the display section or by generating an alarm sound having a tone predetermined for this alarm from the alarm generating device. Further, the time of occurrence of the abnormality, the content of the occurrence, and in this case, the abnormality in the number of occurrences of the ejection command signal and the ejection completion signal, are stored in the RAM 40 and can be printed out later by a printer or the like (not shown). Following step S48, or if the determination result in step S46 is YES (if there is no abnormality in the number of occurrences of the discharge command signal and the discharge completion signal), step S2
Return to 8. In the manner described above, it is monitored whether or not there is an abnormality in the number of occurrences of the ejection command signal and the ejection completion signal.

In this embodiment, the interlock signal is further monitored by causing the CPU 14 to hack the signal sent from the combination weigher IO to monitor whether the signal is sent normally. If the signal is not being transmitted normally, it becomes clear that there is an abnormality in the output circuit or the electronic circuit connected between it and the CPU 14. Therefore, the block diagram shown in the flowchart in FIG. 3 is executed. That is, the sequence of the combination scale lO is executed (step 5SO), and then a circuit outputs some signal, such as a discharge completion signal or a combination scale→in-operation signal, to the packaging Ja12]8
It is determined whether the call was made via (step 552).

If the result of this judgment is NO, the process returns to step S50, and steps S50 and S52 are repeated until the answer to step S52 is YES. Is the answer to step S52 YES?
S, the signal is sent to the CPU through the input circuit 24.
1.4 (step 554). For example, assuming that the relay circuit 26 of the output circuit 18 shown in FIG. 7 sends a signal to the packaging machine 12, this relay circuit 2
6 has a contact 25b in addition to a contact 26a for transmitting a signal to the packaging machine 12. If this contact 25b is connected to, for example, a photocoupler 38n of the input circuit 24, C
Relay coil 2 is used to send a signal from P U 14.
Since a signal is inputted to the input circuit 24 visually when 5c is activated, step S54 becomes unnecessary. What is necessary in step S54 is, for example, when a signal is transmitted by the photocoupler 28, a relay circuit (not shown) is provided corresponding to the photocoupler 28, and its contact is connected to the contact 25.
When connected to the photocoupler 38n as shown in b, the relay is operated.

Following step S54, it is determined whether a signal transmitted through the input circuit 24 has been received (step 556). If the result of this determination is YES, the output circuit 18 is operating normally, and the process returns to step S50. Further, if the determination result in step S56 is No, it becomes clear that there is an abnormality in the output circuit or the electronic circuit between this and the CPU 14, so an abnormality alarm for the output circuit etc. is generated (step 358). This alarm is generated by displaying a message to that effect on the display section or by generating an alarm sound having a tone predetermined for this alarm from the alarm generating device. Further, the time of occurrence of the abnormality, the details of the occurrence, and in this case the abnormality of the output circuit, etc., are stored in the RAM 40 and can be printed out later by a printer (not shown) or the like. After step S58, the process returns to step S50. As described above, it is monitored whether or not there is a failure in the output circuit or the like.

In the above embodiment, for convenience of explanation and to facilitate understanding of the content of the invention, monitoring of the three interlock signals has been explained as separate programs, or in reality, these may be considered as one program. Ru. In that case 1, for example, at the position of step S10 in FIG. 1 or step SIO shown by the dotted line in FIG. , is incorporated in each step of the SB enclosed by the dotted line in FIG. 3 or at the position of the SB shown by the dotted line in FIG. In the above embodiment, an interlock signal monitoring device is provided on the combination scale 10 side or on the packaging 4111Z side, and monitors the generation interval and period of signals received from the combination scale 10, such as the generation interval and period of the discharge completion signal, and the discharge command signal. The output circuit of the packaging machine 12 or the electronic circuit between the packaging machine 12 and the CPU 14 may be monitored. In addition, in the above embodiment, for which combination of the combination scale IO and the packaging machine 12 the interlock signal monitoring device is provided, and for any combination of the weighing machine and the packaging machine 12 other than the combination scale IO. Kotoka deki, and further combination N10 and packaging @I2
This method can also be applied to two devices that are linked together using an interlock signal, even if they are other devices.

[Effects of the Invention] As described above, according to the present invention, the cause of an interlock failure can be automatically detected, and the detection results can be output in the form of display or recording. Therefore, it is not a case of an interlock failure occurring frequently, but a very rare occurrence, such as once in a day or 71 times in a week, indicating that an interlock failure has occurred. Even if a repair person is sent to perform repairs based on the notification, even if the interlock failure does not occur and the cause is difficult to discover, the detection results are output, making it relatively easy to find the cause. It can be found and repair work can be carried out quickly.

[Brief explanation of the drawing]

FIG. 1 is a flowchart for monitoring the ejection command signal in one embodiment of the interlock monitoring device according to the present invention, FIG. 2 is a flowchart for monitoring the number of occurrences of the ejection command signal and the ejection completion signal in the same embodiment, and FIG. 4 is a waveform diagram of the discharge command signal of the same embodiment. FIG. 5 is a waveform diagram of the discharge command signal and discharge completion signal of the same embodiment. FIG. is a block diagram of the same embodiment, FIG. 7 is a circuit diagram of the output circuit and input circuit of the same embodiment, FIG. 8 is a diagram showing an example of a conventional combination weigher and packaging machine, and FIG. 9 is a conventional It is a figure showing other examples of a combination scale and a packaging machine. 10... Combination scale, 12... Packaging machine, 14...
...CPU, 18.22 ...Output circuit, 2
0.24...Input circuit. 23 figures 5[21

Claims (3)

[Claims] (1) First and second devices that mutually exchange interlock signals and operate in conjunction, and a means for detecting the generation interval and period of the interlock signal transmitted from the first device to the second device. and a first comparison means for comparing the detected generation interval of the interlock signal with a generation interval reference value and outputting a comparison result, and comparing the period of the detected interlock signal with the period reference value. and second comparing means for outputting a result. (2) a first device; and a second device that operates upon receiving a first interlock signal transmitted from the first device and transmits a second interlock signal to the first device in this operating state. a first counting means for counting the number of occurrences of the first interlock signal; a second counting means for counting the number of occurrences of the second interlock signal;
An interlock monitoring device comprising means for determining whether the difference between the first and second count values is within a set value and outputting a determination result. (3) first and second devices that mutually exchange interlock signals and operate in conjunction; a means provided in the first device for generating the interlock signal; and a means for generating the interlock signal from the generating means; an output circuit for receiving and outputting the interlock signal to a second device; an input circuit provided in the first device and connected to the output circuit to receive the interlock signal; and an output circuit connected to the input circuit and the generating means An interlock monitoring device comprising means for determining whether or not the interlock signal can be received from the input circuit while the interlock signal is being supplied, and outputting a determination result.