JPH046956A - Color picture coding system - Google Patents

Abstract

PURPOSE:To detect a location of an error caused in the unit of lines by adding an identification signal to each picture line to incorporate the identification signal and a picture signal into a same signal series and applying prediction coding to the series. CONSTITUTION:R, G, B input data 201, 202, 203 representing each picture element of a color picture are inputted to a state detection section 13. The state prediction section 13 decides the picture element state around the coded picture element and sends a state signal st206 and a coded picture element signal D203 to a coder 11. The coder 11 generates a code 207, which is sent to a decoder 14. A code synchronization generating section 12 detects a head of a 1-line RGB picture to be coded and gives an identification number cyclicly. The identification number is coded by the coder 11 similarly to the case of a picture element signal. When an error takes place during picture transmission, the decoder finds out a line in which an error takes place by taking synchronization with each line.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a color image encoding method in a color facsimile device that communicates color images.

[Prior art]

The conventional image encoding method is G3. recommended by CCITT (International Telegraph and Telephone Consultative Committee). A run-length encoding method, typified by G4 facsimile, is generally used. This encoding method is a method that counts the length (run length) in which a pixel continues to be white or black, and determines a code corresponding to the count value from a code table prepared in advance. The code table used here is characterized by assigning relatively short codes to long white runs, which are common in document images.

On the other hand, recently, the development of inexpensive color printers has progressed, and color images, especially 1 bit of red (R), green (G), 9 blue (B), yellow (Y), cyan (C), and magenta (M), have been developed.
Binary color image communication with different data has been proposed.

As a binary color encoding method, three colors are encoded for each bit brain, and MH for black and white is used.

A method using an MR encoding method has been considered.

[Problem that the invention is trying to solve]

However, with the above method of encoding the three colors for each bit plane, encoding each R, G, and B bit plane increases the entropy of the original R, G, and B information sources. , there is a problem that encoding efficiency deteriorates. Simply put, this means that color correlation information is not used.

Therefore, the challenge is how to improve encoding efficiency by utilizing color correlation. Therefore, it is possible to perform predictive encoding using color correlation. Conventionally, encoding methods have been considered that use arithmetic codes for predictive encoding. However, when an image is encoded using arithmetic codes, the encoding continues from the beginning to the end of the image, so if an error occurs during transmission, etc., the error cannot be detected unless the end of the code is decoded. If such a method is applied to a color image, it becomes more problematic because the amount of data is large.

Furthermore, in the case of a color image, although the amount of data is generally large, there are blank areas in the image to be encoded. Regarding this blank space, it is necessary to consider encoding efficiency, encoding speed, etc.

[Means to solve the problem]

The present invention has been made in view of the above points, and in a binary color image encoding method represented by a plurality of color component signals, an identification signal is added to each image line, and the identification signal and the image signal are the same. This provides a color image encoding method that treats the image as a signal sequence and performs predictive encoding.

〔Example〕

FIG. 1 shows an embodiment of a color image transmission system to which the present invention is applied. R, G, B representing each pixel of a color image
Each 1-bit input data 201, 202, and 203 is sent from each frame memory (not shown) to the state prediction unit 13. The state prediction unit 13 determines the state of pixels around the encoded pixel and sends a state signal 5t206 to the encoder 11. The encoded pixel signal D203 is also sent to the encoder 11.

The encoded pixel signals are serially sent to the encoder in the order of RGB, RGB, . . . at 203.

In the encoder 11, a code 207 is created based on the pixel signal RI and the state signal st by Markov model encoding, such as an arithmetic code, as will be described later, and is transmitted to the decoder 14.

The decoder 14 performs decoding processing on the transmitted code 207, and generates a decoded RGB serial pixel signal D.
'I get 208. D' 208 is a pixel signal R'G'B' separated and decoded by the RGB parallel conversion unit 15.
Obtain 209, 210, 211.

The code synchronization generator 12 plays the role described below. First, the beginning of the RGB pixels of the l line to be encoded is detected and an identification number is cyclically assigned. This identification number is encoded by the encoding section 11 in the same way as the pixel signal. Furthermore, R and G of one line to be encoded.

If the B signal is all "0", that is, the l line is white, the identification number is "0", otherwise, if even one pixel among R, G, and H is not "0", then the identification number is "0". , one bit of "1" is added to the identification number.

The role of the former is that when an error occurs during image transmission, the receiver side can discover the line in which the error occurred by synchronizing each line.

Moreover, the latter role can improve encoding efficiency and encoding speed by not encoding blank areas in a color image and skipping them by encoding only the identification number.

FIG. 5(b) shows an example of the line identification signal. If the pixels of one line are arranged serially in RGBRGB, a 2-bit line identification number is attached to the beginning. As shown in the figure, if it is the 1st line, 2 bits such as 10 are added if it is the 2nd line. In addition, a skip signal is attached as shown in the 1-bit diagram, and RG of 1 line
It is 0 only when all B are O, and 1 otherwise. In the example shown in the figure, the fourth line to the seventh line is regarded as a blank section, and only the identification number is encoded.

FIG. 5(a) shows a detailed block diagram of the code synchronization generating section 12. The image signals R, G, and B are input in parallel to the code synchronization generator 12. 12-1゜12-2
．． 12-3 is a line memory that stores one line each of RGB. Therefore, the output 12- of the line memory
At 10.12-11.12-12, the image signal of the previous line is output.

12-4. 12-5. Reference numeral 12-6 denotes a signal detection unit that detects whether "l" exists in the data of each line, and can be easily constructed using flip-flops or the like. Its output 1
2-13. 12-14. 12-15 outputs 0 only when all data on one line is "0".

12-7 is a negative logic AND circuit, that is, output 1
2-13. 12-14. It becomes 0 when all 12-15 are 0. Therefore, all RGB pixels of one line are 0.
12-17 becomes 0 only when . This signal is shown in Figure 5 (
This corresponds to the skip signal in b).

12-8 is a line counting section, which outputs a 2-bit line identification number as shown in FIG. 5(b) to 12-6.

12-17 and 12-16 are identification signals D-SYNC120
becomes. Reference numeral 12-9 is an identification number state generating unit, which determines the state so that each bit of the 3-bit D-8YNC120 is unique, and
Outputs 1.

FIG. 4(a) is a detailed block diagram of the state prediction unit 13 (FIG. 1). Pixel signals R, G, and B are each 220,
221 and 222 to the state prediction unit 13.

The details of the state prediction for G and B are the same as for R, so they will be omitted.

Reference numeral 13-1 is a line memory for storing the pixel state one line before, and latches 131-138 are for storing surrounding pixels of the encoded pixel. The encoded pixel is the value stored in latch 136.

Latches 131 to 135, 137, and 138 are seven pixels around the encoded pixel. These are input to the selector 13-3 as a reference pixel value 13-4. Further, the corrected encoded pixel value 13-5 is similarly input to the selector 13-3.

Similarly, in the case of a G pixel signal, the surrounding 7 pixels have a reference pixel value of 13.
-6 to 9, and the R pixel signal also goes to the selector 13-3 together with the encoded pixel 13-7, each with a reference pixel value of 13.
-8. It is output as encoded pixel 13-9. The selector 13-3 serially inputs R, G, B encoded pixels and reference pixels input in parallel to R, G, B, R, G, B, . . . and the encoder 11 ( Figure 1).

FIG. 4(b) is an explanatory diagram of reference pixels for determining the encoding state 5t206. (a) shows the reference pixel of the R pixel signal, and the encoded 7 pixels around the encoded pixel shown in black are shown in (a).
Indicates that a pixel is referenced.

(b) shows the reference pixels of the G pixel signal, and represents that eight pixels are referred to, including seven pixels similar to (a) and two pixels at the same position as the encoded pixel.

Furthermore, FIG. 5(c) shows the reference pixels of the B pixel signal, and refers to 9 pixels including the same 7 pixels as in (a) and the pixels at the same position as the R and G encoded pixels. It represents that.

In addition to referring to surrounding pixels of the same color in this way, the encoder 11
Prediction in - policy can be increased to improve coding efficiency. The selector 13-3 selects the reference pixel and encoded pixel for each color shown in FIG. Output as .

13-13 is a selector for selecting whether the encoded pixel is a synchronization identification number. When the line synchronization signal 13-14 is at the beginning of the line, the identification number D-5YNC120 generated in the code synchronization generator is selected as the encoded pixel signal, and the identification number state is selected as the state prediction signal 5t206. Select 5t-3YNC121. In the case of one line of image, the encoded pixel signal D13-11 is input to D203, and the surrounding state 1 of the encoded pixel is input to the state prediction signal 5t206.
Select 3-12.

D-3YNC120 is processed as 3-bit serial D203. For the identification number state at that time, a state that is not in the encoded pixel surrounding state 13-12 may be selected. In the case of this embodiment, the reference state is 12 bits (7
) state X'801',X'802'X' 80
3' is used. Here, X represents hexa.

Therefore, the encoder 11 can encode the encoded pixel signal and the identification signal without distinction.

FIG. 2 is a block diagram of the encoder 11.

Before explaining FIG. 2, the arithmetic codes used in this embodiment will be explained.

As is conventionally known, arithmetic coding is a method in which a code is formed by arithmetic operations so that an input signal string becomes a code expressed in binary decimal numbers. This method uses Lang
The document “Comp
Ression of Black / White
eImages with Arithmetic C
oding, IEEETran Com, C0M
-29, 6, (1981, 6), etc. According to this document, the probability that 81 least-likely symbols (LPS) will appear in an input signal sequence that has already been encoded is calculated using q1 calculation register Au.
When the gend is A (S) and the code register is C (S), the following arithmetic operation is performed for each input signal.

A(Sl)=A(S)XqSpecial A(S)X2-Q...
・(1) A(SO) = <A(S)-A(SL):)
z...(2) <>l represents truncation with 12 significant digits c(so)=C(S)
...(3) C(Sl)=C(S)+A(So)
...(4) Here, if the encoded data is a dominant symbol (MPS: 0 in the above example), A (S
o), C(So) is used to encode the next data. In addition, in the case of the inferior symbol (LPS: 1 in the above example), A
(Sl) and C(Sl) are used to encode the next data.

The new value of A is multiplied by 2S (S is an integer greater than or equal to 0) and 0.
It falls within the range of 5<A<1.0. This processing corresponds to shifting the calculation register A eight times in hardware. The code register C is also shifted the same number of times, and the shifted out signal becomes the code. The above process is repeated to form a code.

Further, as shown in equation (1), the occurrence probability q of LPS is approximated by a power of 2 (2-': Q is a positive integer), thereby replacing the multiplication calculation with a shift calculation. In order to further improve this approximation, q is approximated by a polynomial of a power of 2, such as the expression (5). This approximation improves the worst point of efficiency.

q, 2-Ql + 2-02
(5) Furthermore, since the arithmetic code allows the value of Q to be switched for each encoded data, the probability estimator can be separated from the encoding.

In this embodiment, as described above, a dynamic method is used in which the probability is estimated while performing encoding.

A block diagram of the encoder 11 shown in FIG. 2 that performs the above arithmetic coding will be explained.

The state signal 5t206 from the state prediction circuit 13 is input to the counter memory 23 and the encoding condition memory 24.

The coding condition memory 24 stores, for each state represented by the state signal 5t206, an index 1107 indicating a coding condition including a dominant symbol MPS108, which is a symbol that is likely to appear, and the probability of appearance of an arithmetic code LPS, which will be described later. has been done. MP3108 is input to the predictive conversion circuit 27, and the pixel signal D203 is input to the predictive conversion circuit 27.
Create a YN signal lO1 which becomes 0 when it matches S108. The YN signal 101 is input to the update circuit 25, and the update circuit 25 increments the count of the corresponding state among the count values stored in the counter memory 23 when the YN signal is 0. And counter memory 23
If the count value C106 stored in the count table ROM12 matches the set value MC105 from the count table ROM12, the index 1107 is updated in the direction of increasing (in the direction of decreasing the LPS appearance probability q). (The MPS is not inverted.) The count table ROM 22 supplies the update circuit 25 with the number MC105 of MPS shown in Table 1, which is determined corresponding to the index ■ representing the LPS appearance probability q. .

Furthermore, in the update circuit 25, the MP3108 and the pixel signal D2
03 does not match, that is, Y from the prediction conversion circuit 27
When the N signal is 1, the index 1107 is updated in the direction of decreasing (in the direction of increasing the LPS appearance probability q). Furthermore, when a YN signal with a value of 0 comes when the index is 1, processing is performed to invert the MPS (0→l or 1→O). The outputs I' 109 and MPS' 110 are the updated index values and are stored again in the encoding condition memory 24.

In the encoding parameter determination circuit 26, the index 11
Coding parameter Q11 of arithmetic code based on the value of 07
1 is set in the arithmetic encoder 28. This arithmetic encoder 28
Now, the YN signal 101 from the predictive conversion circuit 27 is arithmetic encoded using the parameter Qllll to obtain a code 102.

Incidentally, an initial value is given to the encoding condition memory 24, and 1,
By not updating the MPS, static encoding can be easily achieved.

FIG. 8 is a block diagram of the predictive conversion circuit 27.

Pixel signal D203 and MPS108 are connected to EX-OR circuit 29
and according to the logical formula in Table 2, the pixel signal, signal D2
When 03 and MP3108 match, a YN signal 101 which becomes 1 when 01 does not match is output.

FIG. 3 is a block diagram of the update circuit 25. When the YN signal 101 is O, the count value 0106 from the counter memory 23 is incremented by +1 by the adder 31 and becomes the signal C'l12. This value is compared with MC105 from count table ROM 22 in comparator 33, and if the value of C' matches the value of MC, update signal UPA113 is set. Moreover, the YN signal 101 is an update signal UPB11.
4, and UPA and UPB are index change circuits 35
to go into. In addition, UPA and UPE are logically outputted by an OR circuit 37.
R is taken, and the output signal 115 of the OR circuit 37 becomes a switching signal for the selector 32.

When the signal 115 is 1, the selector 32 selects the 0 signal 119 to reset the counter value, and otherwise selects the output signal C'l12 of the adder 31 and outputs it as the counter update signal C'l16. It is stored in the counter memory 23.

The index change circuit 35 includes signals dl17 (standardly d=1) that control the index update increments and U
PA113. UPB 114 and encoding condition memory 24
The current index 1107 is input from .

Table 3 is a table showing the index update method in the index change circuit 35 (Table 3 shows cases where the update increments are d=1 and d=2.) Input this table l1 condition d, UPA , UPB to determine the updated index 1'. Also, I=
1 and when UPB=1, EX signal 118 is set. E
When the X signal is 1, the inverter 36 inverts the symbol of the current MPS 108 (0→1 or 1→0) and updates the MPS
Obtain S'110. Also, when the EX signal is 0, MP
S' is not changed. Updated I' 109 and M
PS' 110 is stored in the encoding condition memory 24 and used as the index (2) and MPS for the next processing. Note that the updating method shown in Table 3 can be configured as a table using a ROM or the like, or can be configured as a logic using an adder/subtractor.

As described above (, when MPSs as many as the number of MPSs determined according to the value of the index ■ representing the appearance probability q of an LPS approximated by a polynomial of a power of 2 are generated, the index ■ is added by d, and the arithmetic code is The appearance probability q of LPS used for is made small, and on the other hand, when LPs occur,
The index ■ is subtracted by d to increase the appearance probability q of LPS used for arithmetic codes. Furthermore, if an LPS occurs in a state where the index I representing the LPS appearance probability q is 0.5 is 1, the MPS is inverted.

In this way, the index and MPS are adaptively applied to the input image.
By updating , arithmetic coding with high coding efficiency can be achieved.

FIG. 6 is a coding efficiency curve of the arithmetic code used in this embodiment. Hereinafter, the value of index I will be indicated by a lowercase letter i. This curve is expressed by equation (6) when the LPS appearance probability is the approximate probability qei at the time of q1 encoding.

Then, the index I is sequentially set to 1. 2. 3. ...and given.

Here, the numerator is entropy, and qel is the value shown by formula (7).

q*I=q1+q2...
(7) The value of q11Q2 is a polynomial approximation value of a power of 2 and is given in Table 5. For example, it is shown by (8) to (10).

qel =2-'
... (8) qa2 = 2-'-2-'
-(9)q e3' ” 2-
2+ 2-"... (1
0), and the peak point qel at which the efficiency η becomes 1.0 in this probability will be referred to as the effective probability hereinafter. Furthermore, it is clear that the efficiency is improved by calling the intersection of the efficiency curves the boundary probability qbi, and encoding using the effective probabilities adjacent to this probability.

In this embodiment, the effective probability qml shown in Table 4 is selected from the probabilities that can be approximated by two terms as shown in equation (5). Also, Ql, Q2 in Table 4. Q3 is arithmetic encoder 2
This is the parameter Q, 111 sent to 8. That is, Ql, Q
2 is the shift amount given to the shift register, and this shift operation is used to calculate the power of 2. Also, Q3
indicates the coefficient of the second term, and switches between + and -.

The values of MC in Table 1 are determined as follows.

That is, when the number of LPS is NL and the number of MPS is NM,
The probability of LPS occurrence is given by equation (11).

This equation is solved by Ny (and becomes equation (12).

N M = L N L (1/ q -1) J
...(12) However, "LX" indicates rounding up to the decimal point.

By giving qbi shown in FIG. 6 to q in equation (12), the number of dominant symbols (MPS) there
Mi is calculated. Therefore, MC is calculated from equation (13).

MCi = NMt++ −NMt
...(13) The value of MC in Table 1 is expressed by formula (11), (
12) and (13) with N L = 2.

In this way, the number NMi of dominant symbols MPS corresponding to each index I is determined based on each boundary probability qbt as shown in FIG. shall be.

The value of this MC and the number of generated dominant symbols are compared as described above, and if the value of MC and the number of dominant symbols match, the state is suitable for encoding using the neighboring index I. It is determined that index I is changed. As a result, the index I is changed at a good timing based on the number of dominant symbols generated, and encoding using the optimum index I can be adaptively achieved.

FIG. 7 is a block diagram of the arithmetic encoder 28.

Of the control signals Qclll (Table 4) determined by the code parameter determination circuit 26, the shift register A70
Ql to shift register B, Q 2 to shift register B, selector 72
Q3 is input to . Ql and Q2 are Augend signals for shift registers A and H, respectively.
Indicates how many bits to shift 123 to the right.

The shifted results become output signals 130 and 131.

The signal 131 is complemented by the inverter 76, and the selector 72 selects the signal 131 or the output signal of the inverter 76 using the control signal Q3 to obtain the output signal 132.

Adder 73 receives signal 130 from shift register A70.
and the signal 132 from the selector 72 are added, and AS
An I signal 124 is output. The subtracter 74 subtracts the As+ signal 124 from the As signal 123 to obtain As.

A signal 125 is obtained. The selector 75 receives the Aso signal 125.
and the ASI signal 124 are selected by the YN signal 101. That is, when the YN signal is 1, the Aso signal becomes the A' signal 126, and when the YN signal is O, the ASI signal becomes the A' signal 126. In the shift circuit 80, processing is performed to shift the A' signal to the left until the MSB becomes 1, and this shift causes the AS
' signal 127 is obtained. The shift signal 132 corresponding to the number of shifts enters the code register 79, and from the code register 79, bits corresponding to the number of shifts are sent.
are output in order from KSB to become code data 130.

The code data 130 is processed using a bit processing method (not shown).
The bitl sequence is processed so that it is within a finite number of bits, and is transmitted to the decoder 14 side.

Further, the content CR128 of the code register 79 is stored in the adder 7
7, it is added to the Aso signal 125 and enters the selector 78. Also, the signal CR to which the Aso signal 125 is not added is
128 also enters the selector 78, when the YN signal 101 is 1, CR' = CR, and when the YN signal is O, CR' = CR
It is output as a CR' signal 129 which is 10Aso.

The shift processing described above regarding the code register 79 is CR
'Do this for the signal.

In the above embodiment, when encoding a binary R, G, B color image, a 2-bit line identification number and a 1-bit blank skip signal were used as identification numbers to identify each line. Can be used independently as a signal. Furthermore, by setting the line identification number to more than 2 bits, error detection can be performed more accurately.

As described above, each color signal, such as the R, G, and B signals, is sequentially encoded pixel by pixel to generate one piece of code data in which color information is mixed. When generating codes, by inserting a code that identifies the line at the beginning of each line, it is possible to detect errors line by line when an error occurs. Further, by performing predictive encoding on the line identification code in the same way as other pixels, it is possible to minimize the reduction in coding efficiency including the line identification code.

Furthermore, by simultaneously adding a blank line skip code to the line identification code and performing similar predictive coding, coding efficiency and coding speed are improved.

Table 1 Table 2 (-) is don' c a r e.

12... Code synchronization generation unit 13... State prediction unit [Effects of the invention] As explained above, in the present invention, an identification number is added to each line and this is encoded in the same way as the encoded pixels. This makes it possible to detect the location of errors that occur during dud on a line-by-line basis. Furthermore, by adding a blank skip line to the identification number, the encoding efficiency and the encoding speed were improved at the same time.

[Brief explanation of drawings]

Figure 1 is a block diagram of a color image transmission system, Figure 2 is a block diagram of a color image transmission system.
Figure 3 is a block diagram of the encoder, Figure 3 is a block diagram of the update circuit, Figure 4 (a) is a detailed block diagram of the state prediction section, Figure 4 (
b) is a reference pixel explanatory diagram, FIG. 5(a) is a detailed block diagram of the code synchronization generation section, and FIG.
FIG. 6 is a diagram showing an example of line identification, FIG. 6 is a diagram showing a coding efficiency curve, FIG. 7 is a block diagram of an arithmetic encoder, and FIG. 8 is a block diagram of a predictive conversion circuit. 11...Encoder diagram 82GB=-1101;l! GB +111<GB-- ooogctB D DI RGB -- 0/ OF' (3B --- 0/IRGB --- 10DR (iB --- Intenix. "$4=

Claims (3)

[Claims] (1) In a binary color image encoding method represented by multiple color component signals, an identification signal is added to each image line, and the identification signal and image signal are regarded as the same signal sequence and predictive coding is performed. Characteristic color image encoding method. (2) The color image encoding method according to claim (1), wherein the identification signal includes a signal for identifying a line number. (3) A color image encoding method according to claim (1), wherein the identification signal includes a signal indicating whether or not dependent lines can be skipped without being encoded.