JPH0468524A - Differential growth method of tungsten in selective chemical vapor deposition - Google Patents

Abstract

PURPOSE: To deposit tungsten, so that the surface height becomes uniform by depositing a reaction gas, whose composition is adjusted in advance discriminatingly on first and second contact regions of a semiconductor substrate and growing a tungsten part. CONSTITUTION: After a junction layer 12 has been formed on a semiconductor substrate 11 by doping a specific part, an insulating film 13 is deposited. After that, for wiring the bit line of the memory element of a DRAM on the insulating film 13, a polycrystalline silicon layer 14 is deposited, and a tungsten silicide layer 15 is deposited on it by the chemical deposition method. Further a polycrystalline silicon layer 18 is deposited on it and then is doped. The triple film of the polycrystalline silicon layer 14, the tungsten silicide layer 15, and the polycrystalline silicon layer 18 is formed as a bit line at a specific part by the photomasking process and the metal etching process, and a contact region X and a contact region Y are formed at the upper part of the junction layer 12 of a single crystal silicon and at the upper part of the polycrystalline silicon layer 18, respectively, thus depositing tungsten so that the surface height is uniform.

Description

Detailed Description of the Invention [Purpose of the Invention (Industrial Field of Application) The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, and in particular a method for covering a step-like covering portion that occurs in a contact area when forming metal wiring. Concerning a differential growth method of tungsten in selective chemical vapor deposition to improve performance.

(Prior Art) Conventionally, a large number of elements are formed on a semiconductor substrate through various manufacturing processes, and then metal layers are wired to electrically connect these elements.

This metal layer is created by a photomasking process and a metal etching process performed after depositing a thin metal film on the surface of the semiconductor substrate.

Currently, the metal material commonly used in semiconductor manufacturing processes is aluminum (AI) containing a moderate proportion of silicon (Si).

However, when a semiconductor device is used for a long period of time using aluminum as a metal wiring material, the metal atoms move through the metal due to the electrons moving in the metal, and the aluminum wiring film becomes thinner, especially in areas with steps. In some cases, an electromigration phenomenon occurs that leads to wire breakage, and the semiconductor device may become inoperable. In particular, as semiconductor devices become more highly integrated, the metal wiring film becomes thinner, which increases the ohmic resistance in the contact area, which not only makes it easier for the electromigration phenomenon described above to occur, but also has a negative effect on the operating speed of semiconductor devices. influence

Recently, tungsten, which has a large atomic radius and a large mass, has a relatively low ohmic resistance, so tungsten is selectively deposited only on contact areas with steps where the above phenomenon is likely to occur by chemical vapor deposition (CVD) to create metal wiring materials. It has been used as an aluminum wiring film to improve the operating speed of semiconductor devices by compensating for the drawbacks of aluminum wiring films.

In other words, by depositing tungsten, which has a relatively low ohmic resistance, on the contact area to smooth the surface of the semiconductor substrate, and then wiring an aluminum metal film over the tungsten, electromigration can be prevented and the semiconductor substrate The operating speed of the device is improved.

That is, FIG. 3 shows a cross-sectional view of a state in which metal wiring is formed by selective chemical vapor deposition using a conventional method.

As shown in the figure, DRAM memory cells are formed on a semiconductor substrate 1 through various semiconductor manufacturing processes. That is, after the bonding layer 2 is formed on the semiconductor substrate 1 at a portion to be electrically connected, the insulating film 3 is deposited. In the next step, bit lines for metal wiring made from polycrystalline silicon (polysilicon) 4 and tungsten silicide portions 5 are formed in a conventional manner. Then, the insulating film 3 is deposited again and the contact areas X, Y are formed by a photomasking process and a metal etching process. Following this process, a tungsten portion 6 is deposited by selective chemical vapor deposition, and an aluminum alloy layer 7, which is used as a metal interconnect, is deposited thereon.

(Problem to be Solved by the Invention) However, due to the difference between the depth of the contact region A tungsten portion 6 is formed in the shallower contact area Y by chemical vapor deposition.
Even if the tungsten portion 6 is deposited and smoothed, the tungsten portion 6 deposited in the deeper contact region X still forms a step.

In other words, in the method of vapor depositing tungsten having a relatively small ohmic resistance in the contact areas X and Y described above, when each memory element in a highly integrated DRAM is interconnected to a memory element in a peripheral circuit, There is a problem that the tungsten portion 6 cannot be deposited with a uniform surface height because the depth of the contact area is different and a large step is generated.

Moreover, the coating performance deteriorates between the contact areas X and 7 having different depths, and if used for a long period of time, an electromigration phenomenon may occur that leads to disconnection of the aluminum alloy layer 7, and the semiconductor element may become inoperable. be. In particular, as semiconductor devices become more highly integrated, metal wiring films become thinner, so the above phenomenon occurs more frequently.

SUMMARY OF THE INVENTION Therefore, the present invention solves the above-mentioned problems of the prior art.The purpose of the present invention is to deposit tungsten selectively on contact areas having different depths, so that the surface height of the tungsten is uniform. The object of the present invention is to provide a method that allows vapor deposition to be achieved.

[Structure of the Invention (Means for Solving the Problems)] The present invention for solving the above problems includes a step of forming a first contact region on a semiconductor substrate to be electrically connected to the substrate; wiring a bit line with a tungsten layer and depositing a polycrystalline silicon layer on top of the bit line; forming a second contact region on top of the polysilicon layer; A reactive gas with a pre-adjusted composition is deposited onto the contact area using a chemical vapor deposition method (CV).
The present invention is characterized in that it comprises a step of growing a tungsten portion by differential deposition in step D), and a step of depositing an aluminum alloy layer on top of the tungsten portion.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1D are cross-sectional views sequentially showing the differential growth process of tungsten manufactured according to an embodiment of the present invention.

A semiconductor element is formed on the semiconductor substrate 11 by repeating various semiconductor manufacturing steps. And bonding layer 1
A contact area X on 2 is formed to electrically connect to an element (not shown).

As shown in FIG. 1A, a bonding layer 12 is formed on a semiconductor substrate 1 by doping a specific portion, and then an insulating film 13 is deposited. A contact area is formed on the bonding layer 12 by the next process described below.

A polycrystalline silicon layer 14 is then deposited on the insulating film 13 for wiring bit lines of a DRAM memory element, and then doped using conventional methods. A tungsten silicide layer 15 made of tungsten silicide is deposited on the polycrystalline silicon layer 14 using a chemical vapor deposition method. Furthermore, a polycrystalline silicon layer 18 is deposited on top of the tungsten silicide layer 15 and then doped.

Here, in the selective chemical vapor deposition process described later, the deposition rate of tungsten deposited on the polycrystalline silicon layer 18 is reduced by half compared to the deposition rate of tungsten deposited on the bonding layer 12 of single crystal silicon. It will be done.

Next, FIG. 1B shows a bit line pattern formed by a photomasking process and a metal etching process.

As shown in the figure, a triple layer of polycrystalline silicon layer 14, tungsten silicide layer 15, and polycrystalline silicon layer 18 is formed as a bit line in a specific portion by a photomasking process and a metal etching process.

Here, the tungsten silicide layer 15 forming the bit line is made of polycrystalline silicon (Si), molybdenum silicide (Mo-Si), tungsten (W), titanium (
Ti), titanium silicide (Ti-Si), or aluminum alloy.

Next, contact areas X and Y connected to the metal wiring are shown in FIG. 1C.
A cross-sectional view of the metal wiring as it is formed is shown.

In the figure, the contact region XSY is formed by a photomasking process and a dry etching process. That is, contact region X is formed on top of bonding layer 12 of monocrystalline silicon, and contact region Y is formed on top of polycrystalline silicon layer 18.

Note that in this embodiment, the depth of the contact area X is approximately twice the depth of the contact area Y.

Next, Figure 1 shows a cross-sectional view of a metal wiring when a tungsten portion is formed by a selective chemical vapor deposition method.

In the figure, SIH, /W is used as the reactant gas for chemical vapor deposition.
When a silane-based gas with an F6 ratio of 0.8 is used, the growth rate of tungsten on the monocrystalline silicon bonding layer 12 forming the contact area X or the growth rate of tungsten on the polycrystalline silicon layer 18 forming the contact area Y This is twice the growth rate of
Tungsten can be deposited to the same predetermined height from the contact regions X and Y having different depths to form the tungsten portion 16.

It is already known that when tungsten is deposited and grown at a SiH4,/WF6 ratio of 0.8, the growth rate on single crystal silicon is twice that on polycrystalline silicon. It is a technology that
"icon NEWS" June 1989 issue, page 68 onwards.

According to this technical document, the growth rate characteristics of tungsten grown on single crystal silicon and polycrystalline silicon are
It is determined by the ratio of 4/WF6. In particular, when the ratio is within the range of 0.7 to 0.9, the tungsten growth rate changes rapidly, and for example, when the ratio is 0.8, the growth rate is doubled as described above.

FIG. 2 shows a cross-sectional view of the metal wiring completed after performing the steps shown in FIGS. 1A to 1A.

In the figure, after carrying out the steps shown in the first diagram, an aluminum alloy layer 17 used in the metal wiring is formed by a conventional sputter link method.

That is, since the tungsten portions 16 are formed to the same height, the height difference above the contact regions X and Y is significantly leveled, and the thickness of the aluminum alloy layer 17 becomes uniform.

Therefore, since the tungsten portion 16 is formed above the contact areas X and Y, the ohmic resistance becomes relatively small.
The operating speed of semiconductor devices can be improved.

In addition, since it is possible to differentially deposit and grow tungsten by overcoming the difference in depth caused by the difference in depth between the contact areas XSY, the coating performance between the contact areas X and Y can be maintained sufficiently, and the Even if it is used for a long period of time, the aluminum alloy layer] 7 will not break.

In the above, in this embodiment, the depth of the contact area X is twice the depth of the contact area Y, but by appropriately setting the ratio of SiH4/WF6 within the range of 0.7 to 0.9,
Even if the ratio between the depth of the contact area X and the depth of the contact area Y changes, it can be adequately coped with.

Furthermore, in this embodiment, the performance of tungsten to cover steps caused by differences in depth between contact regions of memory elements of a DRAM has been mainly described, but the present invention can also be applied to cases where steps exist between different semiconductor devices.

The present invention is not limited to the above-described embodiments, but can be implemented in any appropriate manner by making appropriate design changes.

[Effects of the Invention] As explained above, according to the present invention, the steps of forming a first contact region electrically connected to the semiconductor substrate on the semiconductor substrate and wiring a bit line having a tungsten silicide layer are performed. depositing a polycrystalline silicon layer on top of the bit line; forming a second contact region on top of the polysilicon layer; and forming a pre-adjusted composition on the first contact region and the second contact region. The reactant gas is deposited by chemical vapor deposition (CV).
D) is comprised of a step of differentially depositing and growing a tungsten portion, and a step of depositing an aluminum alloy layer on top of the tungsten portion, so that tungsten is selectively deposited in contact areas having different depths. When evaporating tungsten, it is possible to evaporate the tungsten so that it has a uniform surface height.

[Brief explanation of drawings]

Figures 1A to 1A are cross-sectional views of metal wiring sequentially showing the differential growth process of tungsten manufactured according to an embodiment of the present invention, and Figure 2 is the same as Figures 1A to 1A. FIG. 3 is a cross-sectional view of the metal wiring completed after performing the steps shown, and FIG. 3 is a cross-sectional view showing the metal wiring formed by selective chemical vapor deposition using a conventional method. ... Semiconductor substrate 2 ... Bonding layer 3 ... Insulating film 14, 8 ... Polycrystalline silicon layer 5 ... Tungsten silicide layer] ... Tungsten part FIG, IC FIG, ID FIG, IA FIG ,2 FIG.3

Claims (5)

[Claims] (1) A first electrode on a semiconductor substrate electrically connected to the substrate.
forming a contact region; routing a bit line with a tungsten silicide layer and depositing a polysilicon layer on top of the bit line; forming a second contact region on top of the polysilicon layer. , growing a tungsten portion by differentially depositing a reactive gas whose composition has been adjusted in advance on the first contact region and the second contact region using a chemical vapor deposition method (CVD); and depositing an aluminum alloy layer. 2. The method of differential growth of tungsten in selective chemical vapor deposition as claimed in claim 1, wherein the first contact region is formed on a single crystal silicon bonding layer. (3) The tungsten silicide layer of the bit line is made of polycrystalline silicon (Si) or molybdenum silicide (Mo-Si).
, tungsten (W), titanium (Ti), titanium silicide (Ti-Si), or an aluminum alloy. Method. (4) The reaction gas is a mixture of silane (SiH_4) and tungsten hexafluoride (WF_6), with a mixing ratio of Si
A method for differential growth of tungsten in selective chemical vapor deposition according to claim 1, characterized in that H_4/WF_6 is in the range of 0.7 to 0.9. (5) The reaction gas is a mixture of silane (SiH_4) and tungsten hexafluoride (WF_6), with a mixing ratio of Si
A method for differential growth of tungsten in selective chemical vapor deposition according to claim 1 or 4, characterized in that H_4/WF_6 is 0.8.