JPH0466883A - Monitor burn-in apparatus - Google Patents

Monitor burn-in apparatus

Info

Publication number
JPH0466883A
JPH0466883A JP2181005A JP18100590A JPH0466883A JP H0466883 A JPH0466883 A JP H0466883A JP 2181005 A JP2181005 A JP 2181005A JP 18100590 A JP18100590 A JP 18100590A JP H0466883 A JPH0466883 A JP H0466883A
Authority
JP
Japan
Prior art keywords
socket
burn
board
results
monitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2181005A
Other languages
Japanese (ja)
Inventor
Hiromi Takano
高野 裕美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP2181005A priority Critical patent/JPH0466883A/en
Publication of JPH0466883A publication Critical patent/JPH0466883A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable the detecting of deficiency in a burn-in board or a socket by providing a memory to store the results of a monitoring history for several times of testing for each burn-in board and each socket. CONSTITUTION:A monitor burn-in device section 1 performs a burn-in testing of an IC and monitors 4 the results thereof. Here, the device section 1 is provided with a socket history memory 6, which is made up of a memory map 7 per serial number of a burn-in board 2 and corresponding to sockets in the board 2 individually and the results of each test are stored for each socket. A parameter is set and a socket is considered as defective depending on how many times the same socket of the same board 2 is rejected continuously. In other words, a continuous deficiency matrix value 8 is provided and a judging circuit 9 compares with the set value a defective level for each socket as outputted from the device 6 to judge deficiency of the socket. This clarifies the number of the burn-in board or the socket which causes abnormality continuously or many times thereby enabling judgment of abnormality in the IC or the socket.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体集積回路く以下ICと呼ぶ)のバーンイ
ン試験装置に関し、特にモニタバーンイン装置に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a burn-in test device for semiconductor integrated circuits (hereinafter referred to as IC), and particularly to a monitor burn-in device.

〔従来の技術〕[Conventional technology]

従来、この種のモニタバーンイン装置は、第3図の構成
図に示すように、モニタバーンイン装置部1に実装され
た各バーンインボード2の各ソケット毎のICに特性試
験回路3から試験信号を供給し、ICの電気的特性上の
異常がモニタ回路4で検出されると、このデータを記憶
するRAMメモリ5ヘバーンインボード番号とソケット
番号(Al・・・・・・Nn)で指定されるアドレスへ
フェイルデータが記憶される。
Conventionally, this type of monitor burn-in device supplies a test signal from a characteristic test circuit 3 to each IC of each socket of each burn-in board 2 mounted on the monitor burn-in device section 1, as shown in the configuration diagram of FIG. However, when an abnormality in the electrical characteristics of the IC is detected by the monitor circuit 4, the address specified by the RAM memory 5 Heburn inboard number and socket number (Al...Nn) stores this data. The fail data is stored.

バーンイン終了後、バーンイン中に異常となった IC
の実装されているバーンインボード番号とソケット番号
をプリントアウトして、そのプリントアウトデータに従
い不良となったバーンインボード上のICを取り除き区
分している。そのメモリ上のフェイルマツプは、試験回
数毎の累積は行っておらず、次のバーンイン時は消失後
上書きされてしまう。
After the burn-in is completed, the IC that became abnormal during the burn-in
The burn-in board number and socket number on which the burn-in board is mounted are printed out, and the defective ICs on the burn-in board are removed and classified according to the printout data. The fail map in the memory is not accumulated for each test count, and will be erased and overwritten at the next burn-in.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のモニタバーンイン装置は、バーンインボ
ードあるいはソケットに異常があるために不良となって
も、ICによる異常と区分することができないという欠
点がある。
The conventional monitor burn-in device described above has a drawback in that even if the burn-in board or socket becomes defective due to an abnormality, it cannot be distinguished from the abnormality due to the IC.

即ち、ソケット異常の場合、その部分のICは例え良品
であっても判定としては毎回不良となり、コストアップ
につながってしまう。従って連続して同一バーンインボ
ードの同一ソケットのICが不良となった場合は、ソケ
ット異常の確率が高いと見なし、早期に保守を行う必要
がある。
That is, in the case of a socket abnormality, even if the IC in that part is a good product, it is determined to be defective every time, leading to an increase in costs. Therefore, if ICs in the same socket on the same burn-in board become defective consecutively, it is assumed that there is a high probability that the socket is abnormal, and maintenance must be performed at an early stage.

上述した従来のモニタバーンイン装置に対し、本発明は
バーンインボード毎およびソケット毎に試験回数分のモ
ニタ履歴結果をもち、バーンインボードまたはソケット
の不良を検出できるという相違点を有する。
The present invention differs from the conventional monitor burn-in device described above in that it has monitor history results for the number of tests for each burn-in board and socket, and can detect defects in burn-in boards or sockets.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のモニタバーンイン装置は、バーンインボード毎
およびソケット毎に試験回数分のモニタ履歴結果を格納
できる記憶装置と、その結果によリバーンインボード不
良またはソケット不良を判定する為の回路手段とを有し
ている。
The monitor burn-in device of the present invention includes a storage device capable of storing monitor history results for the number of tests for each burn-in board and each socket, and circuit means for determining whether the burn-in board is defective or the socket is defective based on the results. are doing.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例のシステム構成図で、従来の
モニタバーンイン装置に本発明を付加した構成となって
いる。
FIG. 1 is a system configuration diagram of an embodiment of the present invention, in which the present invention is added to a conventional monitor burn-in device.

従来の技術で述べたように、従来のモニタバーンイン装
置部1は、バーンイン機能の他にバーンインボード2上
にソケットを介して実装されているICへ試験信号を供
給する特性試験回路3、その結果をモニタするモニタ回
路4およびモニタ結果を一時的に記憶するRAMメモリ
5等により構成されている。
As described in the related art section, the conventional monitor burn-in device section 1 has, in addition to the burn-in function, a characteristic test circuit 3 that supplies test signals to ICs mounted on the burn-in board 2 via sockets, It is comprised of a monitor circuit 4 that monitors the data, a RAM memory 5 that temporarily stores the monitoring results, and the like.

従来は、このRAMメモリ5上のフェイルマツプよりバ
ーンインボード2上の不良ICを知ることができる。ま
たは−船釣に複数のバーンインボード2を区分するため
に、バーンインボード2上にはダイオードマトリクス等
によりバーンインボード2のシリアルナンバーを形成し
、電気的にこれを知ることができる様にもなっている。
Conventionally, defective ICs on the burn-in board 2 can be known from the fail map on the RAM memory 5. Or - In order to classify a plurality of burn-in boards 2 for boat fishing, a serial number of each burn-in board 2 is formed on the burn-in board 2 using a diode matrix, etc., and this can be known electrically. There is.

ここで本実施例はソケット履歴記憶装置6を有し、1個
のソケット情報として、想定する試験回数に相当するビ
ット数をもち、これがバーンインボード2のシリアルナ
ンバー毎かつバーンインボード2内のソケット(Al・
・・・・・Nn)にそれぞれ対応する様なメモリマツプ
7で構成されているものとする。また、同一バーンイン
ボード2の同一ソケットが、何回連続して不良となれば
ソケット不良と見なすかを設定するパラメータ、即ち連
続不良設定値8を置き、そのパラメータ値とソケット履
歴記憶装置6からでてくるソケット毎不良状況とを比較
し、ソケット不良を判定する判定回路9および結果を出
力する出力回路10をもつ。
Here, this embodiment has a socket history storage device 6, which has the number of bits corresponding to the expected number of tests as one piece of socket information, and this is stored for each serial number of the burn-in board 2 and for each socket in the burn-in board 2 ( Al・
. . .Nn), respectively. In addition, a parameter for setting the number of consecutive failures of the same socket on the same burn-in board 2 to be considered as a socket failure, that is, a continuous failure setting value 8, is set, and the value of the parameter and the socket history storage device 6 are set. It has a determination circuit 9 that compares the failure status of each socket and determines whether the socket is defective, and an output circuit 10 that outputs the result.

第2図(a)、(b)はメモリマツプ7を説明するため
の個々のソケット(またはIC)に対応するビットマツ
プ図である。この場合、各ビットが一使用回数毎の良・
不良結果(例;0=良品、1=不良)を示し、下位から
上位に向って記録されていくものとする。当然各ソケッ
トに対応するビット数は、前述した如く想定する試験回
数に耐え得る分は確保されているとする。ここで連続不
良設定値8の値を°°3″と設定した場合、図(a)の
ビットマツプ11にはこの条件即ち不良(1″)が3回
以上連続しておらず、この場合はソケット不良の可能性
はないものとし、一方、図(b)のビットマツプ12は
この条件を満たしているため該当するソケットを不良と
判定し、出力回路10によりソケット修理を促す。
FIGS. 2(a) and 2(b) are bitmap diagrams corresponding to individual sockets (or ICs) for explaining the memory map 7. FIG. In this case, each bit has a good value for each number of uses.
Defective results (eg, 0=good, 1=defective) are shown and are recorded from the lowest to the highest. Naturally, it is assumed that the number of bits corresponding to each socket is sufficient to withstand the expected number of tests as described above. Here, if the value of continuous failure setting value 8 is set to °°3'', this condition, that is, failure (1'') does not occur three or more times in a row in the bit map 11 in Figure (a), and in this case, the socket It is assumed that there is no possibility of a defect, and on the other hand, since the bitmap 12 in FIG. 12(b) satisfies this condition, the corresponding socket is determined to be defective, and the output circuit 10 prompts the socket to be repaired.

本発明の応用例として、第1図中のソケット履歴記憶装
置6.連続不良設定値82判定回路9゜出力回路10で
構成されるソケット不良検出部は、従来のモニタバーン
イン装置部1とは完全に切り離し、各間をLANまたは
フロッピー媒体等で情報のやり取りをすることも当然可
能である。
As an application example of the present invention, socket history storage device 6. The socket defect detection section consisting of the continuous failure set value 82 judgment circuit 9 and the output circuit 10 is completely separated from the conventional monitor burn-in device section 1, and information is exchanged between them via LAN or floppy media. Of course it is also possible.

またはソケット不良検出部をフェイルマツプ情報として
扱い、バーンインボードがらICを抜去する際の良・不
良品のカテゴリ分類にも活用できる。
Alternatively, the socket defect detection section can be treated as fail map information and used to categorize good and defective products when removing ICs from burn-in boards.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ICおよびソケットの異
常データを記憶回路に記憶し各バーンインボードの各ソ
ケット毎に履歴をとることができるので、連続または多
発して異常となっているバーンインボード番号とソケッ
ト番号が判明し、ICまたはソケットの異常を区別する
ことができるという効果がある。
As explained above, the present invention can store IC and socket abnormality data in a storage circuit and record a history for each socket of each burn-in board. This has the advantage that the socket number can be determined, and an abnormality in the IC or socket can be distinguished.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のシステム構成図、第2図(
a)、(b)はそのビットマツプ図、第3図は従来のモ
ニタバーンイン装置の構成図である。 11.、モニタバーンイン装置部、2・・・バーンイン
ボード、3・・・測定試験回路、4・・・モニタ回路、
5・・・RAMメモリ、6・・・ソケット履歴記憶装置
、7・・・メモリマツプ、8・・・連続不良設定値、9
・・・判定回路、10・・・出力回路、11・・・ビッ
トマツプ、12・・・ビットマツプ。
Figure 1 is a system configuration diagram of an embodiment of the present invention, and Figure 2 (
FIG. 3 is a block diagram of a conventional monitor burn-in device. 11. , monitor burn-in device section, 2... burn-in board, 3... measurement test circuit, 4... monitor circuit,
5... RAM memory, 6... Socket history storage device, 7... Memory map, 8... Continuous failure setting value, 9
... Judgment circuit, 10... Output circuit, 11... Bitmap, 12... Bitmap.

Claims (1)

【特許請求の範囲】 1、半導体集積回路バーンイン試験を行ないその結果を
モニタするモニタバーンイン装置において、各バーンイ
ンボードの各ソケット毎に毎回の試験結果を蓄積保存す
る記憶手段とそれを読み出す回路手段とを具備したこと
を特徴とするモニタバーンイン装置。 2、記憶された試験結果によりバーンインボード不良ま
たはソケット不良を判定する回路手段を有する請求項1
記載のモニタバーンイン装置。
[Scope of Claims] 1. A monitor burn-in device that performs a semiconductor integrated circuit burn-in test and monitors the results, comprising a storage means for accumulating and storing the test results for each socket of each burn-in board, and a circuit means for reading them. A monitor burn-in device characterized by comprising: 2. Claim 1, further comprising circuit means for determining burn-in board failure or socket failure based on stored test results.
Monitor burn-in equipment as described.
JP2181005A 1990-07-09 1990-07-09 Monitor burn-in apparatus Pending JPH0466883A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2181005A JPH0466883A (en) 1990-07-09 1990-07-09 Monitor burn-in apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2181005A JPH0466883A (en) 1990-07-09 1990-07-09 Monitor burn-in apparatus

Publications (1)

Publication Number Publication Date
JPH0466883A true JPH0466883A (en) 1992-03-03

Family

ID=16093075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2181005A Pending JPH0466883A (en) 1990-07-09 1990-07-09 Monitor burn-in apparatus

Country Status (1)

Country Link
JP (1) JPH0466883A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6715114B2 (en) * 1999-06-10 2004-03-30 Fujitsu Limited Test method and apparatus for semiconductor device
JP2006214892A (en) * 2005-02-04 2006-08-17 Fujitsu Ltd Method of testing semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54162475A (en) * 1978-06-13 1979-12-24 Nec Corp Inspection unit for semiconductor device
JPS6488168A (en) * 1987-06-01 1989-04-03 Reliability Inc Burn-in apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54162475A (en) * 1978-06-13 1979-12-24 Nec Corp Inspection unit for semiconductor device
JPS6488168A (en) * 1987-06-01 1989-04-03 Reliability Inc Burn-in apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6715114B2 (en) * 1999-06-10 2004-03-30 Fujitsu Limited Test method and apparatus for semiconductor device
JP2006214892A (en) * 2005-02-04 2006-08-17 Fujitsu Ltd Method of testing semiconductor device

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