CN113281633A - Chip testing equipment and chip testing process stacking or blocking inspection method thereof - Google Patents
Chip testing equipment and chip testing process stacking or blocking inspection method thereof Download PDFInfo
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- CN113281633A CN113281633A CN202110577196.0A CN202110577196A CN113281633A CN 113281633 A CN113281633 A CN 113281633A CN 202110577196 A CN202110577196 A CN 202110577196A CN 113281633 A CN113281633 A CN 113281633A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2894—Aspects of quality control [QC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/01—Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass production; Testing objects at points as they pass through a testing station
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/54—Testing for continuity
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- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention discloses a chip testing device, wherein an open-short circuit testing module is used for carrying out open-short circuit testing on a chip to be tested placed in a testing groove; the chip identification reading module is used for reading the identification in the register of the chip to be tested and then updating and storing the identification in the reference identification register of the chip testing equipment when the open short circuit testing module completes the open short circuit test on the chip to be tested placed in the testing groove; if the identification of the chip to be detected read currently by the chip identification reading module is the same as the identification stored in the identification register, the controller outputs the information of material overlapping or material blocking. The invention also discloses a material overlapping or blocking inspection method in the chip testing process of the chip testing equipment. The invention is convenient for test engineers to find the chip stacking or blocking in time.
Description
Technical Field
The invention relates to a chip testing technology, in particular to a chip testing device and a chip testing (Final Test, namely FT) process material stacking or material blocking inspection method thereof.
Background
Due to market demands, the design size of part of chips is small, so that the chips are easy to be stacked or blocked in a mechanical Test (Final Test) process.
The stacking phenomenon, that is, two chips are stacked up and down in a test socket (socket), results in that the chip below the test socket is actually tested twice, and the chip above the test socket is actually not tested but is driven into a braid as a good test product to flow into the market.
The material jamming phenomenon, that is, a chip is jammed in the test socket, may cause the chip to be tested continuously.
The current general material stacking phenomenon detection method is to monitor material stacking through hardware detection equipment (sensor), when a product exists in a test seat of a test machine, a gap between a press rod and the hardware detection equipment is provided with one product, and at the moment, a machine table of the test machine alarms material stacking.
The chinese patent application cn201911124364.x discloses a cn201911124364.x stacking prevention IC testing apparatus, as shown in fig. 1 and fig. 4, which comprises a rack, a lifting and pressing device 20, a testing seat 30, a main controller and a stacking prevention detection device 42, the lifting and pressing device 20, the testing seat 30 and the stacking prevention detection device 42 are installed at different positions on the rack, the testing seat 30 is provided with a testing slot 31 for accommodating chips, the stacking prevention detection device 42 is located below the lifting and pressing device 20, the main controller is electrically connected with the lifting and pressing device 20 and the stacking prevention detection device 42, the main controller controls the lifting and pressing device 20 to load or unload chips onto the testing slot 31, the stacking prevention detection device 42 detects that the chips are stored in the testing slot 31 and detects that the lifting and pressing device 20 is in an open circuit state when leaving the chip picking position, the main controller controls the anti-overlapping IC testing equipment to stop according to the open circuit state, so that the chip testing is completed, the lifting and pressing device 20 executes the action of taking away the chips in the test slot 31, if the chips are left in the test slot 31, the machine cannot run until the chips are left, the risk that the chips are stacked and the chips are not tested and then flow out is avoided, and the product quality is improved. This prevent folding material IC test equipment, whether chip folding material appears in the test groove 31 is judged to the break-make state that prevents folding material detection device 42 through hardware, and is with high costs, and the structure is complicated.
Disclosure of Invention
The invention aims to provide a chip testing device and a chip testing process stacking or blocking inspection method thereof, which are convenient for a test engineer to find the stacking or blocking of chips in time.
In order to solve the technical problem, the chip testing device provided by the invention comprises a testing seat, an open short circuit testing module, a chip identification reading module, a reference identification register and a controller;
the test seat is provided with a test slot for accommodating a chip and is used for placing the chip to be tested;
the open short circuit testing module is used for carrying out open short circuit testing on the chip to be tested placed in the testing groove;
the chip identification reading module is used for reading the identification in the register of the chip to be tested and then updating and storing the identification in the reference identification register of the chip testing equipment when the open short circuit testing module completes the open short circuit test on the chip to be tested placed in the testing groove;
and the controller outputs the information of material overlapping or material blocking phenomenon if the identification of the chip to be detected read currently by the chip identification reading module is the same as the identification stored in the identification register.
Preferably, the chip testing equipment further comprises an identification writing module;
and the identification writing module is used for writing a unique identification into a register of the chip when the CP test is carried out on the chip.
Preferably, if the identifier of the chip to be detected read by the chip identifier reading module is the same as the identifier stored in the identifier register, the controller outputs information about the occurrence of the material stacking or material blocking phenomenon to a display for display, or outputs information about the occurrence of the material stacking or material blocking phenomenon to an audio generator for giving an alarm sound, or outputs information about the occurrence of the material stacking or material blocking phenomenon to control an alarm indicator lamp to light up or flash.
Preferably, the chip testing equipment further comprises a rack and a lifting and pressing device arranged on the rack;
the test seat is positioned below the lifting pressing and taking device;
the main controller can control the lifting and pressing device to load or unload the chip on the test slot of the test seat;
and the main controller controls the lifting and pressing device to stop when information about material stacking or material blocking is output.
The material overlapping or blocking inspection method in the chip testing process of the chip testing equipment comprises the following steps:
a test engineer writes a unique identifier into a register of the chip when the CP test is performed on the chip through the identifier writing module;
secondly, a test engineer performs open-short circuit test on the chip to be tested placed in the test slot through the open-short circuit test module;
the chip identification reading module reads the identification of the chip to be detected and then updates and stores the identification in a reference identification register of the chip testing equipment when the open short circuit testing module completes the open short circuit test on the chip to be detected placed in the testing groove;
and if the identifier of the chip to be detected currently read by the chip identifier reading module is the same as the identifier stored in the reference identifier register of the chip testing equipment, the controller outputs the information of the phenomenon of material overlapping or material blocking.
Preferably, in the fourth step, if the identifier of the chip to be tested currently read by the chip identifier reading module is different from the identifier stored in the reference identifier register of the chip testing device, the controller outputs information indicating that no material stacking or material blocking occurs.
Preferably, if the controller outputs information that no material stacking or material blocking occurs, a test engineer tests the characteristic parameters of the chip through the chip test equipment, and if the chip meets the requirements, the chip is determined to be good.
The chip testing equipment provided by the invention adopts a software program setting mode, can detect whether the material overlapping or material blocking phenomenon occurs in the chip FT testing process in the aspect of software, thereby prompting a testing engineer to generate the material overlapping or material blocking phenomenon, facilitating the testing engineer to find the material overlapping or material blocking of the chip in time, screening out the overlapped or material blocking chip, improving the reliability of the chip FT testing, playing a role in secondary inspection on the basis of monitoring of hardware equipment in a testing plant, achieving the purpose of blocking out an untested chip when the hardware equipment in the testing plant cannot monitor abnormity, and effectively preventing the untested chip and the chip damaged by the material overlapping or material blocking phenomenon from flowing into the market.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the present invention are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a conventional stack-proof IC testing apparatus;
FIG. 2 is a schematic structural diagram of a chip testing apparatus according to the present invention.
Detailed Description
The technical solutions in the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
As shown in fig. 2, the chip testing apparatus includes a testing socket, an open-short testing module, a chip identifier reading module, a reference identifier register, and a controller;
the test seat is provided with a test slot for accommodating a chip and is used for placing the chip to be tested;
the open short circuit testing module is used for carrying out open short circuit (open short) testing on the chip to be tested which is placed in the testing slot;
the chip identification reading module is used for reading the identification in the register of the chip to be detected and then updating and storing the identification in the reference identification register of the chip testing equipment when the open short circuit testing module completes open short circuit (open short) testing on the chip to be detected placed in the testing groove;
the controller outputs the information of the phenomenon of material stacking or material blocking if the identification of the chip to be detected read by the chip identification reading module at present is the same as the identification stored in the identification register; if the identification of the chip to be detected read currently by the chip identification reading module is different from the identification stored in the identification register, the phenomenon of material overlapping or material blocking does not occur, and information without the phenomenon of material overlapping or material blocking is output.
If the identification of the chip to be detected read currently by the chip identification reading module is different from the identification stored in the reference identification register, the phenomenon of material overlapping or material blocking does not occur, and information without the phenomenon of material overlapping or material blocking is output.
Preferably, the chip testing equipment further comprises an identification writing module;
the identifier writing module is configured to write a unique identifier into a register of the chip when performing a CP test (wafer test or intermediate test) on the chip.
The method for checking the overlapping or blocking of the chip in the chip testing process of the chip testing equipment comprises the following steps:
a test engineer writes a unique identifier into a register of a chip when performing a CP test (wafer test or intermediate test) on the chip through the identifier writing module;
secondly, a test engineer performs open short circuit (open short) test on the chip to be tested placed in the test slot through the open short circuit test module;
the chip identification reading module reads the identification of the chip to be detected and then updates and stores the identification in a reference identification register of the chip testing equipment when the open short circuit testing module completes open short circuit (open short) testing on the chip to be detected placed in the testing groove;
the controller outputs the information of the occurrence of the material overlapping or material blocking phenomenon if the identification of the chip to be detected read by the chip identification reading module at present is the same as the identification stored in the reference identification register of the chip testing equipment; if the identification of the chip to be detected read currently by the chip identification reading module is different from the identification stored in the reference identification register of the chip testing equipment, the phenomenon of material overlapping or material blocking does not occur, and information without the phenomenon of material overlapping or material blocking is output.
Preferably, if the controller outputs information that no material stacking or material blocking occurs, a test engineer tests the characteristic parameters of the chip through the chip test equipment, and if the chip meets the requirements, the chip is determined to be good.
The chip testing device according to the first embodiment is used for checking whether overlapping or blocking exists in a chip FT testing process, and first, when a CP (Circuit testing or intermediate testing) is performed on a chip, a test engineer writes a unique identifier into a register of the chip through program setting (identifier writing module), and after an open short Circuit (open short) test is completed on the chip to be tested placed in a test slot by an open short Circuit testing module, the program setting (chip identifier reading module) automatically reads the identifier of the chip to be tested and then updates the reference identifier register stored in the chip testing device; the program-set chip identification reading module compares the currently read identification of the chip to be tested with the identification (the unique identification of the previous test chip) stored in the reference identification register of the chip test equipment, if the currently read identification of the chip to be tested by the chip identification reading module is the same as the identification (the unique identification of the previous test chip) stored in the reference identification register of the chip test equipment, the controller outputs overlapping or material blocking phenomenon generation information to prompt whether the overlapping or material blocking phenomenon exists in the chip FT test process, and the chip positioned below the test slot is actually tested twice or even for many times; if the identification of the chip to be tested read currently by the chip identification reading module is different from the identification (the unique identification of the last test chip) stored in the reference identification register of the chip test equipment, the phenomenon of material overlapping or material blocking does not occur in the chip FT test process, and the controller can output information without the phenomenon of material overlapping or material blocking.
The chip testing equipment provided by the embodiment adopts a software program setting mode, whether the phenomenon of material overlapping or material blocking occurs in the chip FT testing process can be checked in the aspect of software, so that a testing engineer is prompted to have the phenomenon of material overlapping or material blocking, the testing engineer can conveniently find the phenomenon of material overlapping or material blocking of chips in time, the chips with the material overlapping or material blocking are screened out, the reliability of the chip FT testing is improved, the secondary checking function can be realized on the basis of the monitoring of hardware equipment in a testing plant, the purpose of blocking out untested products can be achieved when the hardware equipment in the testing plant cannot be monitored abnormally, and the untested chips and the chips damaged due to the phenomenon of material overlapping or material blocking are effectively prevented from flowing into the market.
Example two
Based on the chip test equipment of implementing one, the controller, if the current sign of waiting to examine the chip that reads of chip sign read module is the same with the sign of storage in the identification register, then output and fold material or card material phenomenon and take place information and show to the display, perhaps output and fold material or card material phenomenon and take place information and send out the sound of reporting an emergency and asking for help or increased vigilance to audio generator, perhaps output and fold material or card material phenomenon and take place information control warning pilot lamp and light or flash.
EXAMPLE III
Based on the chip testing equipment implementing the first step, the chip testing equipment further comprises a rack and a lifting and pressing device arranged on the rack;
the test seat is positioned below the lifting pressing and taking device;
the main controller can control the lifting and pressing device to load or unload the chip on the test slot of the test seat;
and the main controller controls the lifting and pressing device to stop when information about material stacking or material blocking is output.
And if the third chip testing device is implemented, if the phenomenon of material stacking or material blocking is detected in the chip FT testing process, the lifting and pressing device stops running until the material stacking or material blocking condition is eliminated, the lifting and pressing device can continue running, the risk that chips flow out before being tested due to the fact that the chips are stacked or blocked is avoided, and the product quality is improved.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (7)
1. A chip test device is characterized by comprising a test seat, an open short circuit test module, a chip identification reading module, a reference identification register and a controller;
the test seat is provided with a test slot for accommodating a chip and is used for placing the chip to be tested;
the open short circuit testing module is used for carrying out open short circuit testing on the chip to be tested placed in the testing groove;
the chip identification reading module is used for reading the identification in the register of the chip to be tested and then updating and storing the identification in the reference identification register of the chip testing equipment when the open short circuit testing module completes the open short circuit test on the chip to be tested placed in the testing groove;
and the controller outputs the information of material overlapping or material blocking phenomenon if the identification of the chip to be detected read currently by the chip identification reading module is the same as the identification stored in the identification register.
2. The chip test apparatus according to claim 1,
the chip test equipment also comprises an identification writing module;
and the identification writing module is used for writing a unique identification into a register of the chip when the CP test is carried out on the chip.
3. The chip test apparatus according to claim 1,
the controller outputs the information generated by the material overlapping or material blocking phenomenon to the display to display if the mark of the chip to be detected read currently by the chip mark reading module is the same as the mark stored in the mark register, or outputs the information generated by the material overlapping or material blocking phenomenon to the audio generator to send out warning sound, or outputs the information generated by the material overlapping or material blocking phenomenon to control the warning indicator lamp to light or flash.
4. The chip test apparatus according to claim 1,
the chip testing equipment also comprises a rack and a lifting and pressing device arranged on the rack;
the test seat is positioned below the lifting pressing and taking device;
the main controller can control the lifting and pressing device to load or unload the chip on the test slot of the test seat;
and the main controller controls the lifting and pressing device to stop when information about material stacking or material blocking is output.
5. The method for inspecting the stack or the card in the chip testing process of the chip testing device according to claim 1, 2, 3 or 4, comprising the steps of:
a test engineer writes a unique identifier into a register of the chip when the CP test is performed on the chip through the identifier writing module;
secondly, a test engineer performs open-short circuit test on the chip to be tested placed in the test slot through the open-short circuit test module;
the chip identification reading module reads the identification of the chip to be detected and then updates and stores the identification in a reference identification register of the chip testing equipment when the open short circuit testing module completes the open short circuit test on the chip to be detected placed in the testing groove;
and if the identifier of the chip to be detected currently read by the chip identifier reading module is the same as the identifier stored in the reference identifier register of the chip testing equipment, the controller outputs the information of the phenomenon of material overlapping or material blocking.
6. The method of claim 5, wherein the chip testing process stack or card inspection,
in the fourth step, if the identifier of the chip to be tested read currently by the chip identifier reading module is different from the identifier stored in the reference identifier register of the chip testing equipment, the controller outputs information without material overlapping or material blocking.
7. The method of claim 5, wherein the chip testing process stack or card inspection,
if the controller outputs information that no material stacking or material blocking occurs, a test engineer tests the characteristic parameters of the chip through the chip test equipment, and if the chip meets the requirements, the chip is judged to be a good product.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110577196.0A CN113281633A (en) | 2021-05-26 | 2021-05-26 | Chip testing equipment and chip testing process stacking or blocking inspection method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110577196.0A CN113281633A (en) | 2021-05-26 | 2021-05-26 | Chip testing equipment and chip testing process stacking or blocking inspection method thereof |
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| CN113281633A true CN113281633A (en) | 2021-08-20 |
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| CN202110577196.0A Pending CN113281633A (en) | 2021-05-26 | 2021-05-26 | Chip testing equipment and chip testing process stacking or blocking inspection method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113281634A (en) * | 2021-05-26 | 2021-08-20 | 普冉半导体(上海)股份有限公司 | Chip testing equipment and chip testing process stacking or blocking inspection method thereof |
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2021
- 2021-05-26 CN CN202110577196.0A patent/CN113281633A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113281634A (en) * | 2021-05-26 | 2021-08-20 | 普冉半导体(上海)股份有限公司 | Chip testing equipment and chip testing process stacking or blocking inspection method thereof |
| CN113281634B (en) * | 2021-05-26 | 2024-05-24 | 普冉半导体(上海)股份有限公司 | Chip testing equipment and chip testing process stacking or clamping checking method thereof |
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