JPH0466817U - - Google Patents

Info

Publication number
JPH0466817U
JPH0466817U JP11012990U JP11012990U JPH0466817U JP H0466817 U JPH0466817 U JP H0466817U JP 11012990 U JP11012990 U JP 11012990U JP 11012990 U JP11012990 U JP 11012990U JP H0466817 U JPH0466817 U JP H0466817U
Authority
JP
Japan
Prior art keywords
counter
generation circuit
signal generation
down counter
clock oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11012990U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11012990U priority Critical patent/JPH0466817U/ja
Publication of JPH0466817U publication Critical patent/JPH0466817U/ja
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)

Description

【図面の簡単な説明】
第1図は本考案の第1の実施例のブロツク図、
第2図は本考案の第2の実施例を使用した画像信
号処理装置のブロツク図である。 1……クロツク発振器、2……イネーブル信号
生成回路、3,4……分周器、5……ランダムロ
ジツク、31〜3m……アツプカウンタ、41〜
4n……ダウンカウンタ。

Claims (1)

  1. 【実用新案登録請求の範囲】 1 アツプカウンタからなる第1の分周器と、ダ
    ウンカウンタからなる第2の分周器と、前記アツ
    プカウンタおよびダウンカウンタを共通に駆動す
    るクロツク発振器と、前記アツプカウンタおよび
    ダウンカウンタを同時に動作開始させるイネーブ
    ル信号生成回路とを備えたことを特徴とするタイ
    ミング信号生成回路。 2 前記第1および第2の分周器の出力信号を入
    力するランダムロジツクを含むことを特徴とする
    請求項1記載のタイミング信号生成回路。
JP11012990U 1990-10-19 1990-10-19 Pending JPH0466817U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11012990U JPH0466817U (ja) 1990-10-19 1990-10-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11012990U JPH0466817U (ja) 1990-10-19 1990-10-19

Publications (1)

Publication Number Publication Date
JPH0466817U true JPH0466817U (ja) 1992-06-12

Family

ID=31857420

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11012990U Pending JPH0466817U (ja) 1990-10-19 1990-10-19

Country Status (1)

Country Link
JP (1) JPH0466817U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013034119A (ja) * 2011-08-02 2013-02-14 Mitsubishi Electric Corp 位相比較装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5015102A (ja) * 1973-06-11 1975-02-18
JPS53109452A (en) * 1977-03-07 1978-09-25 Toshiba Corp Timing signal generating circuit
JPS59166918A (ja) * 1983-03-14 1984-09-20 Seiko Epson Corp 記憶型アクテイブパネル用表示システム

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5015102A (ja) * 1973-06-11 1975-02-18
JPS53109452A (en) * 1977-03-07 1978-09-25 Toshiba Corp Timing signal generating circuit
JPS59166918A (ja) * 1983-03-14 1984-09-20 Seiko Epson Corp 記憶型アクテイブパネル用表示システム

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013034119A (ja) * 2011-08-02 2013-02-14 Mitsubishi Electric Corp 位相比較装置

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