JPH0464114A - Power supply controller for computer system - Google Patents

Abstract

PURPOSE:To improve efficiency for using a computer system as a whole by individually setting standby time corresponding to access enable standby time for each bulk device, and supplying power to the next step only after waiting for the lapse of irreducible minimum standby time when any bulk answer signal is not outputted. CONSTITUTION:Time changeover switches 17a-17d are provided respectively corresponding to bulk devices, and time corresponding to different access enable standby time for each bulk device is individually set as standby time. When a turn-on signal 7a is outputted from an output control circuit 21 through a relay output circuit 23 to the bulk device and any bulk answer signal 9a is not outputted within the standby time set by the timer change-over switch 17a, power supply turn-on sequence control is executed by the output control circuit 21, and a turn-on signal 7b is outputted through the relay output circuit 23 to the bulk device in the next step. Thus, time for turning-on power supply to the next step can be shortened, and efficiency for using the computer system can be improved.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a power supply control device that sequentially performs power-on control on a plurality of bulk devices in a computer system.
The present invention relates to a power supply control device that can efficiently turn on power to a bulk device.

(Prior Art) The power-on operation in a computer system will be explained with reference to FIG.

In FIG. 2, bulk devices 1a to 1d are devices that can be accessed after DC power is turned on.

The power supplies 1e to 1f are normal power supplies and are used for using DC power.

Here, the pulse generators 1a to 1d and the power supplies 1e to 1
f, DC power is ON when AC power 3 is applied.
The input signal 7a from the power supply control unit (PCU) 5
It turns ON by receiving ~7f. At this time, the PC
U5 controls the output of power-on signals 73-7f so that each device 18-1f is sequentially turned on in order to reduce the rush current when the power is turned on.

The bulk devices 1a to 1d require different accessible standby times after receiving the input signals 7a to 7d before becoming accessible.

Therefore, when the bulk devices 1a to 1d become accessible, the bulk devices ft1A to 1d are used to notify this to the PCU 5.
d, bulk answer signals 9a to 9d are output to the PCU 5.

A bulk answer monitoring circuit equipped with a timer is provided inside the PCU 5 to monitor for a certain period of time whether or not the bulk answer signals 9a to 9d are output from the bulk devices 1a to 1d.

Here, a conventional bulk answer monitoring circuit will be explained using FIG. 3.

In FIG. 3, receiving circuits 11a to 11d correspond to bulk devices 1a to 1d, respectively, and receive bulk answer signals 9a to 9d, and output them to OR gates 13a to 13d.

The timer 15 measures four types of time: 30 seconds, 1 minute, 2 minutes, and 4 minutes, and sends it to the timer changeover switch 17.

The timer changeover switch 17 selects only one type of time from four types of time measured by the timer 15, and sets this as the standby time. Furthermore, the timer selector switch 17 outputs a time-over signal 19 when the standby time is over, and the OR
Input to gates 13a to 13d.

The OR gates 13a to 13d are connected to the receiving circuits 11a to 13d.
Bulk answer signals 98 to 9d output from
The time over signal 19 output from the timer changeover switch 17 is received. Furthermore, the received signal is given to the output control circuit 21.

Output control circuit 21 receives signals from OR gates 13a to 13d, and outputs power-on control signals for bulk devices 1a to 1d to relay output circuit 23. The output control circuit 21 also outputs power-on control signals for the power supply devices 18 to 1f to the relay output circuit 23.

The relay output circuit 23 receives a power-on control signal from the output control circuit 21, and outputs power-on signals 7a to 7f to the bulk devices 1a to 1d and the power supplies dle to 1f.

The clock 25 is a control clock for synchronizing the timer 15 and the output control circuit 21.

The conventional bulk answer monitoring circuit is constructed in this way.Next, the operation of this bulk answer monitoring circuit will be explained.

First, when the clock 25 is input to the output control circuit 21, the input signal 7a is output from the output control circuit 21 to the bulk device 1a via the relay output circuit 23.

At the same time, the clock 25 is also input to the timer 15, and the timer 15 sets the time to 30 seconds and 1 minute.

Each time period of 2 minutes and 4 minutes is measured.

However, only one of these four types of time is selected by the timer changeover switch 17, and the selected time is set as the standby time.

The standby time set in step 4 is used for other bulk devices 1b to 1.
The waiting times of d are also all the same.

On the other hand, when the bulk device 1a to which the input signal 7a is input becomes accessible within the standby time set by the timer changeover switch 17, the bulk answer signal 9a is outputted from the bulk device 1a to the receiving circuit 1a.

The receiving circuit 1a which received the bulk answer signal 9a outputs this signal to the OR gate 13a.

Furthermore, this signal is applied to the output control circuit 21 from the OR gate 13a, and power-on sequence control is performed.

However, the bulk answer signal 9a may not be output from the bulk device 1a within the standby time set by the timer changeover switch 17 due to a failure of the bulk device 1a.

In this case, after the standby time has elapsed, the timer changeover switch 17 outputs a time-over signal 19, which is input to the OR gate 13a.

Time over signal 19 input to OR gate 13a
is further applied to the output control circuit 21 to perform power-on sequence control.

Therefore, when the bulk answer signal 9a is not output, power-on sequence control is not performed until the standby time set by the timer changeover switch 17 has elapsed.

Next, the output control circuit 21 to which the bulk answer signal 9a or the time-over signal 19 has been applied outputs the input signal 7b to the bulk device 1b via the relay output circuit 23.

At the same time, the timer 15 starts counting anew, and the timer changeover switch 17 sets the same time as the standby time previously set for the bulk device 1a.

On the other hand, as in the case of the bulk device 1a, when the bulk device 1b to which the input signal 7b is input becomes accessible within the standby time, the bulk device 1b outputs the bulk answer signal 9b to the reception circuit 11b.

However, if the bulk answer signal 9b is not output within the standby time, the timer changeover switch 17 outputs a time over signal 19.

Therefore, the power-on sequence control is not performed until the same standby time as when the bulk answer signal 9a is not output has elapsed.

In this way, the input signals 7b to 7d are sequentially inputted to the bulk devices 1c and ld by the same operation as in the case of the bulk devices 1a and lb.

In such a state, if the bulk devices 1a to 1d do not output the bulk answer signals 9a to 9d, the power cannot be turned on until the same standby time has elapsed each time until the time over signal 19 is output.

Note that the power supplies 1e to 1f that do not output bulk answer signals
, the input signal 7e is sequentially input to the bulk device 1d.
~7f is output.

(Problems to be Solved by the Invention) As described above, although the bulk devices 1a to 1d each require different accessible standby times, the timer changeover switch 17 allows all the bulk devices 1a to 1d to
However, only one type of waiting time can be set.

Therefore, in order to prevent the time-over signal 19 from being output before the bulk devices 1a to 1d become accessible, the waiting time is set according to the one with the longest accessible waiting time among the bulk devices 1a to 1d. There is a need to.

As a result, it takes more time than necessary to perform power-on sequence control for the next stage using a bulk device with a short accessible standby time.

This results in a delay in turning on the power to the next stage, and further causes a problem of lowering the usage efficiency of the entire computer system.

The present invention was developed in view of the above-mentioned conventional circumstances.The present invention sets a standby time commensurate with the accessible standby time, which differs for each bulk device, individually, and allows the bulk answer signal to be set individually for each bulk device. If there is no output, wait only the minimum necessary waiting time. This results in
It is an object of the present invention to provide a power supply control device that can shorten the time required to turn on power to the next stage and improve the usage efficiency of a computer system.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the present invention provides an access control system that can be accessed from a plurality of bulk devices that requires an access standby time after DC power is turned on. receiving means for receiving sequentially output accessible signals corresponding to each of the bulk devices; and receiving means for receiving an accessible signal that is sequentially outputted in correspondence with each of the bulk devices; and a timer setting means for instructing to turn on the power to the next stage bulk device after the standby time has elapsed if the receiving means does not receive an accessible signal from the bulk device within the standby time; and a control means for controlling power on to the next stage bulk device according to instructions.

(Function) In the above configuration, the present invention individually sets a standby time commensurate with the accessible standby time of each bulk device, and turns on the power of a plurality of bulk devices according to the accessible standby time or After the set waiting time has elapsed, the input is controlled in sequence.

(Example) An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In FIG. 1, the same reference numerals as in FIG. 3 indicate corresponding parts.

The timer changeover switches 17a to 17d are the bulk device 1
They are provided corresponding to a to 1d, respectively. Moreover, the timer changeover switches 17a to 17d are the bulk device 1a.
The standby time is individually set to a time commensurate with the accessible standby time that differs for each 1d.

Further, the timer changeover switches 17a to 17d output time-over signals 19a to 19d corresponding to the OR games 13a to 13d, respectively, after the waiting time has elapsed.

An embodiment of the present invention is constructed as described above.Next, the operation of the bulk answer monitoring circuit provided in the power supply control device of the present invention will be explained.

First, the input signal 7a is output from the output control circuit 21 through the relay output circuit 23 to the bulk device 1a.

At the same time, the timer 15 is activated for 30 seconds and 21 minutes.
Each minute and four minutes are timed.

When the bulk device 1a to which the input signal 7a is input becomes accessible within the standby time set by the timer changeover switch 17a, the bulk answer signal 9a is outputted from the bulk device 1a to the receiving circuit 11a.

Furthermore, this bulk answer signal 9a is transmitted to the receiving circuit 11a.
is output to the OR gate 13a.

However, if the answer signal 9a is not output within the standby time set by the timer changeover switch 17a, the timer changeover switch 17
a, the time over signal 9a is output to the OR gate 13a.
Output to.

In this way, the OR gate 13a to which the bulk answer signal 9a or the time-over signal 19a is input provides these signals to the output control circuit 21. As a result, power-on sequence control is performed by the output control circuit 21, and a power-on signal 7b is outputted to the bulk device 1b via the relay output circuit 23.

At the same time, time measurement by the timer 15 is newly performed. Further, the timer changeover switch 17b is set to have a standby time that is commensurate with the accessible standby time of the bulk device 1b, independently of the timer changeover switch 17a.

When the bulk device 1b to which the input signal 7b is input becomes accessible within the standby time set by the timer changeover switch 17b, the bulk answer signal 9b is input to the receiving circuit 1.
1b. This signal is further processed by OR gate 13
output to b.

However, if the bulk answer signal 9b is not output within the standby time set by the timer changeover switch 17b, after the standby time has elapsed, the timer changeover switch 17b
The time-over signal 19b is output by the OR gate 13b.
Output to.

In this way, for the bulk devices 1c and ld, as well as for the bulk devices 1a and lb, the timer changeover switch 1 has a standby time commensurate with the accessible standby time of each bulk device 1c and ld.
7c and 17d. Furthermore, bulk answer signal 9C29d or time over signal 1
9c and 19d sequentially perform power-on sequence control and output power-on signals 7c and 7d.

As described above, the standby time corresponding to the accessible standby time, which differs for each bulk device, is individually set using the timer changeover switch.

Therefore, if the bulk answer signal is not output, it is possible to turn on the power to the next stage by simply waiting for the minimum necessary waiting time.

[Effects of the Invention] As explained above, according to the present invention, since the timer changeover switch is set for each bulk device, the standby time corresponding to the accessible standby time of each bulk device can be set individually. Can be set to .

As a result, when a bulk answer signal is not output, power can be turned on to the next stage by simply waiting for the minimum required waiting time.

Therefore, the power-on time can be shortened and the usage efficiency of the entire computer system can be improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing the entire power supply control system of the present invention,
FIG. 3 is a block diagram showing a conventional power supply control device. 21... Output control circuit 23... Relay output circuit representative Hidekazu Miyoshi 5... Power supply control unit (PCU) 11a to 11d... Receiving circuit 13 a to 13 d-OR gate 15... timer

Claims (1)

[Scope of Claims] Receiving means for receiving, corresponding to each bulk device, access enable signals sequentially output from a plurality of bulk devices that become accessible after an accessible standby time after DC power is turned on. and, a standby time commensurate with the different accessible standby time for each of the bulk devices is individually set for each of the bulk devices, and the receiving means receives an accessible signal from the bulk device within the standby time. a timer setting means for instructing to turn on the power to the next-stage bulk device after a standby time has elapsed, and a control means for controlling power-on to the next-stage bulk device according to the instruction from the timer setting means. A power control device for a computer system, characterized by: