JPH0462918A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0462918A
JPH0462918A JP17500390A JP17500390A JPH0462918A JP H0462918 A JPH0462918 A JP H0462918A JP 17500390 A JP17500390 A JP 17500390A JP 17500390 A JP17500390 A JP 17500390A JP H0462918 A JPH0462918 A JP H0462918A
Authority
JP
Japan
Prior art keywords
film
substrate
insulating film
poly
contact hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17500390A
Other languages
Japanese (ja)
Inventor
Tetsunori Miwa
三輪 哲徳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17500390A priority Critical patent/JPH0462918A/en
Publication of JPH0462918A publication Critical patent/JPH0462918A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To turn the whole polysilicon Si film, which is grown in a contact hole, into a polycrystal line one and to prevent a protrusion, which is a local single crystal Si film, from being grown by a wherein in a process for forming the polysilicon film in the hole, a contact part is uniformly covered with an insulating film. CONSTITUTION:An SiO2 film which is used as a first insulating film 2 is applied on an Si substrate 1 by a thermal oxidation method and a contact hole 3 is opened by a lithography technique. Then, a very thin SiO2 film is formed in the hole 3 as a second insulating film 4. Subsequently, a polysilicon film 5 is grown on the substrate 1 by a vacuum CVD method. Even if there is the very thin SiO2 film 4 in the hole 3, the film 4 is instantaneously broken by a high--temperature heat treatment at the time of an emitter diffusion in the latter process and an adverse effect is not inflicted by the film 4 on a contact resistance between the substrate 1 and an electrode consisting of the film 5.

Description

【発明の詳細な説明】 〔概要〕 本発明は、シリコン(Si)基板とのコンタクトを有す
る場合の多結晶シリコン(ポリSt)膜の成長。
DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to the growth of a polycrystalline silicon (polySt) film when having contact with a silicon (Si) substrate.

または、この成長に先立つ基板表面の処理に関し。Or regarding the treatment of the substrate surface prior to this growth.

ポリSi膜の形成工程において、ポリSi膜の表面に単
結晶Siの突起が異常成長してポリSi膜が不均一とな
る問題を解決し、ポリSt膜表面の均一性を確保するこ
とを目的とし。
The purpose is to solve the problem of abnormal growth of monocrystalline Si protrusions on the surface of the poly-Si film during the poly-Si film formation process, resulting in non-uniformity of the poly-Si film, and to ensure the uniformity of the poly-St film surface. year.

Si基板上に第1の絶縁膜を被覆し、該第1の絶縁膜に
該Si基板を露出するコンタクトホールを形成する工程
と、該コンタクトホール表面に、第1の厚さを有した第
2の絶縁膜を形成する工程と。
A step of coating a first insulating film on a Si substrate, forming a contact hole exposing the Si substrate in the first insulating film, and forming a second insulating film having a first thickness on the surface of the contact hole. and a step of forming an insulating film.

該Si基板上にポリSi膜を被覆する工程と、該第2の
絶縁膜が破壊される程度の熱処理をする工程とを含むよ
うに構成する。
The method is configured to include a step of covering the Si substrate with a poly-Si film, and a step of performing heat treatment to such an extent that the second insulating film is destroyed.

〔産業上の利用分野〕[Industrial application field]

本発明は、 Si基板とのコンタクトを有する場合のポ
リSi膜の成長、または、この成長に先立つSi基板表
面の処理に関する。
The present invention relates to the growth of a poly-Si film when it has contact with a Si substrate, or to the treatment of the surface of a Si substrate prior to this growth.

近年、 Si半導体において、 Bi −CMO5構造
のデバイスは、その高速性、低消費電力という特徴から
大きな地位を占めてきている。
In recent years, devices with a Bi-CMO5 structure have been occupying a large position in Si semiconductors due to their high speed and low power consumption.

この旧−CMO3構造のデバイスにおいては、多くの場
合、ゲートとして機能するポリSi膜とSi基板が、直
接コンタクトすることが要求される。
In devices with this old-CMO3 structure, in many cases it is required that the poly-Si film functioning as a gate and the Si substrate be in direct contact.

本発明は、このポリSi膜を微視的にも均一に成長でき
る技術を提供するものである。
The present invention provides a technique that enables microscopically uniform growth of this poly-Si film.

〔従来の技術〕[Conventional technology]

第3図は従来例の説明図である。 FIG. 3 is an explanatory diagram of a conventional example.

図において、6はSi基板、7は5in2膜、8はコン
タクトホール、9はポリSi膜、 10は単結晶Si突
起である。
In the figure, 6 is a Si substrate, 7 is a 5in2 film, 8 is a contact hole, 9 is a poly-Si film, and 10 is a single crystal Si protrusion.

従来のBi −CMO3構造のデバイスのSi基板との
コンタクトを有する場合のポリSi膜の成長においては
、第3図(a)に示すように、コンタクトホール8を形
成後、弗酸(IIP)処理にてSi基板6の表面を露出
した後、第半図(b)に示すように、約620°Cにて
ポリsi)模9をコンタク1−ホール8」二及び+ S
iO□膜7上に成長していた。
In the growth of a poly-Si film in the case of contact with the Si substrate of a conventional Bi-CMO3 structure device, as shown in FIG. 3(a), after forming a contact hole 8, hydrofluoric acid (IIP) treatment is performed. After exposing the surface of the Si substrate 6 at about 620° C., as shown in the second half (b), the poly-Si substrate 6 is contacted with 1-hole 8''2 and +S.
It had grown on the iO□ film 7.

ところが、この方法では、sj基vii、6の表面にポ
’JSi膜9を成長する際に、成長過程においてSi基
板6の表面に単結晶Si突起10が異常成長してしまい
、ポリSi膜9の表面が不均一になっていた。
However, in this method, when growing the poly-Si film 9 on the surface of the sj group vii, 6, monocrystalline Si protrusions 10 grow abnormally on the surface of the Si substrate 6 during the growth process, and the poly-Si film 9 The surface was uneven.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従って、不均一となったポリSi膜のパターニングを行
う場合、単結晶Stが原因となりパターニング不良とな
る。また、異常成長した単結晶Siの突起が折れ、パー
ティクル等の異物の増加と製品歩留りの低下といった問
題が生じていた。
Therefore, when patterning a poly-Si film that has become non-uniform, the single crystal St causes patterning defects. In addition, the protrusions of the abnormally grown single crystal Si are broken, causing problems such as an increase in foreign matter such as particles and a decrease in product yield.

上記の異常成長の原因については、コンタクトホール内
のSi基板が弗酸によって露出した領域において、その
表面が微視的に見て、パーティクルや微小なSiO□膜
残渣等により、清浄なSi面とそうでない部分が混在す
ることによると考えられる。
Regarding the cause of the above-mentioned abnormal growth, in the area where the Si substrate inside the contact hole is exposed by hydrofluoric acid, the surface of the Si substrate in the contact hole is microscopically visible due to particles and minute SiO□ film residues, etc. This is thought to be due to the presence of other parts.

このため、ポリSi膜の成長時に不均一な核形成が生し
、前述の突起に至る。
Therefore, non-uniform nucleation occurs during the growth of the poly-Si film, leading to the above-mentioned protrusions.

本発明は2以上の点を鑑み、ポリSi膜の形成工程にお
いて1ポリSi膜の表面に単結晶Siの突起が異常成長
してポリSi膜が不均一となる問題を解決し、ポリSj
膜表面の均一性を確保することを目的とする。
In view of two or more points, the present invention solves the problem of abnormal growth of monocrystalline Si protrusions on the surface of a poly-Si film in the poly-Si film formation process, making the poly-Si film non-uniform.
The purpose is to ensure uniformity of the film surface.

〔課題を解決するための手段〕[Means to solve the problem]

第1図は本発明の原理説明図兼一実施例の工程順模式断
面図である。
FIG. 1 is a principle explanatory diagram of the present invention and a schematic cross-sectional view in order of steps of an embodiment.

図において、IはSi基板、2は第1の絶縁膜3はコン
タクトホール、4は第2の絶縁膜、5はポリSi膜であ
る。
In the figure, I is a Si substrate, 2 is a first insulating film 3 is a contact hole, 4 is a second insulating film, and 5 is a poly-Si film.

本発明では、ポリSi膜の成長前に、コンタクトホール
内に5iO7膜等の極薄い絶縁膜(5〜50人)を形成
することにより、上記の不均一な核形成を防ぎ、均一な
ポリSi膜を成長させるものである。
In the present invention, by forming an extremely thin insulating film (5 to 50 layers) such as a 5iO7 film in the contact hole before growing the poly-Si film, the uneven nucleation described above is prevented and the uniform poly-Si film is formed. It grows a film.

この絶縁膜がコンタクトボール内に存在することにより
、ポリSi膜とSi基板のコンタク1〜抵抗の増大が懸
念されるが、実際には5後工程でのエミッタ拡散時の高
温熱処理により、この程度の極薄い厚さの絶縁膜は破壊
され、コンタクト抵抗に悪影響は与えない。
Due to the presence of this insulating film inside the contact ball, there is a concern that the contact resistance between the poly-Si film and the Si substrate will increase, but in reality, the high temperature heat treatment during emitter diffusion in the post-process step 5 causes the contact resistance to increase. The extremely thin insulating film is destroyed and the contact resistance is not adversely affected.

本発明の目的は、第1図(a)に示すように。The object of the present invention is as shown in FIG. 1(a).

Si基板l上に第1の絶縁膜2を被覆し、該第1の絶縁
膜2に該Si基板1を露出するコンタクトホール3を形
成する工程と。
A step of coating a first insulating film 2 on the Si substrate l and forming a contact hole 3 exposing the Si substrate 1 in the first insulating film 2.

第1図(b)に示すように、該コンタクトホール3表面
に、第1の厚さとして、極薄い50Å以下の厚さに第2
の絶縁膜4を形成する工程と。
As shown in FIG. 1(b), a second layer is formed on the surface of the contact hole 3 to have a first thickness of 50 Å or less.
a step of forming an insulating film 4;

第1図(C)に示すように、該Si基板l上にポリSi
膜5を被覆する工程と。
As shown in FIG. 1(C), poly-Si is deposited on the Si substrate l.
and a step of coating the membrane 5.

しかる後に、該第2の絶縁膜4が破壊される程度の温度
で熱処理をする工程とを含むことにより達成される。
This is achieved by subsequently performing heat treatment at a temperature that destroys the second insulating film 4.

〔作用〕[Effect]

本発明では、第3図のようにコンタクトホールにポリS
i膜を形成する過程において、コンタクト部を均一に絶
縁膜で覆っているため、コンタクトホール内に成長する
ポリSi膜は全て多結晶化したSiとなり7局部的な単
結晶S】である突起の成長を防止することが可能となる
In the present invention, as shown in FIG.
In the process of forming the i-film, the contact area is uniformly covered with an insulating film, so all the poly-Si film that grows inside the contact hole becomes polycrystalline Si, resulting in the formation of local single-crystal S] protrusions. It becomes possible to prevent growth.

従って、ポリSi膜のパターニング不良の防止が可能と
なる。
Therefore, it is possible to prevent defective patterning of the poly-Si film.

〔実施例〕〔Example〕

第1図は本発明の一実施例の工程順模式断面図。 FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention in the order of steps.

第2図は形成されるSiO□膜の膜厚と硝酸処理時間の
関係を示す回である。
FIG. 2 shows the relationship between the thickness of the SiO□ film formed and the nitric acid treatment time.

第1図(a)に示すように、 Si基板l上に熱酸化法
により、 4,000人の厚さに第1の絶縁膜2として
の5iOz膜を被覆する。そして、Si基板1とのコン
タクトを得るためのコンタクトホール3をリソグラフィ
技術により開口する。
As shown in FIG. 1(a), a 5iOz film as a first insulating film 2 is coated on a Si substrate 1 to a thickness of 4,000 yen by thermal oxidation. Then, a contact hole 3 for making contact with the Si substrate 1 is opened using lithography technology.

次に、第1図(b)に示すように、 Si基板1を80
°Cに加熱した硝酸(HNO3)で10分間処理し。
Next, as shown in FIG. 1(b), the Si substrate 1 is
Treat with nitric acid (HNO3) heated to °C for 10 min.

続いて、10分間純水洗浄、10分間自然乾燥して。Next, wash with pure water for 10 minutes and dry naturally for 10 minutes.

コンタクトボール3内に、第2の絶縁膜4として。Inside the contact ball 3, as a second insulating film 4.

20人の厚さの極薄いSiO□膜を形成する。An extremely thin SiO□ film with a thickness of 20 people is formed.

このような極薄いSiO□膜4の形成は、第2図に示さ
れる。形成されるSiO□膜の膜厚と80°Cの硝酸に
よる処理時間の関係図で分かるように、80’Cに加熱
した硝酸による処理時間を調節することによって5〜5
0人の任意の厚さの極薄い5i(h膜4がSi基板1上
に形成できる。
The formation of such an extremely thin SiO□ film 4 is shown in FIG. As can be seen from the relationship diagram between the thickness of the SiO□ film formed and the treatment time with nitric acid at 80°C, it is possible to increase the
An ultra-thin 5i (h film 4) of any thickness can be formed on the Si substrate 1.

続いて、第1図(C)に示すように、 Si基板1上に
、減圧CVD法により、620°C+ 0.2Torr
でシラン(SiH4)ガスを80secm導入して40
分間処理し。
Subsequently, as shown in FIG. 1(C), the Si substrate 1 was heated to 620°C + 0.2 Torr by low pressure CVD method.
Introduce silane (SiH4) gas for 80 seconds and
Process for minutes.

4.000人の厚さにポリSi膜5を成長する。A poly-Si film 5 is grown to a thickness of 4,000 nm.

コンタクトホール3内に、前記の極薄い5i02膜4が
あっても、この上に成長したポリSi膜5のコンタクト
電極層は、後工程でのエミッタ拡散時の1 、000°
C以上の高温(例えば、 1050°Cで30秒間)の
熱処理によって、薄い厚さのSiO□膜4は瞬時に破壊
されて、Si基板1とポリSi膜5の電極との間のコン
タクト抵抗には悪影響を与えない。
Even if the ultra-thin 5i02 film 4 is present in the contact hole 3, the contact electrode layer of the poly-Si film 5 grown thereon will have an angle of 1,000° during emitter diffusion in the later process.
The thin SiO□ film 4 is instantaneously destroyed by heat treatment at a high temperature of 1,050°C or higher (for example, 1,050°C for 30 seconds), and the contact resistance between the Si substrate 1 and the electrode of the poly-Si film 5 is reduced. has no adverse effect.

従って1本発明の極薄い絶縁膜を形成しても。Therefore, even if the extremely thin insulating film of the present invention is formed.

Si基板とポリSi膜の間のコンタクト抵抗は従来プロ
セスのものと全く同じ値が得られた。
The contact resistance between the Si substrate and the poly-Si film was exactly the same as that in the conventional process.

〔発明の効果〕〔Effect of the invention〕

以上説明したように9本発明によれば、コンタクトホー
ル内に形成するポリSi膜内に単結晶Siの突起の発生
を防くことが可能となり、コンタクトホール内に均一な
ポリSi膜を形成することが出来。
As explained above, according to the present invention, it is possible to prevent the formation of protrusions of single crystal Si in the poly-Si film formed in the contact hole, and it is possible to form a uniform poly-Si film in the contact hole. I can do it.

信頼性向上に寄与するところが大きい。This greatly contributes to improving reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の工程順模式断面図。 第2図は形成されるSiO□膜の膜厚と硝酸処理時間の
関係を示す図。 第3図は従来例の説明図 である。 図において。 1はSi基板、     2は第1の絶縁膜3はコンタ
クトホール。
FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention in the order of steps. FIG. 2 is a diagram showing the relationship between the thickness of the SiO□ film formed and the nitric acid treatment time. FIG. 3 is an explanatory diagram of a conventional example. In fig. 1 is a Si substrate, and 2 is a first insulating film 3 that is a contact hole.

Claims (1)

【特許請求の範囲】  シリコン基板(1)上に第1の絶縁膜(2)を被覆し
、該第1の絶縁膜(2)に該シリコン基板(1)を露出
するコンタクトホール(3)を形成する工程と、該コン
タクトホール(3)表面に、第1の厚さを有した第2の
絶縁膜(4)を形成する工程と、該シリコン基板(1)
上に多結晶シリコン膜(5)を被覆する工程と、 該第2の絶縁膜(4)が破壊される程度の熱処理をする
工程とを含むことを特徴とする半導体装置の製造方法。
[Claims] A silicon substrate (1) is covered with a first insulating film (2), and a contact hole (3) is formed in the first insulating film (2) to expose the silicon substrate (1). forming a second insulating film (4) having a first thickness on the surface of the contact hole (3); and a step of forming a second insulating film (4) having a first thickness on the surface of the contact hole (3);
A method for manufacturing a semiconductor device, comprising the steps of: coating a polycrystalline silicon film (5) thereon; and performing heat treatment to such an extent that the second insulating film (4) is destroyed.
JP17500390A 1990-07-02 1990-07-02 Manufacture of semiconductor device Pending JPH0462918A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17500390A JPH0462918A (en) 1990-07-02 1990-07-02 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17500390A JPH0462918A (en) 1990-07-02 1990-07-02 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0462918A true JPH0462918A (en) 1992-02-27

Family

ID=15988519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17500390A Pending JPH0462918A (en) 1990-07-02 1990-07-02 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0462918A (en)

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