JPH046257Y2 - - Google Patents
Info
- Publication number
- JPH046257Y2 JPH046257Y2 JP1985160202U JP16020285U JPH046257Y2 JP H046257 Y2 JPH046257 Y2 JP H046257Y2 JP 1985160202 U JP1985160202 U JP 1985160202U JP 16020285 U JP16020285 U JP 16020285U JP H046257 Y2 JPH046257 Y2 JP H046257Y2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- power amplifier
- transmission
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 claims description 23
- 230000005540 biological transmission Effects 0.000 claims description 16
- 238000010586 diagram Methods 0.000 description 3
- 230000005856 abnormality Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Monitoring And Testing Of Transmission In General (AREA)
- Transmitters (AREA)
- Control Of Amplification And Gain Control (AREA)
- Amplifiers (AREA)
Description
【考案の詳細な説明】
〔産業上の利用分野〕
本考案は、無線送信装置における電力増幅器の
故障検出回路に関し、特に出力電力が存在しない
場合にも一定のバイアス電圧が与えられている出
力電力検波回路を有する可変電力増幅器の故障検
出回路に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a failure detection circuit for a power amplifier in a wireless transmitter, and in particular, the invention relates to a failure detection circuit for a power amplifier in a wireless transmitter. The present invention relates to a failure detection circuit for a variable power amplifier having a detection circuit.
従来の、この種の電力増幅器の故障検出回路を
第２図に示す。RF入力端子１からのRF入力信号
は自動利得制御（以後AGCと示す）に用いられ
る電力増幅回路３で増幅され検波回路４を通り、
RF出力端子２より出力される。又、検波回路４
には、バイアス回路６により一定のバイアス電圧
９が与えられており検波回路４にて検波された検
波電圧１０は、増幅回路５とコンパレータ７に印
加される。
A conventional failure detection circuit for this type of power amplifier is shown in FIG. The RF input signal from the RF input terminal 1 is amplified by a power amplifier circuit 3 used for automatic gain control (hereinafter referred to as AGC), passes through a detection circuit 4,
It is output from RF output terminal 2. Also, the detection circuit 4
A constant bias voltage 9 is applied by a bias circuit 6, and a detected voltage 10 detected by a detection circuit 4 is applied to an amplifier circuit 5 and a comparator 7.
増幅回路５は、制御回路８からの制御電圧１１
と、検波電圧１０とによる出力を生じ、電力増幅
回路３に送出しAGCを行う。コンパレータ７は
制御回路８からの制御電圧１１を分圧した基準電
圧１２と検波電圧１０とを比較し、基準電圧１２
より検波電圧１０が大きい場合には、送信中であ
ることを示す信号を端子１３に送出し、基準電圧
１２より検波電圧１０が小さい場合には、送信断
であることを示す信号を端子１３に送出する。 The amplifier circuit 5 receives a control voltage 11 from the control circuit 8.
and a detected voltage 10 are generated and sent to the power amplifier circuit 3 for AGC. The comparator 7 compares the detected voltage 10 with a reference voltage 12 obtained by dividing the control voltage 11 from the control circuit 8, and
When the detected voltage 10 is larger than the reference voltage 12, a signal indicating that transmission is in progress is sent to the terminal 13, and when the detected voltage 10 is smaller than the reference voltage 12, a signal indicating that transmission is interrupted is sent to the terminal 13. Send.
上述した従来の電力増幅器の故障検出回路にお
いては、検波回路４にバイアス電圧９が常に与え
られているので、RF出力電力を下げる目的で、
制御電圧１１を基準電圧１２がバイアス電圧９よ
り小さい値となるまで下げて使用した場合、送信
断状態において、基準電圧１２より検波電圧１０
が大きくなり、送信断状態であるにもかかわらず
送信中を示す信号が端子１３に送出されてしまう
という欠点がある。
In the conventional power amplifier failure detection circuit described above, since the bias voltage 9 is always applied to the detection circuit 4, in order to lower the RF output power,
When the control voltage 11 is lowered until the reference voltage 12 becomes a value smaller than the bias voltage 9, the detected voltage 10 is lower than the reference voltage 12 in the transmission cut-off state.
becomes large, and a signal indicating that transmission is in progress is sent to the terminal 13 even though transmission is in a disconnected state.
本考案の電力増幅器の故障検出回路は、入力信
号を増幅する電力増幅回路と、一定のバイアス電
圧が与えられ前記電力増幅回路の出力を入力し出
力信号を出力する検波回路と、この検波回路の検
波電圧と制御電圧を入力し前記出力信号の電力が
この制御電圧に応じた大きさになるように前記電
力増幅回路の利得を制御する利得制御手段と、前
記制御電圧を分圧した電圧と前記バイアス電圧と
その加算電圧と前記検波電圧を比較して送信中ま
たは送信断を示す信号を出力するコンパレータと
を含んで構成される。
The power amplifier failure detection circuit of the present invention includes a power amplifier circuit that amplifies an input signal, a detection circuit that receives the output of the power amplifier circuit to which a constant bias voltage is applied, and outputs an output signal. gain control means for inputting a detection voltage and a control voltage and controlling the gain of the power amplifier circuit so that the power of the output signal becomes a magnitude corresponding to the control voltage; It is configured to include a comparator that compares a bias voltage, its added voltage, and the detected voltage and outputs a signal indicating that transmission is in progress or transmission is interrupted.
次に本考案について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本考案の一実施例のブロツク図であ
る。第１図において、各符号は第２図の各符号に
それぞれ対応する。本実施例の特徴ある構成は、
バイアス回路６より送出され検波回路４に加えら
れるバイアス電圧９と、基準電圧１２とを加算回
路１４で加算した加算基準電圧１５を、出力電力
の異常を検出するためのコンパレータ７の基準電
圧として新たに使用している点である。 FIG. 1 is a block diagram of one embodiment of the present invention. In FIG. 1, each symbol corresponds to each symbol in FIG. 2, respectively. The characteristic configuration of this embodiment is as follows:
An addition reference voltage 15 obtained by adding the bias voltage 9 sent from the bias circuit 6 and applied to the detection circuit 4 and the reference voltage 12 by the addition circuit 14 is newly used as the reference voltage of the comparator 7 for detecting an abnormality in the output power. The point is that it is used for
本実施例において、送信断状態とすると、検波
電圧１０には、バイアス電圧９がそのまま現われ
る。また、RF出力電力を制御する制御電圧１１
が下がつた場合でもその制御電圧１１を分圧した
基準電圧１２には正の電圧が現われており、加算
基準電圧１５には、バイアス電圧９に基準電圧１
２を加えた電圧が現われる。このように、送信断
状態においては、常に加算基準電圧１２より検波
電圧１０が小さくなるので、送信断であることを
示す信号が端子１３に送出される。 In this embodiment, when the transmission is cut off, the bias voltage 9 appears as it is in the detected voltage 10. Also, a control voltage 11 for controlling the RF output power
Even if the voltage decreases, a positive voltage appears in the reference voltage 12 obtained by dividing the control voltage 11, and the addition reference voltage 15 includes the bias voltage 9 and the reference voltage 1.
A voltage equal to 2 appears. In this way, in the transmission cut-off state, the detected voltage 10 is always lower than the addition reference voltage 12, so a signal indicating that the transmission is cut off is sent to the terminal 13.
本考案は以上説明したように、検波回路に加え
られるバイアス電圧と、制御電圧を分圧した電圧
とを加算した加算電圧を送信断すなわち出力電力
の異常を検出するための基準電圧として使用する
ことにより、出力電力を下げる目的で制御電圧を
上述の分圧した電圧がバイアス電圧より小さい値
となるまで下げて使用した場合に、送信断状態に
おいても上述の加算電圧より検波電圧が大きくな
ることを防ぎ、送信断状態であるにもかかわらず
送信中であることを示す信号がコンパレータから
送出されるという誤動作を防ぐことができる効果
がある。
As explained above, the present invention uses the added voltage obtained by adding the bias voltage applied to the detection circuit and the voltage obtained by dividing the control voltage as a reference voltage for detecting a transmission interruption, that is, an abnormality in the output power. Therefore, in order to lower the output power, if the control voltage is lowered until the above-mentioned divided voltage becomes smaller than the bias voltage, the detected voltage will be larger than the above-mentioned added voltage even in the transmission cut-off state. This has the effect of preventing malfunctions in which a signal indicating that transmission is in progress is sent out from the comparator even though transmission is interrupted.
第１図は、本考案の電力増幅器の故障検出回路
の一実施例のブロツク図、第２図は、従来の電力
増幅器の故障検出回路のブロツク図である。
１……RF入力端子、２……RF出力端子、３…
…電力増幅回路、４……検波回路、５……増幅回
路、６……バイアス回路、９……バイアス電圧、
１０……検波電圧、１１……制御電圧、１２……
基準電圧、１４……加算回路、１５……加算基準
電圧。
FIG. 1 is a block diagram of an embodiment of a failure detection circuit for a power amplifier according to the present invention, and FIG. 2 is a block diagram of a conventional failure detection circuit for a power amplifier. 1...RF input terminal, 2...RF output terminal, 3...
...Power amplifier circuit, 4...Detection circuit, 5...Amplification circuit, 6...Bias circuit, 9...Bias voltage,
10...Detection voltage, 11...Control voltage, 12...
Reference voltage, 14... Addition circuit, 15... Addition reference voltage.
Claims (1)
イアス電圧が与えられ前記電力増幅回路の出力を
入力し出力信号を出力する検波回路と、この検波
回路の検波電圧と制御電圧を入力し前記出力信号
の電力がこの制御電圧に応じた大きさになるよう
に前記電力増幅回路の利得を制御する利得制御手
段と、前記制御電圧を分圧した電圧と前記バイア
ス電圧とその加算電圧と前記検波電圧を比較して
送信中または送信断を示す信号を出力するコンパ
レータとを含むことを特徴とする電力増幅器の故
障検出回路。 a power amplifier circuit that amplifies an input signal; a detection circuit that is supplied with a constant bias voltage, inputs the output of the power amplifier circuit, and outputs an output signal; and a detector circuit that inputs the detection voltage and control voltage of this detector circuit and outputs the output signal gain control means for controlling the gain of the power amplifier circuit so that the power of the power amplifier has a magnitude corresponding to the control voltage; a voltage obtained by dividing the control voltage, the bias voltage, the added voltage thereof, and the detection voltage; A power amplifier failure detection circuit comprising: a comparator that compares and outputs a signal indicating that transmission is in progress or transmission is interrupted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985160202U JPH046257Y2 (en) | 1985-10-18 | 1985-10-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985160202U JPH046257Y2 (en) | 1985-10-18 | 1985-10-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6268317U JPS6268317U (en) | 1987-04-28 |
| JPH046257Y2 true JPH046257Y2 (en) | 1992-02-20 |
Family
ID=31085360
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985160202U Expired JPH046257Y2 (en) | 1985-10-18 | 1985-10-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH046257Y2 (en) |
-
1985
- 1985-10-18 JP JP1985160202U patent/JPH046257Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6268317U (en) | 1987-04-28 |
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