JPH0457256A - Disk processing device - Google Patents

Abstract

PURPOSE:To confirm the normality of a data even when executing data compressing recording by checking a CRC after compressing the data outputted from a write CRC generation circuit, writing the data in the disk, reading it and extending it. CONSTITUTION:In a disk processing device 2 to exchange data between a host device 1 and a disk device 3, a write CRC generation circuit 21 is provided to generate the CRC after receiving the data from the host device 1. The final data is outputted after adding the CRC, and after fetching and compressing the data passed through a data compressing write circuit 22 and outputted from the write CRC generation circuit 21, the data is written in the disk device 2. A data extending read circuit 23 reads and extends the written data of the circuit 22, and a read CRC check circuit 24 generates the CRC by the output of the circuit 23, compares the CRC with the CRC output of the circuit 21 and confirms the normality of the data. Thus, even in the case of compressed recording, the normality of data can be confirmed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a disk processing device that exchanges data between a host device and a disk device, and in particular performs data code conversion within the device to convert data. The present invention relates to a disk processing device that performs a check to confirm the normality of a disk.

[Conventional technology]

In conventional disk processing devices, data patterns sent from higher-level devices are written directly into the disk device.

Therefore, the CR generated at the input section in the disk processing device
The normality of the processed data is confirmed by comparing the C and the CRC generated by the output section.

[Problem to be solved by the invention]

In disk processing devices that perform data compression recording, which is a high-density recording method that is expected to become widely used in the future, the data pattern does not match between the input section and the output section within the disk processing device. Even if CRCs are generated and compared at the input section and the output section, it is not possible to confirm the normality of the data.

Therefore, there is a problem in that the circuit configuration of a conventional disk processing device cannot cope with such data compression recording.

[Purpose of the invention]

The present invention aims to solve these problems of the prior art.

That is, the present invention also applies when performing data compression recording.
It is an object of the present invention to provide a disk processing device that can confirm the normality of data by comparing CRCs between an input section and an output section.

The write CRC generation circuit (21) allows the host device (
1) receives the data and generates a CRC, adds this CRC to the final data and outputs it.
After taking in the data output from and compressing it, it is written to the disk device (2), and the data decompression/reading circuit (23)
The data compression/writing circuit (22) reads and decompresses the write data, and the read CRC check circuit (24) reads and decompresses the data written in the data compression/writing circuit (23).
Generates a CRC with the output of the write CRC generation circuit (
The normality of the data is confirmed by comparing it with the CRC output of 21). This aims to achieve the above-mentioned purpose.

[Means to solve the problem]

In the present invention, the hypernym W(1) and the disk device (3
) Disk processing device (2) that exchanges data with
[Operation] In the disk processing device (2) that exchanges data between the host device (1) and the disk device (3), receives data from the host device (1) and generates a CRC, This CRC is added to the final data and output, the data is taken in, compressed, and written to the disk device (3). On the other hand, this compressed write data is read and decompressed, a CRC is generated from this output, and the normality of the data is confirmed by comparing it with the CRC output at the time of writing, so the data is compressed at the time of writing. Even when recording is performed, it is possible to confirm the normality of the data by comparing the CRCs of the input section and the output section.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

In FIG. 1, a central processing unit (CPU) 1, which is a host device of a disk processing device 2, stores original data when exchanging data with a disk device 3. , and the disk processing device 2 are connected via a CPU interface bus 101.

Further, the disk device 3 in which data exchanged with the CPU is recorded and the disk processing device 2 are connected through a device interface 103, thereby configuring a device subsystem.

The present invention provides a write C
An RC generation circuit 21 is provided to receive data from the host device 1, generate a CRC, add this CRC to the final data and output it, and a data compression write circuit 22 is provided to output it from the write CRC generation circuit 21. After taking in and compressing the data, it is written to the disk device 2. A data decompression/reading circuit 23 is provided, and a data compression/writing circuit 2 is provided.
Read and expand the write data of 2, read CR
A C check circuit 24 is provided to generate a CRC from the output of the data decompression/read circuit 23 and compare it with the CRC output of the write CRC generation circuit 21 to confirm the normality of the data.

Hereinafter, the configuration of the present invention will be explained in more detail.

In the disk processing device 2, the write CRC generation circuit 21 inputs data sent via the CPU interface bus 101, generates a CRC, generates the final data, and continues the generated CRC code with the final data. The data is added to the data and sent to the write data bus 102.

The data compression write circuit 22 includes a write data bus 10.
The data from 2 is compressed to 1 data byte when the same data pattern continues, and the compressed data is transferred to device interface 1.
At the same time, the data decompression reading circuit 23
Also enter.

The data decompression read circuit 23 transfers compressed data from the device interface 103 to the data compression write circuit 22.
The data is decompressed by the reverse process and input to the read CRC check circuit 24 via the read data bus 104.

The read CRC check circuit 24 first checks the write C
The CRC code generated by the RC generation circuit 21 and the CRC generated by the data decompression reading circuit 23 are compared. In case of normal processing where both CRCs match, read CRC
The output of the check circuit 24 is always 0. During a write operation, the in-operation signal 105 from the data compression write circuit 22 prevents the read CR and C check circuit 24 from outputting data to the QPU path interface 101 .

The operation of the disk processing device shown in the figure will be explained below.

Now, when writing a data group from the CPU to the disk device 3, the data input via the CPU interface 101 is first used in the write CRC generation circuit 21 for CR and C generation, and then used for the next data compression. Output to the write circuit 22.

When CRC generation is performed up to the final data, the CRC generation code is also sent out as a data group. The data compression write circuit 22 checks the pattern of the data bytes to determine whether the data can be compressed, and if it can be compressed, compresses it and sends the output data to the device interface 103.

The disk device 3 records data input via the device interface 103.

The data decompression/reading circuit 23 decompresses the compressed data in the device interface 103 and sends it to the CP
The data is returned to the same form as the write data from the UI, and then read via the read data bus 104 and read by the CRC check circuit 2.
Enter 4.

The read CRC check circuit 24 generates a CRC using the restored data up to the final data, and then generates a CRC using the restored data.
The CRC code from the RC generation circuit 21 is input. If a series of data compression and expansion are performed normally, the output of the read CRC check circuit 24 is 0, otherwise it is 1.9 Read CRC check circuit 24
The check result in the CPU interface 101
Since the CPUI is notified via the , the CPUI can confirm the normality of the data in the data transfer hardware in the disk processing device.

In this case, while the data compression write circuit 22 is writing to the disk device 3, the write operation signal 105 from the data compression write circuit 22 prohibits the read CRC check circuit 24 from outputting check result data. , will not adversely affect data sent from the CPUI.

〔Effect of the invention〕

As explained above, according to the disk processing device of the present invention, when writing to the disk device, the data input section generates a CRC, and at the same time the data is written to the disk device, the reading circuit in the processing device also generates a CRC. Send the data C
Generate RC and compare it with the CRC generated in the input section.
Since the RC check is performed, even when the write circuit performs data compression processing, it is possible to check the normality of data written to the disk device in real time.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. 1-host device, 2-disk processing device, 3-disk device, 21-write CRC generation circuit, 22-data compression write circuit, 23-data decompression read circuit, 24-read CRC check circuit. Applicant Nippon Electric Co., Ltd. Agent Patent Attorney Isamu Takahashi

Claims (1)

[Claims] (1) In a disk processing device that exchanges data between a host device and a disk device, a write CRC generation circuit that receives data from the host device, generates a CRC, adds the CRC to the final data, and outputs it. a data compression/writing circuit that captures data output from the write CRC generation circuit, compresses it, and writes it to a disk device; and a data decompression/read circuit that reads and decompresses the data written by the data compression/writing circuit. A disk processing device characterized in that it is equipped with a read CRC check circuit that generates a CRC using the output of the data decompression read circuit and compares it with the CRC output of the write CRC generation circuit to check the normality of data.