JPH0454581A - Non-contact card - Google Patents
Non-contact cardInfo
- Publication number
- JPH0454581A JPH0454581A JP2162806A JP16280690A JPH0454581A JP H0454581 A JPH0454581 A JP H0454581A JP 2162806 A JP2162806 A JP 2162806A JP 16280690 A JP16280690 A JP 16280690A JP H0454581 A JPH0454581 A JP H0454581A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- card
- circuit
- data
- battery
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 abstract description 7
- 238000012360 testing method Methods 0.000 abstract description 7
- 238000000034 method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 238000003780 insertion Methods 0.000 description 4
- 230000037431 insertion Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0701—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
- G06K19/0702—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement including a battery
- G06K19/0705—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement including a battery the battery being connected to a power saving arrangement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3215—Monitoring of peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3281—Power saving in PCMCIA card
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Credit Cards Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、非接触カードに係り、特に電源として電池
を内蔵する非接触カードに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a contactless card, and more particularly to a contactless card having a built-in battery as a power source.
従来の非接触カードの構成を第６図に示す、データを処
理すると共にカードの動作を制御するＣＰＵ（１）４：
ｍバス（８）を介しテＲＯＭ （２）及びＲＡＭ（３）
が接続されている。ＲＯＭ（２）はプログラムを格納し
、ＲＡ Ｍ （３）はデータを格納するためのものであ
る。また、バス（８）には外部装置（図示せず）とのデ
ータの入出力を制御する入出力制御回路（５）が接続さ
れ、入出力制御回路（５）には変復調回路（６）を介し
てアンテナ（７）が接続されている。さらに、カードに
は、上記の各電気回路に電源を供給するための電池（４
）が格納されている。The configuration of a conventional contactless card is shown in FIG. 6, which includes a CPU (1) 4 that processes data and controls the operation of the card.
ROM (2) and RAM (3) via m bus (8)
is connected. ROM (2) is for storing programs, and RAM (3) is for storing data. Further, an input/output control circuit (5) that controls data input/output with an external device (not shown) is connected to the bus (8), and a modulation/demodulation circuit (6) is connected to the input/output control circuit (5). An antenna (7) is connected through the antenna. Furthermore, the card includes batteries (4
) are stored.
このようなカードでは、外部装置からの電磁波による入
力信号がアンテナ（７）で受信されると、この信号は変
復調回路（６）でディジタル化された後、入出力制御回
路（５）を介してＣＰ Ｕ （１）に入力される。ＣＰ
Ｕ（１）はＲＯＭ （２）に格納されているプログラム
に従って入力信号を処理すると共に必要に応じてデータ
をＲＡ Ｍ （３）に格納する。外部装置に応答するデ
ータ例えば処理結果等は、入出力制御回路（５）を介し
て変復調回路（６）に入力され、ここでアナログ化され
た後、アンテナ（７）から外部装置に電磁波として送信
される。In such a card, when an input signal in the form of electromagnetic waves from an external device is received by the antenna (7), this signal is digitized by the modulation/demodulation circuit (6) and then sent through the input/output control circuit (5). It is input to CPU (1). C.P.
U(1) processes input signals according to a program stored in ROM(2) and stores data in RAM(3) as necessary. Data that responds to an external device, such as processing results, is input to the modulation/demodulation circuit (6) via the input/output control circuit (5), where it is converted into analog data and then transmitted as electromagnetic waves from the antenna (7) to the external device. be done.
しかしながら、カードが外部装置からの入力信号を受信
処理するためには、カードに内蔵された各電気回路に電
池（４）から常時電流を流して、カードを受信状態で待
機させておく必要がある。すなわち、カードの製造工程
においてカードに電池（４）を搭載した後は出荷前であ
っても電池（４）から常に電流が流れ続ける。このため
、電池（４）の消耗が激しくかった。However, in order for the card to receive and process input signals from external devices, it is necessary to constantly supply current from the battery (4) to each of the electric circuits built into the card to keep the card in a receiving state. . That is, after the battery (4) is mounted on the card in the card manufacturing process, current continues to flow from the battery (4) even before shipment. Therefore, the battery (4) was severely consumed.
尚、カード形状を有するために、内蔵する電池（４）と
しては超薄形のものに限られ、電流容量の大きい電池を
搭載することはできない、さらに、カードは通常その外
部をプラスチック等の外装材で覆うため、電池＜４）の
交換もできない。Furthermore, since it has a card shape, the built-in battery (4) is limited to an ultra-thin one, and a battery with a large current capacity cannot be installed.Furthermore, the card usually has an exterior made of plastic or the like. Since the battery is covered with material, it is not possible to replace the battery (<4).
従って、市場における電池（４）の寿命すなわちカード
を使用し得る期間が短くなるという問題点があった。ま
た、電池（４）の搭載から出荷されるまでの期間により
、市場でのカードの寿命にばらつきが出るという問題点
もあった。Therefore, there is a problem that the life of the battery (4) on the market, that is, the period during which the card can be used is shortened. Another problem was that the lifespan of the cards in the market varied depending on the period from the time the battery (4) was installed until the card was shipped.
この発明はこのような問題点を解消するためになされた
もので、市場における使用可能期間の長い非接触カード
を提供することを目的とする。This invention was made to solve these problems, and aims to provide a contactless card that can be used for a long time on the market.
この発明に係る非接触カードは、データの送受信を非接
触で行うためのデータ送受信手段と、データ送受信手段
に接続されると共にデータを処理するためのデータ処理
手段と、クロック信号を発生させてこれをデータ処理手
段に供給するためのクロック発生手段と、データ送受信
手段、データ処理手段及びクロック発生手段にそれぞれ
電源を供給するための電池と、外部からクロック停止信
号を入力するとクロック発生手段によるクロック信号の
発生を停止させるクロック停止手段とを備えたものであ
る。A contactless card according to the present invention includes a data transmitting/receiving means for contactlessly transmitting and receiving data, a data processing means connected to the data transmitting/receiving means and for processing data, and a data processing means for generating a clock signal. a clock generating means for supplying the data to the data processing means, a battery for supplying power to the data transmitting/receiving means, the data processing means and the clock generating means, respectively; and a clock signal generated by the clock generating means when a clock stop signal is input from the outside. clock stop means for stopping the generation of the clock.
この発明においては、クロック停止手段が外部から入力
されたクロック停止信号に基づいてクロック発生手段を
停止させ、これにより電池の電力消費が停止する。In this invention, the clock stop means stops the clock generation means based on a clock stop signal input from the outside, thereby stopping power consumption of the battery.
以下、この発明の実施例を添付図面に基づいて説明する
。Embodiments of the present invention will be described below with reference to the accompanying drawings.
第１図はこの発明の一実施例に係る非接触カード（１０
）の構成を示すブロック図である。このカード（１０）
はＣＰ Ｕ （１１）を有しており、ＣＰ Ｕ （１１
）にバス（１８）が接続されている。バス（１８）には
、ＣＰＩＪ （１１）の動作制御のためのプログラムを
記憶するＲ ＯＭ （１２）、データを記憶するための
ＲＡ Ｍ （１３）及び外部装置（図示せず）とのデー
タの入出力を制御する入出力制御回路（１５）がそれぞ
れ接続されている。さらに、入出力制御回路（１５）に
は変復調回路（１６）が接続され、この変復調回路（１
６）にアンテナ（１７）が接続されている。FIG. 1 shows a contactless card (10
) is a block diagram showing the configuration of. This card (10)
has CPU (11), and CPU (11) has CPU (11).
) is connected to a bus (18). The bus (18) includes a ROM (12) that stores a program for controlling the operation of the CPIJ (11), a RAM (13) that stores data, and a data exchanger with an external device (not shown). An input/output control circuit (15) for controlling input/output is connected to each. Further, a modulation/demodulation circuit (16) is connected to the input/output control circuit (15).
6) is connected to an antenna (17).
ＣＰ Ｕ （１１）にクロック信号を供給するクロック
発生回路（１９）が接続され、このクロック発生回路（
１９）にはカード（１０）外部からのクロック停止信号
に基づいてクロック発生回路（１９）の動作を停止させ
るクロック停止回路（２０）が接続されている。また、
カード（１０）には、カード（１０）内部の各電気回路
に電源を供給するための電池（１４）が内蔵されている
。A clock generation circuit (19) that supplies a clock signal to the CPU (11) is connected, and this clock generation circuit (
19) is connected to a clock stop circuit (20) that stops the operation of the clock generation circuit (19) based on a clock stop signal from outside the card (10). Also,
The card (10) has a built-in battery (14) for supplying power to each electric circuit inside the card (10).
変復調回路（１６）及びアンテナ（１７）によりデータ
送受信手段が、ｃ ｐ Ｕ （１１）によりデータ処理
手段が、クロック発生回路（１９）によりクロック発生
手段が、クロック停止回路（２０）によりクロック停止
手段がそれぞれ構成されている。The modulation/demodulation circuit (16) and the antenna (17) serve as data transmission/reception means, the cp U (11) serves as data processing means, the clock generation circuit (19) serves as clock generation means, and the clock stop circuit (20) serves as clock stop means. are each configured.
クロック発生回路（１９）及びクロック停止回路（２０
）の内部構成を第２図に示す。第１のフリップフロップ
（２１）の出力端子Ｑにアンド回路（２２）、ナンド回
路（２３）、１／２分周器（２４）及び（２５）を介し
てナンド回路（２６）が接続されている。このナンド回
路（２６）はＣＰ Ｕ （１１）に接続されている。ま
た、１７２分周器（２４）の出力は１７８分周器（２７
）、アンド回路（２８）、プリスケーラ（２９）及びタ
イマ（３０）を介して第２の７リツプフロツプ（３１）
のセット端子Ｓに接続されている。このフリップフロッ
プ（３１）の出力端子Ｑがアンド回路（３２）を介して
ナンド回路（２６）に接続されている。ナンド回路（２
３）には共振子（３３）が接続され、これらナンド回Ｎ
（２３）及び共振子（３３）により共振回路（３４）
が形成されている。Clock generation circuit (19) and clock stop circuit (20)
) is shown in Figure 2. A NAND circuit (26) is connected to the output terminal Q of the first flip-flop (21) via an AND circuit (22), a NAND circuit (23), and 1/2 frequency dividers (24) and (25). There is. This NAND circuit (26) is connected to the CPU (11). Also, the output of the 172 frequency divider (24) is the output of the 178 frequency divider (27
), a second 7 lip-flop (31) via an AND circuit (28), a prescaler (29) and a timer (30).
is connected to the set terminal S of. An output terminal Q of this flip-flop (31) is connected to a NAND circuit (26) via an AND circuit (32). Nando circuit (2
3) is connected to a resonator (33), and these NAND circuits N
(23) and resonator (33) to form a resonant circuit (34)
is formed.
次に、実施例の動作を説明する。まず、製造工程におい
て第１図に示す非接触カード（１０）の各回路を製造す
ると共にこの非接触カード（１０）に電池（１４）を搭
載した後、必要に応じて製品テストが行われる。この場
合、第２図に示す第１のフリップフロップ（２１）のセ
ット端子Ｓ及び第２のフリップフロップ（３１）のリセ
ット端子Ｒにそれぞれリセット信号が入力される。また
、アンド回路（２２）及び（３２）にはそれぞれ“Ｈ”
レベルのクロック停止信号が入力される。セット端子Ｓ
にリセット信号を入力した第１のフリップフロップ（２
１）は出力端子Ｑから“Ｈ”レベルの発振許可信号をア
ンド回路（２２）を介してナンド回路（２３〉に出力す
る。これにより、共振回路（３４）による発振が開始さ
れ、共振回路（３４）の出力は１７２分周器（２４）及
び（２５）により１／４に分周されてナンド回路（２６
）から内部クロックとして出力される。尚、実際には、
発振波形が安定するまでの遅延をかけるために、１７８
分周器（２７）、プリスケーラ（２９）、タイマ（３０
）及び第２のフリップフロップ（３１）が作用して、共
振回路（３４）による発振開始からタイマ（３０）がオ
ーバーフローするまでの所定時間が経過した後に内部ク
ロックが出力される。Next, the operation of the embodiment will be explained. First, in the manufacturing process, each circuit of the contactless card (10) shown in FIG. 1 is manufactured, and after a battery (14) is mounted on the contactless card (10), a product test is performed as necessary. In this case, a reset signal is input to the set terminal S of the first flip-flop (21) and the reset terminal R of the second flip-flop (31) shown in FIG. 2, respectively. Also, “H” is applied to AND circuits (22) and (32), respectively.
A level clock stop signal is input. Set terminal S
The first flip-flop (2
1) outputs an "H" level oscillation enable signal from the output terminal Q to the NAND circuit (23) via the AND circuit (22).As a result, oscillation by the resonant circuit (34) is started, and the resonant circuit ( The output of 34) is divided into 1/4 by 172 frequency dividers (24) and (25) and then sent to NAND circuit (26).
) is output as an internal clock. In fact,
178 to add a delay until the oscillation waveform stabilizes.
Frequency divider (27), prescaler (29), timer (30)
) and the second flip-flop (31) act to output the internal clock after a predetermined time has elapsed from the start of oscillation by the resonant circuit (34) until the timer (30) overflows.
このようにして起動した内部クロックによりＣＰ Ｕ
（１１）は動作可能となり、この状態で、非接触カード
（１０）が正常に動作するか否かを確認する製品テスト
が行われる。The internal clock started in this way allows the CPU to
(11) becomes operational, and in this state, a product test is performed to confirm whether the contactless card (10) operates normally.
製品テストが終了すると、アンド回路（２２）及び（３
２）にそれぞれ“Ｌ”レベルのクロック停止信号を入力
させる。これにより、第１のフリ・ンブフロップ（２１
）からナンド回路（２３）への発振許可信号の入力がア
ンド回路（２２）によって遮断される。このため、共振
回路（３４）による発振が停止される。また、アンド回
Ｆ＆（３２）にも°゛Ｌ゛Ｌ゛ルベルック停止信号が入
力されるので、第２のフリップフロップ（３１）の出力
がナンド回Ｂ （２Ｂ）に入力することが遮断される。When the product test is completed, AND circuits (22) and (3
2) input a "L" level clock stop signal to each of them. This causes the first free flop (21
) to the NAND circuit (23) is blocked by the AND circuit (22). Therefore, oscillation by the resonant circuit (34) is stopped. In addition, since the °゛L゛L゛rubelook stop signal is also input to the AND circuit F& (32), the input of the output of the second flip-flop (31) to the NAND circuit B (2B) is blocked. .
すなわち、ナンド回Ｎ （２８）からの内部クロックの
発生が停止することとなる。その結果、ＣＰ Ｕ （１
１）の動作が停止し、カード（１０）全体の機能が停止
するため、再び内部クロックを起動させるまで電池（１
４）は消耗しなくなる。In other words, the generation of the internal clock from the NAND clock N (28) is stopped. As a result, CPU (1
1) will stop working, and the entire function of the card (10) will stop, so the battery (1
4) will no longer be consumed.
このようにして製品テストの後、出荷されるまで電池（
１４）の電力消費を停止させておくことにより、製造工
程中の電池（１４）の消耗が抑えられ、市場における非
接触カード（１０）の使用可能期間の向上及び安定化を
図ることができる。In this way, after product testing, the battery (
By stopping the power consumption of the contactless card (14), consumption of the battery (14) during the manufacturing process can be suppressed, and the usable period of the contactless card (10) on the market can be extended and stabilized.
尚、出荷直前に内部クロックを再起動させて動作状態の
非接触カード（１０）を出荷するようにしてもよく、あ
るいは内部クロックの発生を停止した状態で非接触カー
ド（１０）を出荷し、ユーザーにより使用直前に内部ク
ロックを再起動させるようにしてもよい。Note that the contactless card (10) may be shipped in an operating state by restarting the internal clock immediately before shipping, or the contactless card (10) may be shipped with generation of the internal clock stopped. The internal clock may be restarted by the user immediately before use.
また、使用時におけるこの非接触カード（１０）の外部
とのデータの送受信は、第６図に示した従来のカードと
同様の方式で行われる。すなわち、外部装置（図示せず
）からの電磁波による入力信号がアンテナ（１７）で受
信されると、この信号は変復調回路（１６）でディジタ
ル化された後、入出力制御回路（１５）を介してＣＰ
Ｕ （１１）に入力される。ｃｐｕ（１１）はＲＯＭ
（１２）に格納されているプログラムに従って入力信号
を処理すると共に必要に応じてデータをＲＡ Ｍ （１
３）に格納する。外部装置に応答するデータ例えば処理
結果等は、入出力制御回路（１５）を介して変復調回路
（１６）に入力され、ここでアナログ化された後、アン
テナ（１７）から外部装置に電磁波として送信される。Further, during use, data transmission and reception of this contactless card (10) with the outside is performed in a manner similar to that of the conventional card shown in FIG. That is, when an input signal in the form of electromagnetic waves from an external device (not shown) is received by the antenna (17), this signal is digitized by the modulation/demodulation circuit (16) and then sent through the input/output control circuit (15). Te CP
It is input to U (11). cpu(11) is ROM
(12) Processes input signals according to the program stored in RAM (12) and stores data as necessary in RAM (1
3). Data that responds to an external device, such as processing results, is input to the modulation/demodulation circuit (16) via the input/output control circuit (15), where it is converted into analog data and then transmitted as electromagnetic waves from the antenna (17) to the external device. be done.
第２図に示したアンド回路（２２）及び（３２）へのク
ロック停止信号の入力方法としては、例えば第３図に示
すように、封止されたカード（４０）の外装材に一対の
挿入孔（４１ａ）及び（４１ｂ）を設け、これら挿入孔
（４１ａ）及び（４１ｂ）に導通部材（４２）の一対の
脚部（４２ａ）及び（４２ｂ）を挿入する方法がある。As a method of inputting the clock stop signal to the AND circuits (22) and (32) shown in FIG. 2, for example, as shown in FIG. There is a method in which holes (41a) and (41b) are provided and a pair of legs (42a) and (42b) of the conductive member (42) are inserted into these insertion holes (41a) and (41b).
一方の挿入孔（４１ａ）は第２図のアンド回路（２２）
及び（３２）の−入力端に、他方の挿入孔（４１ｂ）は
接地ライン（図示せず）にそれぞれ対応する位置に形成
される。One insertion hole (41a) is connected to the AND circuit (22) in Figure 2.
and (32), the other insertion hole (41b) is formed at a position corresponding to a ground line (not shown), respectively.
そして、導通部材（４２）の脚部（４２ａ）及び（４２
ｂ）を挿入してこれらをそれぞれアンド回路（２２）及
び（３２）の−入力端及び接地ラインに接触させること
により、導通部材（４２）を介してアンド回路（２２）
及び（３２）に“Ｌ”レベルのクロック停止信号が入力
される。このような方法にすれば、カード（４０）を封
止した後にも容易に内部クロックの発生を制御すること
ができる５すなわち、製品テスト後は導通部材（４２）
をカード（４０）に取り付けておき、出荷直前あるいは
使用直前に導通部材（４２）をカード（４０）から除去
すればよい。And the leg portions (42a) and (42) of the conductive member (42).
b) and bring them into contact with the -input ends and ground lines of the AND circuits (22) and (32), respectively, thereby connecting the AND circuit (22) through the conductive member (42).
A clock stop signal of "L" level is input to (32). With this method, it is possible to easily control the generation of the internal clock even after the card (40) is sealed.5 In other words, after the product test, the conductive member (42)
is attached to the card (40), and the conductive member (42) is removed from the card (40) immediately before shipping or immediately before use.
尚、第４図に示すように、カード（５０）の側部に挿入
孔（５１ａ）及び（５１ｂ）を形成し、ここに導通部材
（５２）の脚部（５２＆＞及び（５２ｂ）を挿入するよ
うにしてもよい。As shown in FIG. 4, insertion holes (51a) and (51b) are formed on the side of the card (50), and the legs (52&> and (52b) of the conductive member (52) are inserted into these holes. You may also do so.
また、第５図に示すように、各回路を搭載した基板（６
０）の一部に端子（６１）を形成すると共にこの端子（
６１）を第２図のアンド回路（２２）及び（３２）の−
入力端に接続しておいてもよい、接地されたクリップ等
の接触部材（図示せず）を端子（６１）に接触させるこ
とによりこの端子（６１）を接地レベルとすることがで
きる。In addition, as shown in Figure 5, a board (6
A terminal (61) is formed on a part of the terminal (61).
61) in the AND circuits (22) and (32) in Figure 2.
The terminal (61) can be brought to the ground level by contacting the terminal (61) with a grounded contact member (not shown) such as a clip, which may be connected to the input end.
以上説明したように、データの送受信を非接触で行うた
めのデータ送受信手段と、データ送受信手段に接続され
ると共にデータを処理するためのデータ処理手段と、ク
ロック信号を発生させてこれをデータ処理手段に供給す
るためのクロック発生手段と、データ送受信手段、デー
タ処理手段及びタロツク発生手段にそれぞれ電源を供給
するためのｔｍと、外部からクロック停止信号を入力す
るとクロック発生手段によるクロック信号の発生を停止
させるクロック停止手段とを備えているので、市場にお
ける非接触カードの使用可能期間を長く且つ安定したも
のとすることができる。As explained above, there is a data transmitting/receiving means for contactlessly transmitting and receiving data, a data processing means connected to the data transmitting/receiving means and for processing data, and a data processing means for generating a clock signal and processing the data. tm for supplying power to the data transmitting/receiving means, data processing means, and tarlock generating means, respectively; Since the contactless card is provided with clock stopping means for stopping the clock, the usable period of the contactless card in the market can be made long and stable.
第１図はこの発明の一実施例に係る非接触カードの構成
を示すブロック図、第２図はクロック発生回路及びクロ
ック停止回路の内部構成を示すブロック図、第３図〜第
５図はそれぞれクロック停止信号を与える方法を示す図
、第６図は従来の非接触カードの構成を示すブロック図
である。
図において、（１１）はＣＰＵ、（１４）は電池、（１
６）は変復調回路、（１７）はアンテナ、（１９）はク
ロック発生回路、（２０）はクロック停止回路である。
なお、各図中同一符号は同一または相当部分を示す。FIG. 1 is a block diagram showing the configuration of a contactless card according to an embodiment of the present invention, FIG. 2 is a block diagram showing the internal configuration of a clock generation circuit and a clock stop circuit, and FIGS. 3 to 5 are respectively FIG. 6 is a block diagram showing the configuration of a conventional contactless card, which shows a method of giving a clock stop signal. In the figure, (11) is the CPU, (14) is the battery, and (1
6) is a modulation/demodulation circuit, (17) is an antenna, (19) is a clock generation circuit, and (20) is a clock stop circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
段と、 前記データ送受信手段に接続されると共にデータを処理
するためのデータ処理手段と、 クロック信号を発生させてこれを前記データ処理手段に
供給するためのクロック発生手段と、前記データ送受信
手段、データ処理手段及びクロック発生手段にそれぞれ
電源を供給するための電池と、 外部からクロック停止信号を入力すると前記クロック発
生手段によるクロック信号の発生を停止させるクロック
停止手段と を備えたことを特徴とする非接触カード。[Scope of Claims] Data transmitting/receiving means for contactlessly transmitting and receiving data; data processing means connected to the data transmitting/receiving means and for processing data; A clock generating means for supplying power to the data processing means, a battery for supplying power to the data transmitting/receiving means, the data processing means and the clock generating means, respectively; and a clock generated by the clock generating means when a clock stop signal is input from the outside. A contactless card characterized by comprising a clock stop means for stopping the generation of a signal.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2162806A JPH0454581A (en) | 1990-06-22 | 1990-06-22 | Non-contact card |
| FR9015783A FR2663764B1 (en) | 1990-06-22 | 1990-12-17 | CONTACTLESS CARD. |
| DE4120265A DE4120265C2 (en) | 1990-06-22 | 1991-06-19 | IC card |
| US08/022,882 US5274221A (en) | 1990-06-22 | 1993-02-16 | Non-contact integrated circuit card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2162806A JPH0454581A (en) | 1990-06-22 | 1990-06-22 | Non-contact card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0454581A true JPH0454581A (en) | 1992-02-21 |
Family
ID=15761578
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2162806A Pending JPH0454581A (en) | 1990-06-22 | 1990-06-22 | Non-contact card |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPH0454581A (en) |
| DE (1) | DE4120265C2 (en) |
| FR (1) | FR2663764B1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05142342A (en) * | 1991-11-25 | 1993-06-08 | Nippondenso Co Ltd | Information storage medium and its issuance equipment |
| US5569903A (en) * | 1993-07-05 | 1996-10-29 | Mitsubishi Denki Kabushiki Kaisha | Non-contact IC card |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4205827C2 (en) * | 1992-02-26 | 1997-10-16 | Angewandte Digital Elektronik | Chip card for contactless, bidirectional transmission of energy and data with a read / write device |
| DE4205556C2 (en) * | 1992-02-24 | 1998-02-26 | Angewandte Digital Elektronik | Chip card with electronic elements for contactless exchange of data with an external device |
| DE4207779A1 (en) * | 1992-03-11 | 1993-09-16 | Provera Ges Fuer Projektierung | IC data card with non-contact transmission of signals and power - has single contact to screening layer on card that connects with embedded circuitry to hold constant voltage level, and memory for stored information |
| JP2842750B2 (en) * | 1992-04-07 | 1999-01-06 | 三菱電機株式会社 | IC card |
| US5497140A (en) * | 1992-08-12 | 1996-03-05 | Micron Technology, Inc. | Electrically powered postage stamp or mailing or shipping label operative with radio frequency (RF) communication |
| USRE42773E1 (en) | 1992-06-17 | 2011-10-04 | Round Rock Research, Llc | Method of manufacturing an enclosed transceiver |
| US5776278A (en) | 1992-06-17 | 1998-07-07 | Micron Communications, Inc. | Method of manufacturing an enclosed transceiver |
| DE4319878A1 (en) * | 1992-06-17 | 1993-12-23 | Micron Technology Inc | High frequency identification system card - has integrated circuit chip or carrier layer sealed by top layer and coupled to batteries and antenna system |
| US7158031B2 (en) | 1992-08-12 | 2007-01-02 | Micron Technology, Inc. | Thin, flexible, RFID label and system for use |
| DE4409645A1 (en) * | 1994-03-21 | 1995-09-28 | Cohausz Helge B | Data card such as credit card having two way data exchange |
| DE19601358C2 (en) * | 1995-01-20 | 2000-01-27 | Fraunhofer Ges Forschung | Integrated circuit paper |
| DE19633945A1 (en) * | 1996-08-22 | 1998-02-26 | Siemens Ag | Data processing system which has a card-shaped carrier with display |
| US5988510A (en) * | 1997-02-13 | 1999-11-23 | Micron Communications, Inc. | Tamper resistant smart card and method of protecting data in a smart card |
| US5919259A (en) * | 1997-04-18 | 1999-07-06 | Dahl; Nathaniel H. | Method and apparatus for supplying power to a CPU using an adaptor card |
| US6329213B1 (en) | 1997-05-01 | 2001-12-11 | Micron Technology, Inc. | Methods for forming integrated circuits within substrates |
| US6339385B1 (en) | 1997-08-20 | 2002-01-15 | Micron Technology, Inc. | Electronic communication devices, methods of forming electrical communication devices, and communication methods |
| US6273339B1 (en) | 1999-08-30 | 2001-08-14 | Micron Technology, Inc. | Tamper resistant smart card and method of protecting data in a smart card |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63157253A (en) * | 1986-12-22 | 1988-06-30 | Toshiba Corp | Portable medium |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61160566U (en) * | 1985-03-25 | 1986-10-04 | ||
| JP2567219B2 (en) * | 1985-07-03 | 1996-12-25 | 日本エルエスアイカード 株式会社 | Non-contact method for writing / reading between memory substrate and read / write device |
| JPS6234292A (en) * | 1985-08-08 | 1987-02-14 | Koito Ind Co Ltd | Ic card device |
| JPS62237592A (en) * | 1986-04-08 | 1987-10-17 | Casio Comput Co Ltd | Clock switching system for ic card |
| GB2194082A (en) * | 1986-08-18 | 1988-02-24 | Philips Nv | Data processing apparatus with energy saving clocking device |
-
1990
- 1990-06-22 JP JP2162806A patent/JPH0454581A/en active Pending
- 1990-12-17 FR FR9015783A patent/FR2663764B1/en not_active Expired - Fee Related
-
1991
- 1991-06-19 DE DE4120265A patent/DE4120265C2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63157253A (en) * | 1986-12-22 | 1988-06-30 | Toshiba Corp | Portable medium |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05142342A (en) * | 1991-11-25 | 1993-06-08 | Nippondenso Co Ltd | Information storage medium and its issuance equipment |
| US5569903A (en) * | 1993-07-05 | 1996-10-29 | Mitsubishi Denki Kabushiki Kaisha | Non-contact IC card |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2663764B1 (en) | 1993-11-12 |
| DE4120265C2 (en) | 1996-07-25 |
| DE4120265A1 (en) | 1992-01-09 |
| FR2663764A1 (en) | 1991-12-27 |
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