JPH0451473Y2 - - Google Patents

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Publication number
JPH0451473Y2
JPH0451473Y2 JP1986039054U JP3905486U JPH0451473Y2 JP H0451473 Y2 JPH0451473 Y2 JP H0451473Y2 JP 1986039054 U JP1986039054 U JP 1986039054U JP 3905486 U JP3905486 U JP 3905486U JP H0451473 Y2 JPH0451473 Y2 JP H0451473Y2
Authority
JP
Japan
Prior art keywords
substrate
electrode
impedance
high frequency
etching rate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1986039054U
Other languages
Japanese (ja)
Other versions
JPS62152435U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986039054U priority Critical patent/JPH0451473Y2/ja
Publication of JPS62152435U publication Critical patent/JPS62152435U/ja
Application granted granted Critical
Publication of JPH0451473Y2 publication Critical patent/JPH0451473Y2/ja
Expired legal-status Critical Current

Links

Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案はドライエツチング装置に係り、特に、
ウエハ内のエツチング速度の均一性を向上させる
のに好適なドライエツチング装置に関するもので
ある。
[Detailed description of the invention] [Field of industrial application] The present invention relates to a dry etching device, and in particular,
The present invention relates to a dry etching apparatus suitable for improving the uniformity of etching rate within a wafer.

〔従来の技術〕[Conventional technology]

従来の装置は、特公昭56−47950号公報に記載
のように、試料を電極に配置し、試料によつて覆
われていない電極部分にフツ素樹脂または炭素か
らなる電極被覆部分を配置し、充分な熱伝達と汚
染防止とを両立させ、更にはシリコン酸化物に対
する高いエツチング速度を得るようにしたものが
ある。しかし、試料部分と電極被覆部分とのイン
ピーダンスの違いについては配慮されていなかつ
た。
In the conventional apparatus, as described in Japanese Patent Publication No. 56-47950, a sample is placed on an electrode, and an electrode covering part made of fluororesin or carbon is placed on the part of the electrode that is not covered by the sample. There is a method that achieves both sufficient heat transfer and contamination prevention, and also achieves a high etching rate for silicon oxide. However, no consideration was given to the difference in impedance between the sample portion and the electrode covering portion.

〔考案が解決しようとする問題点〕[Problem that the invention attempts to solve]

上記従来技術は、電極材料と基板とのインピー
ダンスの違いについて配慮されておらず、インピ
ーダンスは周波数に反比例して変わるため、RF
電源の周波数が低周波域(1KHz〜10MHz未満)
においては、電極と基板とのインピーダンスの違
いによりそれぞれ入射する荷電粒子の量の変化が
顕著に現われ、このため基板と基板周辺に入射す
る荷電粒子に差が生じ、基板内のエツチング速度
の均一性が悪くなるという問題があつた。
The above conventional technology does not consider the difference in impedance between the electrode material and the substrate, and impedance varies inversely with frequency, so RF
The frequency of the power supply is in the low frequency range (1KHz to less than 10MHz)
In this method, the amount of charged particles incident on the electrode and the substrate changes significantly due to the difference in impedance between the electrode and the substrate, and this causes a difference in the amount of charged particles incident on the substrate and the periphery of the substrate, resulting in an increase in the uniformity of the etching rate within the substrate. I had a problem with it getting worse.

本考案の目的は、周波数の低いRF電源を用い
た場合の基板内のエツチング速度の均一性を向上
を図ることのできるドライエツチング装置を提供
することにある。
An object of the present invention is to provide a dry etching apparatus that can improve the uniformity of etching speed within a substrate when using a low frequency RF power source.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、高周波電圧が印加される電極に基
板を配置し、基板をガスプラズマによつてエツチ
ングするドライエツチング装置において、電極に
印加する高周波電圧の周波数を1KHz〜10MHz未
満の低周波域の高周波とし、基板を配置した電極
の基板周囲を基板と同じインピーダンスにした部
材で覆うことにより、達成される。
The above purpose is to set the frequency of the high frequency voltage applied to the electrode to a high frequency in the low frequency range of 1KHz to less than 10MHz in a dry etching device in which a substrate is placed on an electrode to which a high frequency voltage is applied and the substrate is etched by gas plasma. This is achieved by covering the periphery of the electrode on which the substrate is placed with a member having the same impedance as the substrate.

〔作用〕[Effect]

基板を配置する部分以外の電極上を基板と同じ
インピーダンスの部材で覆うことにより基板と電
極とのインピーダンスの差がなくなり、これによ
つて、電極に周波数を1KHz〜10MHz未満の低周
波域の高周波電圧を印加した場合に、電極全面に
一様に荷電粒子が入射して、基板内のエツチング
速度が一様になり基板内のエツチング速度の均一
性が良くなる。
By covering the electrode other than the part where the board is placed with a member with the same impedance as the board, the difference in impedance between the board and the electrode is eliminated. When a voltage is applied, charged particles are uniformly incident on the entire surface of the electrode, and the etching rate within the substrate becomes uniform, improving the uniformity of the etching rate within the substrate.

〔実施例〕〔Example〕

以下、本考案の一実施例を第1図と第2図とに
より説明する。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図はエツチング装置の構成を示すもので、
互いに平行な電極3,5を有し、基板2を載置す
る電極3には例えば周板数800KHzの低周波RF電
源1が接続されており、電極5は接地電位となつ
ている。基板2を載置する部分以外は、基板2と
同じインピーダンスの材料から成る例えば、シリ
コンの円板4が配置してある。また、基板2の同
じインピーダンスの円板4の材料として、絶縁性
材料例えば、石英、アルミナ、サフアイヤ、Cと
FあるいはCとFとHからなる有機材料等の厚さ
を変えてインピーダンスを合わせたものでも良
い。
Figure 1 shows the configuration of the etching device.
It has electrodes 3 and 5 that are parallel to each other, and a low frequency RF power source 1 having a circuit plate number of 800 KHz, for example, is connected to the electrode 3 on which the substrate 2 is placed, and the electrode 5 is at ground potential. A circular plate 4 made of a material having the same impedance as the substrate 2, such as silicon, is disposed except for the portion on which the substrate 2 is placed. In addition, as the material of the disk 4 of the same impedance of the substrate 2, the impedance is matched by changing the thickness of an insulating material such as quartz, alumina, sapphire, an organic material made of C and F or C, F, and H. Anything is fine.

第2図は、CF4ガスを用いてSiO2膜をエツチン
グした場合のエツチング速度の基板内の分布を示
したものである。曲線aは円板4を載置しない場
合のエツチング速度の分布である。円板4を配置
しない場合は、基板2に比べて電極3がむき出し
になつている部分はインピーダンスが小さいため
に、基板2の周辺部への荷電粒子の入射が多くな
り、基板2の外周部のエツチング速度が大きくな
つている。線bは、円板4を配置した場合のエツ
チング速度の分布である。この場合は、基板2の
部分と円板4の部分とのインピーダンスの差がな
くなるため、電極3に一様に荷電粒子が入射し、
基板内のエツチング速度が一様になつている。
FIG. 2 shows the distribution of etching rates within the substrate when a SiO 2 film is etched using CF 4 gas. Curve a is the etching rate distribution when the disk 4 is not placed. If the disk 4 is not arranged, the impedance of the exposed portion of the electrode 3 is lower than that of the substrate 2, so that more charged particles are incident on the periphery of the substrate 2. The etching speed is increasing. Line b is the etching rate distribution when the disk 4 is arranged. In this case, since there is no difference in impedance between the substrate 2 part and the disk 4 part, charged particles uniformly enter the electrode 3,
The etching rate within the substrate is uniform.

以上、本一実施例によれば、特に同波数の低い
RF電源を用いた場合のエツチングにおいても、
基板内のエツチング速度の均一性を向上させるこ
とができる。
As described above, according to the first embodiment, especially when the wave number is low,
Even in etching when using an RF power source,
The uniformity of etching rate within the substrate can be improved.

なお、本実施例では、基板を載置する電極に
RF電源を接続するカソード結合方式を例にあげ
て説明したが、基板を載置する電極と対向する電
極にRF電源を接続するアノード結合方式におい
ても同様な効果が得られる。
Note that in this example, the electrode on which the substrate is placed is
Although the description has been given using the cathode coupling method in which the RF power source is connected as an example, the same effect can be obtained by using the anode coupling method in which the RF power source is connected to the electrode opposite to the electrode on which the substrate is placed.

〔考案の効果〕[Effect of idea]

本考案によれば、電極のインピーダンスを変え
ることができるので、基板と電極とのインピーダ
ンスの差が補正され、周波数の低いRF電源を用
いた場合の、基板内のエツチング速度の均一性が
向上するという効果がある。
According to the present invention, since the impedance of the electrode can be changed, the difference in impedance between the substrate and the electrode is corrected, and the uniformity of the etching rate within the substrate is improved when using a low frequency RF power source. There is an effect.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の一実施例であるドライエツ
チング装置を示す構成図、第2図は、本考案の一
実施例のエツチング速度分布を示すグラフであ
る。 1……RF電源、2……基板、3……電極、4
……円板、5……電極。
FIG. 1 is a block diagram showing a dry etching apparatus according to an embodiment of the present invention, and FIG. 2 is a graph showing an etching rate distribution according to an embodiment of the present invention. 1...RF power supply, 2...substrate, 3...electrode, 4
...disk, 5...electrode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 高周波電圧が印加される電極に基板を配置し、
前記基板をガスプラズマによつてエツチングする
ドライエツチング装置において、前記電極に印加
する高周波電圧の周波数を1KHz〜10MHz未満の
低周波域の高周波とし、前記基板を配置した電極
の前記基板周囲を前記基板と同じインピーダンス
にした部材で覆つたことを特徴とするドライエツ
チング装置。
Place the substrate on the electrode to which a high frequency voltage is applied,
In a dry etching apparatus that etches the substrate with gas plasma, the frequency of the high frequency voltage applied to the electrode is set to a high frequency in a low frequency range of 1 KHz to less than 10 MHz, and the area around the substrate around the electrode on which the substrate is placed is etched by the substrate. A dry etching device characterized by being covered with a member having the same impedance as .
JP1986039054U 1986-03-19 1986-03-19 Expired JPH0451473Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986039054U JPH0451473Y2 (en) 1986-03-19 1986-03-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986039054U JPH0451473Y2 (en) 1986-03-19 1986-03-19

Publications (2)

Publication Number Publication Date
JPS62152435U JPS62152435U (en) 1987-09-28
JPH0451473Y2 true JPH0451473Y2 (en) 1992-12-03

Family

ID=30851870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986039054U Expired JPH0451473Y2 (en) 1986-03-19 1986-03-19

Country Status (1)

Country Link
JP (1) JPH0451473Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58125831A (en) * 1982-01-22 1983-07-27 Seiko Epson Corp Dry etching device
JPS58168232A (en) * 1982-03-30 1983-10-04 Fujitsu Ltd Parallel flat plate type dry etching appratus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58125831A (en) * 1982-01-22 1983-07-27 Seiko Epson Corp Dry etching device
JPS58168232A (en) * 1982-03-30 1983-10-04 Fujitsu Ltd Parallel flat plate type dry etching appratus

Also Published As

Publication number Publication date
JPS62152435U (en) 1987-09-28

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