JPH0451135U - - Google Patents
Info
- Publication number
- JPH0451135U JPH0451135U JP1990093046U JP9304690U JPH0451135U JP H0451135 U JPH0451135 U JP H0451135U JP 1990093046 U JP1990093046 U JP 1990093046U JP 9304690 U JP9304690 U JP 9304690U JP H0451135 U JPH0451135 U JP H0451135U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- bumps
- view
- inner lead
- plan
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73229—Wire and TAB connectors
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990093046U JPH0451135U (tr) | 1990-09-03 | 1990-09-03 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990093046U JPH0451135U (tr) | 1990-09-03 | 1990-09-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0451135U true JPH0451135U (tr) | 1992-04-30 |
Family
ID=31829965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990093046U Pending JPH0451135U (tr) | 1990-09-03 | 1990-09-03 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0451135U (tr) |
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1990
- 1990-09-03 JP JP1990093046U patent/JPH0451135U/ja active Pending