JPH0451082B2 - - Google Patents

Info

Publication number
JPH0451082B2
JPH0451082B2 JP11572783A JP11572783A JPH0451082B2 JP H0451082 B2 JPH0451082 B2 JP H0451082B2 JP 11572783 A JP11572783 A JP 11572783A JP 11572783 A JP11572783 A JP 11572783A JP H0451082 B2 JPH0451082 B2 JP H0451082B2
Authority
JP
Japan
Prior art keywords
delay line
parallel
conductor
axis
electromagnetic delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11572783A
Other languages
Japanese (ja)
Other versions
JPS607201A (en
Inventor
Kazuo Kametani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elmec Corp
Original Assignee
Elmec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elmec Corp filed Critical Elmec Corp
Priority to JP11572783A priority Critical patent/JPS607201A/en
Publication of JPS607201A publication Critical patent/JPS607201A/en
Publication of JPH0451082B2 publication Critical patent/JPH0451082B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P9/00Delay lines of the waveguide type

Landscapes

  • Coils Or Transformers For Communication (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はインダクタンス素子とコンデンサを組
合せた集中定数型の電磁遅延線に係り、立ち上が
り時間が超高速で出力波形歪の少ない電磁遅延線
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a lumped constant electromagnetic delay line that combines an inductance element and a capacitor, and more particularly to an electromagnetic delay line that has an ultra-fast rise time and little output waveform distortion.

〔従来技術とその問題点〕[Prior art and its problems]

従来、集中定数型の電磁遅延線としては、導線
をボビンに巻いてインダクタンス素子を形成し、
このインダクタンス素子の所定のターン毎に導線
とアース間にコンデンサを接続し、複数区間から
なる構成を有したものが知られている。
Conventionally, lumped constant electromagnetic delay lines have been created by winding a conductor around a bobbin to form an inductance element.
It is known that a capacitor is connected between the conducting wire and the ground at each predetermined turn of the inductance element, and the inductance element has a configuration consisting of a plurality of sections.

しかしながら、このように構成された電磁遅延
線は、高い周波数帯域にあつて、インダクタンス
素子における区間相互間の結合係数の極性および
値を最適なものに選定することが困難である。特
に、隣合う区間相互の結合係数および1つおいた
区間相互の結合係数の最適値を選定することが難
しい。
However, in the electromagnetic delay line configured in this manner, it is difficult to select the optimum polarity and value of the coupling coefficient between sections in the inductance element in a high frequency band. In particular, it is difficult to select optimal values for the coupling coefficients between adjacent sections and the coupling coefficients between adjacent sections.

その結果立ち上がり時間が1ns程度の高速で、
かつ出力波形歪の良好な電磁遅延線を得ることが
難しかつた。
As a result, the rise time is fast, about 1 ns,
Moreover, it was difficult to obtain an electromagnetic delay line with good output waveform distortion.

〔発明の目的〕[Purpose of the invention]

本発明はこのような従来の欠点を解決するため
になされたもので、立ち上がり時間が極めて速く
出力波形歪の少ない、遅延特性の良好な電磁遅延
線の提供を目的とする。
The present invention has been made to solve these conventional drawbacks, and its object is to provide an electromagnetic delay line with an extremely fast rise time, little output waveform distortion, and good delay characteristics.

〔発明の構成と効果〕[Structure and effects of the invention]

この目的を達成するために本発明は、仮想軸線
に交わる導線および前記仮想軸線に平行な導線を
交互に形成してなる折り返し導線路のうち、前記
仮想軸線に交わる導線の中央部とアース間にコン
デンサを接続して複数区間からなる電磁遅延線を
構成し、前記仮想軸線と並行な導線の長さを隣合
う前記中央部間の間隔よりも大きくし、かつ前記
仮想軸線に交わる導線における前記中央部の両側
を、前記仮想軸線に並行な導線が接近するように
互いに反対方向に変形させたものである。
In order to achieve this object, the present invention provides a folded conductor line in which conductors intersecting a virtual axis and conductors parallel to the virtual axis are alternately formed, between the center part of the conductor intersecting the virtual axis and the ground. An electromagnetic delay line consisting of a plurality of sections is configured by connecting capacitors, the length of the conducting wire parallel to the virtual axis is made larger than the interval between the adjacent center portions, and the center of the conducting wire that intersects the virtual axis Both sides of the part are deformed in opposite directions so that the conductive wires parallel to the virtual axis approach each other.

このような本発明の構成によれば、高い周波数
帯にあつて、インダクタンス素子における最適な
結合状態を簡単に選定かつ調整することが可能に
なり、立ち上がり時間の超高速化および出力波形
の歪の向上等、遅延特性の向上を図ることができ
る。
According to the configuration of the present invention, it becomes possible to easily select and adjust the optimum coupling state in the inductance element in a high frequency band, thereby achieving ultra-high speed rise time and distortion of the output waveform. It is possible to improve the delay characteristics.

〔発明の実施例〕[Embodiments of the invention]

以下本発明の詳細を説明する。 The details of the present invention will be explained below.

第1図および第2図は本発明の電磁遅延線の一
実施例を示す展開図および斜視図である。
1 and 2 are a developed view and a perspective view showing an embodiment of the electromagnetic delay line of the present invention.

図において、矩形の折り返し形状を有しインダ
クタンス素子を構成する折り返し導線路1は、仮
想軸線(第1図中横方向の仮想線、図示省略)に
対し直交する導線2の中央部が、折れ曲がつて仮
想軸線と若干並行になつており、また導線2の端
部間が仮想軸線と並行な導線3となつている。導
線2の各中央部とアース間には、コンデンサCが
各々接続され、複数区間を有する集中定数型の電
磁遅延線が構成されている。
In the figure, a folded conductive line 1 having a rectangular folded shape and constituting an inductance element has a folded conductor 2 whose center portion is bent orthogonal to a virtual axis (horizontal virtual line in Figure 1, not shown). The conductive wire 2 is slightly parallel to the imaginary axis, and the conductive wire 3 is formed between the ends of the conductive wire 2 parallel to the imaginary axis. A capacitor C is connected between each central portion of the conducting wire 2 and the ground, thereby configuring a lumped constant electromagnetic delay line having a plurality of sections.

折り返し導線路1は、隣合う導線2の中央部間
隔(1区間当たりのピツチP)よりも1区間にお
ける導線2間の有効長(導線2中心間の長さ)X
の方が長くなつており、1つおいた区間における
隣合う導線2間の有効長(隣合う導線2中心間の
長さ)G2がピツチPより短くなつている。そし
て、これらの関係は、次のように示される。
The folded conductor path 1 has an effective length between the conductor wires 2 in one section (length between the centers of the conductor wires 2)
is longer, and the effective length G2 between adjacent conducting wires 2 (the length between the centers of adjacent conducting wires 2) in one interval is shorter than the pitch P. And these relationships are shown as follows.

P=(X+G2)/2 ……(1) 展開された折り返し導線路1は、各区間におけ
る導線2の途中に、各導線2の中央部を挟むよう
に仮想軸線と並行に引かれた仮想線Q−Q,R−
Rにおいて、導線2を各々逆方向に直角に折り曲
げ、第2図および第4図Aに示すように、隣合う
区間の導線2を対向させている。すなわち、隣合
う区間の導線2は、縦断面方向から見て互いに重
なり合つて対向するように構成されている。
P = (X + G2) / 2 ... (1) The unfolded folded conductor line 1 is an imaginary line drawn parallel to the imaginary axis line in the middle of the conductor 2 in each section so as to sandwich the center of each conductor 2. Q-Q, R-
At R, the conductive wires 2 are each bent at right angles in opposite directions, and the conductive wires 2 in adjacent sections are made to face each other, as shown in FIGS. 2 and 4A. That is, the conductive wires 2 in adjacent sections are configured to overlap and face each other when viewed from the longitudinal cross-sectional direction.

この折り曲げ形成された折り返し導線路1は、
偏平で細長い誘電体板4の一主面(図中下面)に
アース電極5を形成するとともに対向主面(図中
上面)に所定の間隔で複数の容量電極6を形成し
たコンデンサCに、導線2の中央部を容量電極6
に接続して載置されている。
This folded conductor path 1 is
A conductive wire is connected to a capacitor C which has a ground electrode 5 formed on one main surface (lower surface in the figure) of a flat and elongated dielectric plate 4 and a plurality of capacitor electrodes 6 formed at predetermined intervals on the opposite main surface (upper surface in the figure). The center part of 2 is the capacitive electrode 6
It is connected and installed.

第3図は本発明の電磁遅延線の等価回路図を示
しており、図中符号S0,S1,S2は、第1図
における左側の区間を基準にして順次右側の区間
を示している。符号a1は区間S0の右側に隣合う
区間S1との間の結合係数であり、符号a2は区間
S0から右側に1つおいて結合する区間S2との
間の結合係数を示している。
FIG. 3 shows an equivalent circuit diagram of the electromagnetic delay line of the present invention, and symbols S0, S1, and S2 in the figure indicate sections on the right side in sequence with respect to the section on the left side in FIG. The symbol a 1 is the coupling coefficient between the section S0 and the section S1 adjacent to the right side, and the symbol a 2 is the coupling coefficient between the section S0 and the section S2 that is connected to the right side.

なお、第4図は、折り返し導線路1の1区間分
の導体2を横断面方向の側面から見た側面図であ
る。
Note that FIG. 4 is a side view of one section of the conductor 2 of the folded conductor path 1 viewed from the side in the cross-sectional direction.

次に、このように構成された電磁遅延線におけ
る結合係数を検討する。
Next, we will discuss the coupling coefficient in the electromagnetic delay line configured in this way.

一般に、折り返し導線路1における結合係数を
考える場合、折り返し導線路1を形成しかつ導体
間でなす角度が直角でないすべての導体間におい
て結合係数が存在するが、そのなかで値の大きな
ものについて検討することにより、折り返し導線
路1の結合係数の傾向を知ることが可能である。
Generally, when considering the coupling coefficient in the folded conductor line 1, there are coupling coefficients between all the conductors that form the folded conductor line 1 and the angles between the conductors are not right angles, but among them, the one with the largest value will be considered. By doing so, it is possible to know the tendency of the coupling coefficient of the folded conductive line 1.

そこで、本発明の電磁遅延線は、上述の第2図
および第4図Aにおいて対向する導線2,2間お
よび導線3,3間それぞれの結合が最も大きく影
響することになるので、それについて検討する。
Therefore, in the electromagnetic delay line of the present invention, the coupling between the opposing conductors 2 and 2 and between the conductors 3 and 3 in the above-mentioned FIG. 2 and FIG. do.

折り返し導線路1おいて、電流が第1図および
第2図に示す矢印のように流れると、区間S0,
S1間すなわち結合係数a1に関しては、仮想軸線
に並行な導線3のうち主にA−BとE−Fが関係
する。このA−BとE−F間では電流の向きが同
方向となつているので、正の結合が結合係数a1
影響する。
When the current flows in the folded conductor line 1 in the direction of the arrows shown in FIGS. 1 and 2, the sections S0,
Regarding the coupling coefficient a 1 between S1, A-B and E-F are mainly involved among the conducting wires 3 parallel to the virtual axis. Since the direction of current is the same between AB and EF, positive coupling affects the coupling coefficient a1 .

そして、導線3のA−BとE−F間の間隔G1
は、第4図Aに示すように、導線2が直角に折り
曲げられているので、第1図の仮想線Q−Q,R
−Rの間隔Zに等しくなる。従つて、間隔Zを変
化させることによつて結合係数a1の値を可変でき
る。
Then, the distance G1 between A-B and E-F of the conductor 3
As shown in FIG. 4A, since the conductor 2 is bent at right angles, the imaginary lines Q-Q, R in FIG.
- equal to the spacing Z of R. Therefore, by changing the interval Z, the value of the coupling coefficient a1 can be varied.

一方、区間S0,S2間すなわち結合係数a2
関しては、仮想軸線に直交する導線2のうち主に
B−D,G−Hが関係するが、B−D,G−H間
では電流の向きが逆方向となるので、結合係数a2
には負の結合が影響する。
On the other hand, regarding the coupling coefficient a 2 between the sections S0 and S2, B-D and G-H are mainly involved among the conductors 2 perpendicular to the virtual axis, but between B-D and G-H, the direction of the current is is in the opposite direction, so the coupling coefficient a 2
is affected by negative coupling.

そして、第1図に示す導線2間の間隔G2は、
前記(1)式において任意に決定することが可能であ
るので、結合係数a2を可変できる。
The distance G2 between the conductive wires 2 shown in FIG.
Since it is possible to arbitrarily determine the above equation (1), the coupling coefficient a 2 can be varied.

同様に、結合係数anにあつては、上述と同様
な理由によつて奇数番目の結合係数が正となり、
偶数番目の結合係数が負となる。
Similarly, for the coupling coefficient an, odd-numbered coupling coefficients are positive for the same reason as above,
Even-numbered coupling coefficients are negative.

本発明の電磁遅延線は、具体的に細かく遅延特
性を検討する場合、上述の結合の他、他の導体部
の結合も考慮して結合係数a1,a2,……anを求め
なければならないが、本発明の電磁遅延線にあつ
ては、奇数番目の結合係数が正となり、偶数番目
の結合係数が負となる傾向を有しており、電磁遅
延線として望ましい構成となつている。
When examining the delay characteristics of the electromagnetic delay line of the present invention in detail, it is necessary to calculate the coupling coefficients a 1 , a 2 , ... an by considering the coupling of other conductor parts in addition to the coupling described above. However, in the electromagnetic delay line of the present invention, odd-numbered coupling coefficients tend to be positive and even-numbered coupling coefficients tend to be negative, which is a desirable configuration for an electromagnetic delay line.

そして、一般に電磁遅延線にあつては、遅延特
性に対して結合係数a1,a2の影響が大きく、本発
明によれば、結合係数a1,a2の極性を望ましい極
性、すなわち結合係数a1を正、結合係数a2を負と
することが容易であり、ピツチP、1区間分の導
線3の有効長X、1つおいた区間の隣合う導線
2,2間の有効長G2、並びに仮想線Q−Q,R
−Rで折り曲げる角度等を適当に選択することに
より、結合係数の値を最適な値に近づけることも
容易である。
In general, in the case of an electromagnetic delay line, the coupling coefficients a 1 and a 2 have a large influence on the delay characteristics, and according to the present invention, the polarities of the coupling coefficients a 1 and a 2 are set to desired polarities, that is, the coupling coefficient It is easy to set a 1 to be positive and the coupling coefficient a 2 to be negative, and the pitch P, the effective length X of the conducting wire 3 for one section, and the effective length G2 between the adjacent conducting wires 2 in one section apart. , and the virtual line Q-Q,R
By appropriately selecting the angle of bending at −R, etc., it is easy to bring the value of the coupling coefficient close to the optimum value.

なお、本発明において折り返し導線路1は、銅
箔もしくは銅板をフオトエツチングして簡単に形
成できるし、断面円形の導線を折り曲げて構成す
ることもできる。
In the present invention, the folded conductive line 1 can be easily formed by photoetching a copper foil or a copper plate, or can be formed by bending a conductive wire having a circular cross section.

また、上述の実施例では、折り返し導線路1を
空心自立構造としたが、薄い絶縁フイイルムを貼
付けた銅箔をフオトエツチング等によつて形成
し、絶縁フイルムと一緒に四角形のボビン等に巻
つけることも可能である。
In the above embodiment, the folded conductor line 1 has an air-core free-standing structure, but a copper foil with a thin insulating film pasted thereon is formed by photo-etching or the like, and is wound together with the insulating film around a rectangular bobbin or the like. It is also possible.

本発明者は、具体的実施例として、直径0.2mm
の導線を使用し、ピツチP=2.05mm、X=3.7mm、
Z=G1=0.45mm、G2=0.4mm、Y=1.5mmの寸法関
係にして実験した。
As a specific example, the present inventor has provided a diameter of 0.2 mm.
Using the conductor, pitch P = 2.05mm, X = 3.7mm,
The experiment was conducted using the following dimensional relationships: Z=G1=0.45mm, G2=0.4mm, and Y=1.5mm.

すると、インダクタンス素子において結合係数
a1=0.161、結合係数a2=−0.0313、結合係数a3
0.0085となり、容量2pFのコンデンサと組合わせ
て20区間の電磁遅延線を構成すると、全遅延時間
2ns、特性インピーダンス50Ω、出力パルスの立
ち上がり時間が約250psの超高速電磁遅延線を得
ることができた。
Then, the coupling coefficient in the inductance element is
a 1 = 0.161, coupling coefficient a 2 = -0.0313, coupling coefficient a 3 =
0.0085, and when combined with a capacitor of 2pF to form a 20-section electromagnetic delay line, the total delay time is
We were able to obtain an ultrahigh-speed electromagnetic delay line with a characteristic impedance of 2ns, a characteristic impedance of 50Ω, and an output pulse rise time of approximately 250ps.

そして、上述の本発明の実施例は、仮想線Q−
Q,R−Rにて直角に折り曲げ、仮想軸線に並行
な導線3間の間隔とその仮想軸線に交わる導線2
間の間隔を等しくした例を示した。しかし、本発
明は、折り曲げる角度も目的とする特性に合わせ
て任意に選択することが可能である。例えば、第
4図Bに示すように、折り曲げ角度を90゜以上と
して、横断面方向から見て断面三角形や円形に変
形する等、仮想軸線に並行な導線3間の間隔より
も仮想軸線に交わる導線2間の間隔を広くして構
成することが可能である。
The embodiment of the present invention described above is based on the virtual line Q-
Bending at right angles at Q and R-R, the distance between the conductor wires 3 parallel to the imaginary axis and the conductor 2 that intersects with the imaginary axis
An example is shown in which the intervals between the two are equal. However, in the present invention, the bending angle can also be arbitrarily selected according to the desired characteristics. For example, as shown in Figure 4B, the bending angle is set to 90° or more to deform the cross section into a triangular or circular shape when viewed from the cross-sectional direction, so that the conductors intersect with the imaginary axis rather than the interval between the conductors 3 parallel to the imaginary axis. It is possible to configure the conductor wires 2 by increasing the distance between them.

むしろ、本発明にあつては、第4図B,Cに示
すように、結合係数a1に主に影響する導線3の間
隔G1を、同図Aと同様に小さくし、同じく結合
係数a1に関係するY方向(仮想軸線に直交する方
向)の隣合う区間の導線2間の間隔を大きくする
方が好ましい。
Rather, in the present invention, as shown in FIGS. 4B and 4C, the spacing G1 between the conducting wires 3 , which mainly affects the coupling coefficient a 1 , is made small as in FIG. It is preferable to increase the interval between the conductive wires 2 in adjacent sections in the Y direction (direction perpendicular to the virtual axis) related to .

すなわち、結合係数a1に関係するY方向の導線
2の結合の合計値は大きい値とはならないもの
の、これが負の結合となつて第1図および第2図
の導線3のうちA−B,E−F間の正の結合を弱
めるので、Y方向の導線3間の間隔を大きくし
て、負の結合の影響を減らすことは望ましい。
That is, although the total value of the coupling of the conductive wires 2 in the Y direction related to the coupling coefficient a1 is not a large value, this becomes a negative coupling, and among the conductive wires 3 in FIGS. 1 and 2, A-B, Since it weakens the positive coupling between E and F, it is desirable to increase the spacing between the conductors 3 in the Y direction to reduce the effect of negative coupling.

なお、本発明において導線2は、仮想軸線に直
交するように形成する場合に限らず、斜めに交わ
るように形成することも可能である。
In addition, in the present invention, the conducting wire 2 is not limited to the case where it is formed so as to be orthogonal to the virtual axis line, but can also be formed so that it intersects diagonally.

以上説明したように本発明の電磁遅延線は、仮
想軸線と並行な導線の長さを隣合う中央部間の間
隔よりも大きくし、かつ前記仮想軸線に交わる導
線における前記中央部の両側を、前記仮想軸線に
並行な導線が接近するように互いに反対方向に変
形させたので、結合係数の極性および値をその望
ましい方向に選定することが容易となる。
As explained above, in the electromagnetic delay line of the present invention, the length of the conductive wire parallel to the virtual axis is made larger than the interval between adjacent central portions, and both sides of the central portion of the conductive wire that intersects with the virtual axis are Since the conducting wires parallel to the virtual axis are deformed in opposite directions so as to approach each other, it is easy to select the polarity and value of the coupling coefficient in the desired direction.

そのため、超高周波帯域にあつて立ち上がりを
極めて速く、出力波形歪も小さく抑えることが可
能となり、遅延特性が向上する。
Therefore, in the ultra-high frequency band, the rise is extremely fast, output waveform distortion can be suppressed to a small level, and delay characteristics are improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の電磁遅延線の一実施例を示す
展開図、第2図は第1図に示す電磁遅延線の組立
斜視図、第3図は第1図に示す電磁遅延線の等価
回路図、第4図は本発明の電磁遅延線を横断面方
向から見た側面図である。 1……折り返し導線路、2……仮想軸線に交わ
る導線、3……仮想軸線と並行な導線、a1,a2
an……結合係数、C……コンデンサ、S0,S
1,S2……区間。
Fig. 1 is a developed view showing one embodiment of the electromagnetic delay line of the present invention, Fig. 2 is an assembled perspective view of the electromagnetic delay line shown in Fig. 1, and Fig. 3 is an equivalent of the electromagnetic delay line shown in Fig. 1. The circuit diagram and FIG. 4 are side views of the electromagnetic delay line of the present invention viewed from the cross-sectional direction. 1...Returning conductor line, 2...Conductor line crossing the virtual axis line, 3...Conductor line parallel to the virtual axis line, a 1 , a 2 ,
an...Coupling coefficient, C...Capacitor, S0, S
1, S2... section.

Claims (1)

【特許請求の範囲】 1 仮想軸線に交わる導線および前記仮想軸線に
並行な導線を交互に形成してなる折り返し導線路
のうち、前記仮想軸線に交わる導線の中央部とア
ース間にコンデンサを接続して複数区間からなる
電磁遅延線を構成し、前記仮想軸線と並行な導線
の長さを隣合う前記中央部間の間隔よりも大きく
し、かつ前記仮想軸線に交わる導線における前記
中央部の両側を、前記仮想軸線に並行な導線が接
近するように互いに反対方向に変形させてなるこ
とを特徴とする電磁遅延線。 2 仮想軸線に並行な導線間の間隔と前記仮想軸
線に交わる導線間の間隔を等しくしてなる特許請
求の範囲第1項記載の電磁遅延線。 3 仮想軸線に並行な導線間の間隔を、前記仮想
軸線に交わる導線間の間隔よりも狭くしてなる特
許請求の範囲第1項記載の電磁遅延線。
[Scope of Claims] 1. A capacitor is connected between the center part of the conductor that intersects with the imaginary axis and ground in a folded conductor line that is formed alternately of conductors that intersect with the imaginary axis and conductors that are parallel to the imaginary axis. constitute an electromagnetic delay line consisting of a plurality of sections, the length of the conducting wire parallel to the imaginary axis is greater than the interval between the adjacent central portions, and both sides of the central portion of the conducting wire that intersects the imaginary axis are , an electromagnetic delay line characterized in that conductors parallel to the virtual axis are deformed in opposite directions so as to approach each other. 2. The electromagnetic delay line according to claim 1, wherein the distance between the conductive wires parallel to the virtual axis is equal to the distance between the conductive wires crossing the virtual axis. 3. The electromagnetic delay line according to claim 1, wherein the distance between the conducting wires parallel to the virtual axis is narrower than the distance between the conducting wires crossing the virtual axis.
JP11572783A 1983-06-27 1983-06-27 Electromagnetic delay line Granted JPS607201A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11572783A JPS607201A (en) 1983-06-27 1983-06-27 Electromagnetic delay line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11572783A JPS607201A (en) 1983-06-27 1983-06-27 Electromagnetic delay line

Publications (2)

Publication Number Publication Date
JPS607201A JPS607201A (en) 1985-01-16
JPH0451082B2 true JPH0451082B2 (en) 1992-08-18

Family

ID=14669606

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11572783A Granted JPS607201A (en) 1983-06-27 1983-06-27 Electromagnetic delay line

Country Status (1)

Country Link
JP (1) JPS607201A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6313716B1 (en) * 1995-02-17 2001-11-06 Lockheed Martin Corporation Slow wave meander line having sections of alternating impedance relative to a conductive plate

Also Published As

Publication number Publication date
JPS607201A (en) 1985-01-16

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