JPH0450738B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device in which shape processing is performed by electrochemical etching.

[Conventional technology]

Examples of this type of semiconductor device whose shape is processed by electrochemical etching include micromechanical devices such as semiconductor pressure sensors and semiconductor acceleration sensors. A major feature of these devices is that they not only simply form electrical elements on a semiconductor substrate, but also process the semiconductor substrate into minute structures such as thin film diaphragms and cantilevers. Electrochemical etching is used as a high-precision processing method for the microstructure.

The conventional electrochemical etching method will be explained below. In the manufacture of semiconductor devices using the electrochemical etching method, an n/p epitaxial wafer is generally used, in which an n-type semiconductor layer is laminated on one side of a p-type semiconductor substrate by an epitaxial growth method, or a pn-type semiconductor layer is deposited by a diffusion method.
A substrate with a bond formed thereon is used and the substrate is immersed in an etching solution with the n-type semiconductor portion biased to a positive voltage. At this time, the positive voltage applied to the n-type semiconductor portion is set to such a level that a silicon oxide film is generated by the anodic oxidation reaction in the etching solution, and the etching is performed from the p-type semiconductor surface. When the etching reaches the n-type semiconductor, an oxide film is formed near the pn junction interface, so etching stops at the pn junction interface.

As described above, in electrochemical etching, it is necessary to supply voltage to the semiconductor substrate from the outside by some method. FIG. 2 shows a schematic diagram of a semiconductor substrate that has been used in conventional electrochemical etching. As shown in the figure, conventionally, a high concentration diffusion region made of an n ⁺ diffusion layer 12 is provided in a circular shape surrounding the peripheral part of the surface of a semiconductor wafer 11, and an n-type semiconductor is formed through the high concentration diffusion region. 13 was supplied with a desired voltage and current from the outside.

[Problem to be solved by the invention]

Incidentally, the formation of a silicon oxide film in an etching solution is controlled by the potential applied to the semiconductor. However, in the structure of the conventional semiconductor substrate shown in Figure 2, the electrical resistance of the silicon portion other than the periphery is considerably higher than that of the periphery. The voltage is different from the voltage supplied from the outside. Furthermore, as the silicon film thickness decreases as etching progresses, the resistance value of the silicon parts other than the peripheral part increases to an even larger value, and the difference between the voltage value set by the external power supply and the voltage value at each chip part increases. It becomes even more noticeable. As a result, an oxide film begins to form in the center before the etching reaches the p-n junction interface, and the p-type silicon portion that should normally be etched remains unetched, making it impossible to process the exact shape. A serious problem arose.

An object of the present invention is to provide a method for manufacturing a semiconductor device that completely overcomes the problems of the prior art described above and can reliably process a desired semiconductor shape.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor device in which an electrical element is formed on a semiconductor substrate and the semiconductor substrate is processed into a desired shape by electrochemical etching. A high concentration diffusion layer is formed on the surface of the substrate on which etching is to be performed, reaching at least the vicinity of the region to be shaped by the electrochemical etching, and a bias voltage for electrochemical etching is applied via the high concentration diffusion layer. It is intended to supply

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a semiconductor device according to the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic diagram showing an example of the structure of a semiconductor substrate used in an embodiment of the present invention. As shown in the figure, a scribe region of an appropriate width is provided around each semiconductor chip 1 on the n-type semiconductor layer side where electrical elements are formed, and a high concentration of n is applied thereto by ion implantation or diffusion. After forming the ⁺ diffusion layer 2, that is, the N ⁺ wiring 3, a protective layer such as SiO ₂ is provided on the surface. This N ⁺ wiring 3 has the function of applying voltage to each semiconductor chip 1 under the same conditions and the function of reducing contact resistance that occurs when electrically connecting with the outside. After that, this N ⁺ wiring 3 is connected to a power supply, and the N + wiring 3 is heated to a positive potential to the extent that anodic oxidation occurs on the surface of the structure made of the n-type semiconductor layer to be fabricated by etching, and SiO ₂ is generated. While setting the voltage through the ⁺ wiring 3, the p-type semiconductor layer portion to be cut out by etching is set at a voltage such that anisotropic etching of Si continues to occur.
Etching is performed by soaking in a KOH-based or hydrazine-based solution capable of silicon anisotropic etching and heating to around 90 degrees.

According to this embodiment, the N ⁺ wiring 3 is formed over the entire surface of the wafer so that the applied voltage is uniformly applied to any part of the structure made of the n-type semiconductor layer to be fabricated by etching. Shape processing by etching is uniformly performed on all parts, making it possible to obtain high processing accuracy and high yield.

In the semiconductor substrate of the above embodiment shown in FIG. 1, an N ⁺ conductor layer is also provided in the periphery other than the scribe area, but as long as a region that can be connected to an external power source is provided, the surrounding conductor layer There is no problem even if there is no layer. In that case, it becomes possible to place chips in the area that was used for forming the N ⁺ layer on the outer periphery in the conventional technology, and the yield per wafer is further improved.

〔Effect of the invention〕

As explained above, according to the present invention, N ⁺
Since wiring is formed, shape processing by electrochemical etching is uniformly performed on all parts, and high processing accuracy and high yield can be obtained.

[Brief explanation of drawings]

FIG. 1 is a front view showing an example of a semiconductor substrate used for electrochemical etching in an embodiment of the present invention, and FIG. 2 is a front view of a semiconductor substrate used for conventional electrochemical etching. 1...semiconductor chip, 2...n ⁺ diffusion layer, 3...
…N ⁺ wiring.

Claims (1)

[Claims] 1. In a method for manufacturing a semiconductor device in which an electrical element is formed on a semiconductor substrate and the semiconductor substrate is processed into a desired shape by an electrochemical etching method, on the side of the substrate on which the electrical element is formed,
A semiconductor characterized in that a high concentration diffusion layer is formed that reaches at least the vicinity of the region to be shaped by the electrochemical etching, and a bias voltage for electrochemical etching is supplied through the high concentration diffusion layer. Method of manufacturing the device.