JPH0449129B2 - - Google Patents

Info

Publication number
JPH0449129B2
JPH0449129B2 JP58112162A JP11216283A JPH0449129B2 JP H0449129 B2 JPH0449129 B2 JP H0449129B2 JP 58112162 A JP58112162 A JP 58112162A JP 11216283 A JP11216283 A JP 11216283A JP H0449129 B2 JPH0449129 B2 JP H0449129B2
Authority
JP
Japan
Prior art keywords
power supply
circuit
processing means
signal
operating power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58112162A
Other languages
Japanese (ja)
Other versions
JPS603792A (en
Inventor
Haruhiko Tomono
Shigeo Yatagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58112162A priority Critical patent/JPS603792A/en
Priority to US06/620,485 priority patent/US4710771A/en
Publication of JPS603792A publication Critical patent/JPS603792A/en
Publication of JPH0449129B2 publication Critical patent/JPH0449129B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/005Power supply circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Digital Computer Display Output (AREA)
  • Television Receiver Circuits (AREA)
  • Power Sources (AREA)
  • Controls And Circuits For Display Device (AREA)

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、デイジタル回路に供給される動作用
電源と同一の電源により動作するアナログ回路を
有してなるパーソナルコンピユータに関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a personal computer having an analog circuit operated by the same power supply as the operating power supply supplied to a digital circuit.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

パーソナルコンピユータにおいて、画像又は高
声等を対象としたアナログ量の信号を扱うアナロ
グ回路を設け、このアナログ回路をデイジタル回
路と同一の電源により動作させる場合、デイジタ
ル回路又はスイツチングレギユレータ等からのス
イツチングノイズが電源ラインを介してアナログ
回路に廻り込み、出力される画像又は音声を乱ら
すという不都合が生じる。この際の従来の具体的
な回路例を第1図に示し、その出力信号例を第2
図に示す。第1図はCRTモニタへ供給されるモ
ノクロコンポジツト信号を生成するアナログ回路
(以下コンポジツト回路と称す)の構成を示した
もので、図中、10はパーソナルコンピユータの
構成要素のうちの、キー入力部、CPU、メモリ
等を含むデイジタル回路部分(以下プロセツサ部
と称す)である。11,12,13,14はそれ
ぞれプロセツサ部10の表示系出力信号線であ
り、このうち、11,12,13はR,G,Bの
各色信号に相当する、白から黒までの8階調を示
す3ビツトの信号を出力する信号線、14は水平
H、垂直V同期信号を出力する信号線である。2
0は上記各信号線11,12,13,14からの
信号をもとに、第2図に示すようなモノクロコン
ポジツト信号を作るコンポジツト回路であり、
R1乃至R8は抵抗、Q1はドライブ用のトランジス
タ、OUTはモノクロコンポジツト信号の出力端
であ。30はプロセツサ部10、及びコンポジツ
ト回路20にそれぞれ共通の動作用電源(Vcc;
5V)を供給する電源部であり、31は動作用電
源(Vcc)を供給するためのVccラインである。
When a personal computer is equipped with an analog circuit that handles analog signals such as images or high-pitched voices, and this analog circuit is operated by the same power source as the digital circuit, the power supply from the digital circuit or switching regulator, etc. This causes a problem in that switching noise enters the analog circuit via the power supply line and disturbs the output image or sound. A specific conventional circuit example at this time is shown in Figure 1, and an example of its output signal is shown in Figure 2.
As shown in the figure. Figure 1 shows the configuration of an analog circuit (hereinafter referred to as composite circuit) that generates a monochrome composite signal to be supplied to a CRT monitor. This is a digital circuit section (hereinafter referred to as a processor section) that includes a processor, CPU, memory, etc. 11, 12, 13, and 14 are display system output signal lines of the processor section 10, and among these, 11, 12, and 13 are 8 gradation lines from white to black, corresponding to each color signal of R, G, and B. A signal line 14 outputs a 3-bit signal indicating horizontal H and vertical V synchronization signals. 2
0 is a composite circuit that generates a monochrome composite signal as shown in FIG. 2 based on the signals from each of the signal lines 11, 12, 13, and 14.
R1 to R8 are resistors, Q1 is a drive transistor, and OUT is the output terminal of the monochrome composite signal. Reference numeral 30 denotes an operating power supply (Vcc;
5V), and 31 is a Vcc line for supplying operating power (Vcc).

この第1図の回路において、プロセツサ部10
の表示系出力信号線11,12,13,14に出
力されたTTLレベルの各論理信号は、コンポジ
ツト回路20の抵抗R1〜R6により合成されアナ
ログ量の信号に変換された後、トランジスタQ1
のベースに印加される。トランジスタQ1はエミ
ツタホロア回路を構成しており、ベース・エミツ
タ間の電圧降下分がそのままエミツタ出力として
出力端OUTに出力される。この出力端OUTより
出力されるモノクロコンポジツト信号は、第2図
に示す如く、信号出力線11,12,13上の論
理“1”、“0”の組合わせ(3ビツト)によつて
得られる白Wから黒Bまでの8階調の明暗を示す
信号Ciと、水平H、垂直V信号とからなる。
In the circuit shown in FIG.
The TTL level logic signals output to the display system output signal lines 11, 12, 13, and 14 are synthesized by the resistors R1 to R6 of the composite circuit 20 and converted into analog signals, and then the transistor Q 1
applied to the base of Transistor Q1 constitutes an emitter follower circuit, and the voltage drop between the base and emitter is directly output to the output terminal OUT as the emitter output. The monochrome composite signal output from this output terminal OUT is obtained by a combination of logic "1" and "0" (3 bits) on signal output lines 11, 12, and 13, as shown in FIG. It consists of a signal Ci indicating eight gradations of brightness from white W to black B, and horizontal H and vertical V signals.

ここで、プロセツサ部10内のデイジタル回
路、又は電源部30内のスイツチンガ回路等より
発生するスイツチングノイズがVccライン31に
のると、そのスイツチングノイズが抵抗R5及び
トランジスタQ1を通して、そのまま出力端OUT
へ出力される。第3図はこの際の一例を示したも
ので、ここでは出力端OUTより中間色の信号が
出力されている際に、Vccライン31にスイツチ
ングノイズNがのつた場合を示している。この第
3図に示す出力端OUTからのモノクロコンポジ
ツト信号がCRTモニタに送られることにより、
上記ノイズN部分が、中間色上の明暗のゴミとし
て表示画面上に表示されてしまう。通常、プロセ
ツサ部10内のデイジタル回路、電源部30内の
電源回路等から発生される上記スイツチングイズ
は周波数が高く、一定周期で連続的に出力される
ことから、表示画面上には、上記スイツチングノ
イズにより、縞模様、又はちらつき等が生じて、
非常にみにくい表示画面となる。この縞模様は
Vccライン31に水平同期信号に近い周波数成分
を持つスイツチングノイグが発生するからであ
る。
Here, when switching noise generated from the digital circuit in the processor section 10 or the switching circuit in the power supply section 30 is applied to the Vcc line 31, the switching noise passes through the resistor R 5 and the transistor Q 1 and continues as it is. Output end OUT
Output to. FIG. 3 shows an example of this case, where switching noise N is added to the Vcc line 31 when a neutral color signal is being output from the output terminal OUT. By sending the monochrome composite signal from the output terminal OUT shown in Figure 3 to the CRT monitor,
The noise N portion is displayed on the display screen as bright and dark dust on an intermediate color. Normally, the switching noise generated from the digital circuit in the processor section 10, the power supply circuit in the power supply section 30, etc. has a high frequency and is output continuously at a constant period. Switching noise may cause striped patterns or flickering,
This results in a very ugly display screen. This striped pattern
This is because switching noise having a frequency component close to that of the horizontal synchronizing signal occurs on the Vcc line 31.

このようにして従来ではパーソナルコンピユー
タ内において、デイジタル回路とアナログ回路と
を同一電源で動作させた場合、スイツチングノイ
ズがアナログ回路に廻り込み、アナログ出力に大
きな悪影響を及ぼしていた。
Conventionally, when digital circuits and analog circuits in a personal computer are operated with the same power supply, switching noise enters the analog circuits and has a large adverse effect on the analog output.

〔発明の目的〕[Purpose of the invention]

本発明は上記実情に鑑みなされたもので、画
像、音声等のアナログ回路をもつパーソナルコン
ピユータにおいて、上記アナログ回路をデイジタ
ル回路と同一の動作用電源にて動作させた際のス
イツチングノイズの上記アナログ回路への廻り込
みを確実に防止して、安定した高品質の画像、音
声等を出力できるようにしたパーソナルコンピユ
ータを提供することを目的とする。
The present invention has been made in view of the above-mentioned circumstances, and in a personal computer having an analog circuit for image, audio, etc., the switching noise caused by the switching noise when the analog circuit is operated with the same operating power supply as the digital circuit. To provide a personal computer which is capable of outputting stable high-quality images, sounds, etc. by reliably preventing leakage into circuits.

〔発明の概要〕[Summary of the invention]

本発明は、デイジタル回路とアナログ回路とに
同一電源を供給するパーソナルコンピユータにお
いて、アナログ回路の電源供給ラインに、上記デ
イジタル回路、又は電源部より発生されるスイツ
チングノイズを除去するフイルタを挿入して、上
記スイツチングノイズのアナログ回路への廻り込
みによつて生ずる画像、音声等への障害を確実に
防止せしめたものである。
The present invention provides a personal computer that supplies the same power to both the digital circuit and the analog circuit, by inserting a filter into the power supply line of the analog circuit to remove switching noise generated from the digital circuit or the power supply section. This system reliably prevents damage to images, audio, etc. caused by the switching noise entering the analog circuit.

〔発明の実施例〕[Embodiments of the invention]

以下第4図及び第5図を参照して本発明の一実
施例を説明する。第4図はモノクロコンポジツト
信号の生成回路を例にとつて示す一実施例の回路
構成図であり、図中、第1図と同一部分には同一
符号を付し、その説明を省略する。図中、40は
コンポジツト回路20の抵抗R5と電源部30の
Vccライン31との間に挿入された、L・C回路
でなるスイツチングノイズ除去用のローパスフイ
ルタ(LPF)であり、電源部30より得られる
動作用電源(Vcc;5V)がこのローパスフイル
タ40を介してコンポジツト回路20の抵抗R5
に供給される。
An embodiment of the present invention will be described below with reference to FIGS. 4 and 5. FIG. 4 is a circuit configuration diagram of an example of a monochrome composite signal generation circuit. In the figure, the same parts as those in FIG. In the figure, 40 is the resistor R5 of the composite circuit 20 and the power supply section 30.
This is a low-pass filter (LPF) for removing switching noise made of an L/C circuit, which is inserted between the Vcc line 31 and the low-pass filter 40. through the resistor R 5 of the composite circuit 20
supplied to

第5図は上記第4図に示すモノクロコンポジツ
ト回路20の出力端OUTより出力される信号波
形を示す図である。
FIG. 5 is a diagram showing a signal waveform outputted from the output terminal OUT of the monochrome composite circuit 20 shown in FIG. 4 above.

ここで一実施例の動作を説明すると、電源部3
0より出力される動作用電源(Vcc)はプロセツ
サ部10に供給されるとともに、コンポジツト回
路20に供給される。更にコンポジツト回路20
に供給された動作用電源(Vcc)はローパスフイ
ルタ40を介して、トランジスタQ1のベースに
つながる抵抗R5に供給される。プロセツサ部1
0より出力される信号線11,12,13,14
上の各信号(TTLレベル“1"/“0")は抵抗R1
R6により合成されアナログ量の信号に変換され
てトランジスタQ1のベースに印加される。この
際、プロセツサ部10内のデイジタル回路、又は
電源部30内より発生されるスイツチングノイズ
Nは、第5図に示す如く電源部30のVccライン
31上にのるが、コンポジツト回路20の抵抗
R5にはローパスフイルタ40を介して動作用電
源(Vcc)が供給されることから、トランジスタ
Q1のベースに印加される電圧波形に周波数の高
いスイツチングノズルがのることはなく、上記ロ
ーパスフイルタ40によつてスイツチングノイズ
を除去した、信号線11,12,13,14の論
理値に従うアナログ量の信号のみがトランジスタ
Q1のベースに供給される。これによつて出力端
OUTからは、第5図に示す如く、スイツチング
ノイズを含まないモノクロコンポジツト信号が出
力される。従つてCRTモニタの表示画面にはス
イツチングノイズによつて乱らされることのない
鮮明な画像が表示される。即ち、ローパスフイル
タ40は水平同期信号に近い周波数成分を持つス
イツチングノイズを除去して、従来技術の欠点で
あつた縞模様の発生を防ぐ。
Here, to explain the operation of one embodiment, the power supply section 3
The operating power (Vcc) outputted from 0 is supplied to the processor section 10 and also to the composite circuit 20. Furthermore, the composite circuit 20
The operating power (Vcc) supplied to the transistor Q1 is supplied to the resistor R5 connected to the base of the transistor Q1 via the low-pass filter 40. Processor section 1
Signal lines 11, 12, 13, 14 output from 0
Each signal above (TTL level “1”/“0”) is connected to a resistor R 1 ~
The signals are synthesized by R6 , converted into an analog signal, and applied to the base of the transistor Q1 . At this time, the switching noise N generated from the digital circuit in the processor section 10 or the power supply section 30 is transferred onto the Vcc line 31 of the power supply section 30 as shown in FIG.
Since operating power (Vcc) is supplied to R5 through the low-pass filter 40, the transistor
The logic values of the signal lines 11, 12, 13, and 14 are the same as those of the signal lines 11, 12, 13, and 14, with no high-frequency switching nozzle appearing on the voltage waveform applied to the base of Q1, and switching noise removed by the low-pass filter 40. Only the analog quantity signal that follows the transistor
Supplied on the base of Q1 . This allows the output end
As shown in FIG. 5, a monochrome composite signal containing no switching noise is output from OUT. Therefore, a clear image that is not disturbed by switching noise is displayed on the display screen of the CRT monitor. That is, the low-pass filter 40 removes switching noise having a frequency component close to the horizontal synchronizing signal, thereby preventing the occurrence of striped patterns, which was a drawback of the prior art.

尚、上記した実施例は、モノクロコンポジツト
信号の生成回路を例に挙げて説明したが、これに
限ることはなく、アナログ量の音声信号を扱うア
ナログ回路、又はカラー用のアナログ信号を扱う
アナログ回路等においても容易に実現できる。
Although the above-mentioned embodiment has been explained using a monochrome composite signal generation circuit as an example, the present invention is not limited to this, and may be applied to an analog circuit that handles an analog audio signal or an analog circuit that handles a color analog signal. It can also be easily realized in circuits, etc.

〔発明の効果〕〔Effect of the invention〕

以上詳記したように本発明によれば、画像音声
等のアナログ回路をもつパーソナルコンピユータ
において、上記アナログ回路をデイジタル回路と
同一の動作用電源に動作させた際のスイツチング
ノイズの上記アナログ回路への廻り込みを確実に
防止して、安定した高品質の画像、高声等を出力
できる。
As described in detail above, according to the present invention, in a personal computer having an analog circuit for image/audio, etc., when the analog circuit is operated on the same operating power supply as the digital circuit, switching noise caused by the analog circuit is reduced. It is possible to output stable, high-quality images, high-pitched voices, etc. by reliably preventing the rotation of images.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の回路構成を示す回路ブロツク
図、第2図はモノクロコンポジツト信号を示す
図、第3図は上記第1図の回路構成における出力
信号波形を示す図、第4図は本発明の一実施例を
示す回路ブロツク図、第5図は上記実施例におけ
る出力信号波形を示す図である。 10……デイジタル回路部分(プロセツサ部)、
11,12,13,14……信号線(表示系出力
信号線)、20……アナログ回路(コンポジツト
回路)、R1,R2,…,R8……抵抗、Q1……トラ
ンジスタ、OUT……出力端。
Figure 1 is a circuit block diagram showing the conventional circuit configuration, Figure 2 is a diagram showing a monochrome composite signal, Figure 3 is a diagram showing the output signal waveform in the circuit configuration shown in Figure 1 above, and Figure 4 is a diagram showing the main circuit configuration. FIG. 5 is a circuit block diagram showing one embodiment of the invention, and is a diagram showing output signal waveforms in the above embodiment. 10...Digital circuit section (processor section),
11, 12, 13, 14...Signal line (display system output signal line), 20...Analog circuit (composite circuit), R1 , R2 ,..., R8 ...Resistor, Q1 ...Transistor, OUT ...Output end.

Claims (1)

【特許請求の範囲】[Claims] 1 所定のデイジタル処理を実行し、デイジタル
表示データ及び水平/垂直同期信号を出力する第
1の処理手段と、前記第1の処理手段から出力さ
れるデイジタル表示データをアナログ表示データ
に変換する第2の処理手段と、前記水平/垂直同
期信号に基づき、前記第2の処理手段により変換
されたアナログ表示データを表示する表示手段
と、電源手段からの動作用電源を前記第1の処理
手段と前記第2の処理手段とに供給する動作用電
源ラインと、前記第2の処理手段と前記動作用電
源ラインとの間に介挿され、前記第1の処理手段
または前記動作用電源から発生する前記水平同期
信号に近い周波数成分を持つたスイツチングノイ
ズを除去する、少なくともコイルとコンデンサか
ら構成されたフイルタ回路とを具備することを特
徴とするパーソナルコンピユータ。
1. A first processing means that executes predetermined digital processing and outputs digital display data and horizontal/vertical synchronization signals, and a second processing means that converts the digital display data output from the first processing means into analog display data. processing means, display means for displaying the analog display data converted by the second processing means based on the horizontal/vertical synchronization signal, and a power supply for operation from the power supply means for connecting the first processing means and the an operating power supply line that supplies the second processing means and the operating power supply line that is inserted between the second processing means and the operating power supply line and generates the operating power from the first processing means or the operating power supply; A personal computer comprising a filter circuit comprising at least a coil and a capacitor for removing switching noise having a frequency component close to a horizontal synchronization signal.
JP58112162A 1983-06-22 1983-06-22 Personal computer Granted JPS603792A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP58112162A JPS603792A (en) 1983-06-22 1983-06-22 Personal computer
US06/620,485 US4710771A (en) 1983-06-22 1984-06-14 Computer image display apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58112162A JPS603792A (en) 1983-06-22 1983-06-22 Personal computer

Publications (2)

Publication Number Publication Date
JPS603792A JPS603792A (en) 1985-01-10
JPH0449129B2 true JPH0449129B2 (en) 1992-08-10

Family

ID=14579790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58112162A Granted JPS603792A (en) 1983-06-22 1983-06-22 Personal computer

Country Status (2)

Country Link
US (1) US4710771A (en)
JP (1) JPS603792A (en)

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Also Published As

Publication number Publication date
US4710771A (en) 1987-12-01
JPS603792A (en) 1985-01-10

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