JPH0444484A - Time axis error correction device - Google Patents

Abstract

PURPOSE:To suppress a velocity error and to improve the time axis correction characteristic by controlling a delay of a variable delay line based on a delay quantity control signal corresponding to time axis fluctuation of an input video signal per one horizontal scanning line. CONSTITUTION:A voltage controlled triangle wave generator 25 generates a triangle wave of negative polarity and it is fed to a variable delay line 19 as a delay quantity control signal. The input video signal by the variable delay line is not delayed by the delay quantity control signal for a start of one horizontal scanning period and a phase at the left side of a monitor screen is not fluctuated. Then the delay quantity is gradually changed over one horizontal scanning period and the delay in response to the time axis fluctuation is given. Thus, since the fluctuation of the time axis appearing at the right end on the monitor screen for each horizontal scanning period is suppressed before being inputted to an A/D converter 1, a velocity error unable to be eliminated only by a time axis error correction device using an APC circuit is corrected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a time axis error correction device for correcting a time axis error contained in a video signal read from a recording medium such as a VTR.

[If there is a time axis error in the horizontal section of conventional technology Hubide No. 43,
This can be done by writing the video signal into the memory using a clock that has the same time axis error and reading it out using a clock that does not have the same time axis error, thereby compensating for the time axis error.

FIG. 7 shows an example of a time axis error correction device for correcting a time axis error of a video signal. In the figure, an input video signal is input to an A/D converter 1 and is A/D converted by a write clock synchronized with the input video signal generated by a write clock generator 2. After the A/D converted video signal is written to the memory 3 by the write clock,
It is read out using a reference read clock generated by a reference clock generator 4, and converted into an analog signal by a D/A converter 5. Normally, the read clock uses a fixed clock based on crystal oscillation and is stable with crystal oscillation accuracy, so the time axis correction ability generally depends on the accuracy of the write clock.

A write clock synchronized with the input signal, that is, a write clock whose phase varies depending on the time axis error, can be generated by an AFC circuit as shown in FIG. 8, for example.

That is, the horizontal synchronization signal is separated from the video signal by the synchronization separation circuit 6 and input to the AFC circuit 7. The AFC circuit 7 includes a phase comparator 8, a loop filter 9, a VCOIO,
Frequency divider 11. It is composed of a PLL circuit,
VCOlo outputs a clock having the same time base error as the horizontal synchronization signal.

This clock writes the input video signal to memory,
By reading out a clock with no time axis error, a video signal without time axis error can be obtained. However, since the loop band of the AFC circuit is determined by the time constant and frequency characteristics of the loop filter 9, the response speed cannot be increased in order to exhibit stable performance, and it is not possible to follow high-speed temporal fluctuations.

Therefore, whereas the AFC circuit changes the oscillation frequency according to the length of one horizontal scanning period and synchronizes the clock with the input signal, a clock generation circuit called the APC method has been used in recent years. .

The APC circuit is configured as shown in FIG. 9, for example.

The sync separation circuit 6 separates a horizontal sync signal from the input video signal and supplies it to the phase detector 12.

A reference clock signal with a fixed oscillation frequency output from the oscillator 13 is input to the delay device 14 and delayed by mutually different predetermined times, thereby generating clock signals with a plurality of phases. These clock signals of multiple phases are input to a phase detector 12 and a phase selector 15.

The phase detector 12 compares the phases of the signals input from the synchronization separation circuit 6 and the delay device 14, and detects the comparison result (phase error).
is output to the phase selector 15. The phase selector 15 selects and outputs the clock signal with the smallest phase error in accordance with the output of the phase detector 12.

As a result, as shown in FIG. 10, a clock signal synchronized with the horizontal synchronizing signal is generated, which is reset each time an edge of the horizontal synchronizing signal arrives.

Therefore, as shown in FIG. 11, if the signals of each line of the video signal are written into the memory in response to this clock signal, the time axis error can be corrected. In other words, if you write to the memory space while resetting the engineering and digital parts of the horizontal synchronization signal, and read it out while resetting it to the horizontal scanning section using the reference clock, the signal after D/A conversion can be reproduced correctly. (s+'E]
Figure 2 A and B).

Here, let us consider the characteristics of time axis correction in the AFC method and APC method. FIG. 13G shows an example of a circuit used for setting δ of the time axis error correction device, and the variable delay line 16 is supplied with a video signal (without time axis error), roughly from the sine wave oscillator 17. The output single frequency sine wave is supplied as control number 48. Therefore, the input video signal with no time axis fluctuation is sinusoidally expanded and contracted in the time axis direction by the variable delay line 16, and is supplied to the time axis error correction bag ff118. If the ratio of the fluctuation component (sine wave component) between the input and output of this time-base error correction device 18 is determined, the correction ability of the time-base error correction device can be measured.

FIG. 14 shows the AFC circuit measured using this method and A
It is a graph showing the time base correction ability by a PC circuit.

In the figure, the horizontal axis represents the fluctuating component frequency, and the vertical axis represents the fluctuating component correction ability (suppression ratio) by the time axis error correction device. That is, if the vertical axis is less than or equal to OdB, it means that there is a time axis correction ability, and if it is larger than OdB, it means that the time axis error correction ability is insufficient. The solid line represents the time base correction ability using the APC circuit.
The dotted lines each indicate the time base correction ability using the AFC circuit.

As a result 1, in the low frequency component below around Hz, AP
It is understood that the time axis error correction device using the C circuit has a better time axis error improvement effect by about 7 to 8 dB than the case using the AFC circuit, and has the ability to correct up to around 3 Hz. Ru.

On the other hand, a time axis error correction device using an AFC circuit is approximately I
It is understood that the time axis error is worsened in frequency components higher than KH2, and the characteristics are inferior to those using the APC circuit.

In general, the fluctuation component tends to become less visually noticeable as the frequency becomes higher, and the fluctuation component itself tends to decrease as the frequency becomes higher.

[Problems to be Solved by the Invention] However, in the APC method, when there is a time axis fluctuation such as expansion or contraction of the horizontal scanning section as shown in FIG. beginning of (T
Although the vertical phase shift is corrected at the left end of the TV monitor, it is not sufficiently corrected at the end of the horizontal scanning section (the right end of the TV monitor), resulting in uneven vertical phases. This residual component is called velocity error. Therefore, the velocity error was smallest at the left edge of the screen and increased toward the right edge. Therefore, if the AFC method, which does not generate velocity errors, is used, a sufficient time axis error correction effect cannot be obtained, and if the APC method is used, velocity errors may occur. It cannot be said that there is sufficient time axis correction ability for instantaneous time axis errors caused by impacts, head switching, etc.

The present invention was made in view of these circumstances, and
It is an object of the present invention to improve the time base correction ability of a time base error correction device by using a lock generation circuit that has a simple configuration and can provide a quick response.

[Means for Solving the Problems] A time axis error correction device of the present invention is a device for correcting a time axis error of an input video signal, and includes a variable delay line that delays the input video signal according to a delay amount control signal. a control signal generation circuit that generates a control signal according to time axis fluctuation per horizontal scanning line of an input video signal; a delay amount control means that generates a delay amount control signal according to the control signal; and an input video signal. or.

means for obtaining a phase-synchronized clock signal by synchronizing the phase of a reference clock signal with the reference position for each horizontal scan of the output video No. 15 of the variable delay line; It is characterized by comprising means for performing D conversion.

[Operation] In the time axis error correction device having the above configuration, since the delay amount of the variable delay line is controlled by the delay amount control signal corresponding to the time axis variation per horizontal scanning line of the input video signal, an APC circuit is not used. It is possible to suppress velocity errors that could not be removed even with the time axis correction circuit that was used.
Time axis correction characteristics can be improved.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

Note that the same reference numerals are given to the parts corresponding to those in the conventional case, and the explanation thereof will be omitted as appropriate.

FIG. 1 is a block diagram showing the configuration of an embodiment of the time axis error correction device of the present invention.

Descriptions of parts that overlap with the conventional example will be omitted.The input video signal is delayed by the delay circuit 23 for a period slightly shorter than one horizontal scanning section (IH-α), and then the delay amount is adjusted according to the delay amount control signal described later. 1 is co-fed to the A/D converter 1 via a variable delay line 19 that changes.

The input video signal is also supplied to a synchronization separation circuit 20, where a horizontal synchronization signal is separated and extracted. 21 is triggered by the leading edge of the separated horizontal synchronization signal,
This is a mono multivibrator (MMV) that outputs a pulse for a predetermined time period t, which is shorter than one horizontal scanning section. 22
is a triangular wave generator that generates a triangular wave from the trailing edge of the MMV 21, and its output j is supplied to the sample and hold circuit 24. Sample hold circuit 24
samples the voltage of the triangular wave at the leading edge of the output of MMV21. This triangular wave is adjusted so that the sampled voltage becomes O level when one horizontal scanning section of the input video signal is equal to the reference horizontal scanning section. That is, if one horizontal scanning section becomes shorter due to time fluctuations of the input video signal, the sampled voltage will be lower, and conversely, if one horizontal scanning section becomes longer, the sampled voltage will become higher.

25 is a voltage-controlled triangular wave generator that uses the output of the sample-and-hold circuit 24 as a control voltage to generate a triangular wave whose polarity and maximum value change. Voltage controlled triangular wave generator 25
The 0 input/output characteristic has a cycle equal to one horizontal scanning section, and the polarity and maximum value are set to have the characteristics shown in FIG. 2 with respect to the control input. That is, the maximum value exhibits a linear characteristic with respect to the output of the sample-and-hold circuit 24, and the polarity is made to be the same as that of the sample-and-hold circuit 24. Therefore, as shown in FIG. 3, the output of the triangular wave generator 25 becomes a triangular wave whose maximum amplitude is positive or negative when the sample hold value is positive or negative, and when it is zero, its maximum amplitude is also zero. . Voltage controlled triangular wave generation! The output of 25 is supplied to the variable delay line 19 as a delay amount control signal.

As the variable delay IJA 19, a well-known analog delay circuit consisting of varicaps 41, 42 and a coil 43 as shown in FIG. 4 can be used.

The output of the delay circuit is supplied to an APC type TBC circuit.

Next, the operation of the above embodiment will be explained.

Since the triangular wave generator 22 generates a triangular wave with a delay of a predetermined time t from the edge of the horizontal synchronizing signal by the MMV 21, when the leading edge of the next horizontal synchronizing signal arrives earlier due to time axis fluctuation, the sample and hold circuit # ! 124 samples and holds a negative polarity voltage. The voltage-controlled triangular wave generator 25, which uses this voltage as a control voltage, generates a triangular wave of negative polarity and supplies this to the variable delay line 19 as a delay amount control signal.

Since the delay amount control signal is a triangular wave whose period is one horizontal scanning section, the input video signal is not delayed by the variable delay line at the beginning of one horizontal scanning section, and there is no change in the phase at the left end on the monitor screen. .

Thereafter, the delay amount gradually changes over one horizontal scanning section, and eventually the delay amount is delayed by the amount of delay corresponding to the amount of time axis variation. Therefore, fluctuations in the time axis that appear at the right end of the monitor screen in each horizontal scanning section are suppressed before being input to the A/D converter 1, and can therefore be eliminated by the time axis error correction device using the APC circuit alone. It is possible to correct velocity errors that cannot be achieved. Of course, even if the leading edge of the next horizontal synchronizing signal is delayed due to time axis fluctuations, the same control is performed, only that the output of the voltage-controlled triangular wave generator 25 becomes reverse polarity.

In the above embodiment, the delay circuit 18 is provided before the variable delay line 19;
This is to delay the signal in consideration of the time difference between the fluctuation component detected by the input signal No. 17148 and the input signal No. 17148.

Further, the input to the sync separation circuit may be taken from the input video signal.

Figure 5 shows 1. FIG. 7 is a block diagram showing the configuration of another embodiment of the voltage-controlled triangular wave generator M25 in the above embodiment. The IIJtll voltage input from the sample hold circuit 24 is converted into a digital signal by the A/D converter 26. By using this digitalized control voltage, the RO
The triangular wave pattern stored in M27 is addressed and read out, and the read triangular wave pattern is converted into an analog signal by the D/A converter 28.

FIG. 6 further shows the configuration of another embodiment of the time axis error correction device of the present invention, in which the ROM 2? The triangular wave pattern is read out by controlling the address of , and the result obtained by D/A conversion is used as the delay amount control signal.

By storing the triangular wave pattern for controlling the variable delay line in the ROM as in the embodiments shown in FIGS. 5 and 6, the following effects can be obtained.

In other words, although a variable delay line using a varicap has a limited range in which the capacitance of the varicap changes linearly, it is possible to store in ROM in advance a control aI+voltage pattern that makes the output of the variable delay line linear. Therefore, accurate time axis correction becomes possible.

[Effects of the Invention] As described above, according to the time axis error correction device of the present invention, by using a simple variable delay line, the time axis fluctuation component of the length of one horizontal scanning section can be corrected, and the APC It is possible to suppress velocity errors that cannot be removed by a circuit-based time axis error correction device alone. Therefore, it improves the time axis correction characteristics, improves the correction ability, and also corrects high frequency time axis fluctuation components. be able to.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the time axis error correction device of the present invention, and FIGS. 2 and 3 show the input/output characteristics of the voltage-controlled triangular wave generator of the embodiment of FIG. 1. Figure, 4th
The figure is a circuit diagram showing the configuration of one embodiment of the variable delay line shown in FIG. 1, FIG. 5 is a block diagram showing the structure of another embodiment of the voltage controlled triangular wave generator shown in FIG. A block diagram showing the configuration of the sample bold circuit in Figure 1 and other embodiments of the voltage controlled triangular wave generator, Figure 7 is a block diagram showing the configuration of an example of a general time axis error correction device, and Figure 8 is an AFC.
FIG. 9 is a block diagram showing the configuration of an example of the APC circuit, FIG. 10 is a timing chart explaining the operation of the example in FIG. 8, and FIG. 11 is a diagram of time axis correction. Explanatory diagram of memory explaining operation, FIG. 12A
This is a conceptual diagram showing the time axis error on the monitor screen, Part 1
Fig. 3 is a block diagram showing the configuration of an example of a measuring device of a time axis error correction device, and Fig. 14 shows time axis correction of a time axis error correction device using an AFC circuit and a time axis error correction device using an APC circuit. This is a graph comparing abilities. 1... A/D converter, 19... Variable delay line, 20...
...Synchronization separation circuit, 22...Triangular wave generator, 24...
・Sample bold circuit, 25...Voltage controlled triangular wave generator. Patent applicant: Victor Japan Co., Ltd.

Claims (1)

[Claims] A device for correcting time axis errors in an input video signal, which includes a variable delay line that delays the input video signal according to a delay amount control signal, and a control signal that responds to time axis fluctuations per horizontal scanning line of the input video signal. a control signal generation circuit that generates
delay amount control means for generating a delay amount control signal according to the control signal; and a reference clock signal phase-synchronized with the reference position for each horizontal scan of the input video signal or the output video signal of the variable delay line. A time axis error correction device comprising: means for obtaining a phase synchronized clock signal; and means for A/D converting the output video signal of the variable delay line using the phase synchronized clock.