JPH0444455B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a data transmitting/receiving device (system) used in a computer system or the like. When inputting/outputting data between computers or CPUs (central processing units), if the number of bits required for the number of codes for the data to be input/output is less than the number of data buses, one
Send and receive words (1 code). For example, if there are 50 types of data codes to be input/output, the required number of bits is 6, but if there are 4 data buses, it is necessary to transmit and receive 4-bit parallel signals twice. In conventional transmission/reception systems, when transmitting and receiving one word using multiple parallel signals, unless synchronization is achieved using a synchronization signal line, it is necessary to provide accurate reference signals to each of the transmitting and receiving sides for synchronization. It was hot. Furthermore, when transmitting and receiving continuous data, once the synchronization is lost, subsequent data will continue to receive incorrect data. Although it is possible to provide a no-signal period for each data, the transmission and reception time increases and control becomes complicated. FIG. 4 shows a circuit using a conventional transmission/reception system. This circuit consists of two 4-bit microcomputers with I/O ports. 51 and 52 are two microcomputers, 51 transmits data,
52 is configured to receive. Reference numeral 53 denotes four buses for transmitting data, which are connected between the four output ports of the microcomputer 51 and the four input ports of the microcomputer 52. 54 is a synchronization signal issued in synchronization with the data sent by bus 53. When one code in this circuit is 8 bits, since there is only a 4-bit bus, one code is sent by sending a 4-bit parallel signal twice. In this conventional example, the signal line 54 is required, which is a burden on the hardware.
Without this signal line, it would be necessary to provide accurate reference signals to each of the microcomputers 51 and 52 for synchronization, or to provide a no-signal interval for each data. In addition to requiring accurate reference signal sources for each, if the frequencies of the reference signals differ between 51 and 52, the frequency dividing circuit that creates synchronization signals having the same frequency for both becomes complex. In the latter case, the presence of a no-signal section increases transmission time and further complicates control. An object of the present invention is to solve the above-mentioned drawbacks in a data transmission/reception system in which one word is transmitted/received using multiple parallel signals, and to provide a highly reliable data transmission/reception system with a simple hardware configuration. A feature of the present invention is that in a data transmission/reception method in which one word is transmitted and received using multiple parallel signals, the codes that can be used for each of the multiple parallel signals are different from the codes that can be used for other parallel signals. be. A detailed explanation of the present invention will be explained using the drawings. FIG. 1 shows a circuit using the data transmission/reception system of the present invention. 11 is a microcomputer on the data transmitting side, and 12 is a microcomputer on the data receiving side. Reference numeral 13 indicates four buses for transmitting data, which are connected between the four output ports of the microcomputer 11 and the four input ports of the microcomputer 12. In this circuit example, one word is transmitted and received using two 4-bit parallel signals. The code sent from the 11 side with the first 4-bit parallel signal is one of 10 to 15 in decimal notation, and the code sent with the second 4-bit parallel signal is a decimal number. It is one of 1 to 9 in notation. There are 6 types of words that can be sent using these two parallel signals.
There are 60 x10 pieces. Table 1 shows the character code table sent by this circuit.

[Table] In this way, the first code and the second code are always different codes, and the data always changes, so a synchronization signal is not required. Furthermore, since it can be determined whether the data is being sent for the first time or the second time, highly reliable data transmission and reception is possible. FIG. 2 is a circuit diagram in which a decoder for determining whether it is the first or second time is constructed using hardware. This can also be processed by software. Numerals 31 to 34 are four data buses, which are arranged in order from the top: bit 0, bit 1, bit 2, and bit 3. A group of 35 gates is a decoder section, which outputs a low level when the code is 0 to 9, and outputs a high level when the code is 10 to 15. By looking at this output, it can be determined whether the currently input code is the first code or the second code. FIG. 3 shows a timing chart showing the operation of the circuit of FIG. 2. 41-44 are 31-44 in Figure 3
It supports 34 signal lines. 46 is the code at each timing expressed in hexadecimal, and 4
7 is a character code represented by two codes. 45 is the output of the decoder shown in Figure 2, which goes to High level as shown in the figure when the first code is sent out of the two codes sent for one character code, and when it is the second code.
It's at low level. In this example, the first data is 10~
15. The second data is 0 to 9, but
In this way, when the number of bus lines is 4 bits, 16 codes from 0 to 15 are allocated to the first usable code group and the second usable code group. Any ratio may be used for this division, but if one side is set to 0 to 9 as in this embodiment, there is no need to convert codes for transmission and reception when transmitting and receiving numerical data. In this example, 1
After sending the code "A" for the second time, numerical data can be transmitted by sending the numerical data as it is the second time, and there is no need to convert the code when transmitting and receiving numerical data. As described above, the use of the present invention has the following effects. In the present invention, in a data transmission/reception method in which one word is transmitted and received using multiple parallel signals, the code groups that can be used for each of the multiple parallel signals are all different from the code groups that can be used for other parallel signals. , the code content always changes each time the code is sent, and the code changes depending on the content, so no control line is required other than the parallel signal, reducing the burden on the hardware. Also, when transmitting and receiving one word using two 4-bit parallel signals, the code that can be used for one of the two data is 0 to 9 in decimal notation, and the code that can be used for the other parallel signal is 0 to 9 in decimal notation. is 10 to 15 in decimal notation, so when sending and receiving numerical values, there is no need to convert them into codes for sending and receiving, making control easier.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a circuit for determining whether it is a first signal or a second signal in an embodiment of the present invention. FIG. 3 is a timing chart in one embodiment of the present invention. FIG. 4 is a configuration diagram of a conventional embodiment.

Claims (1)

[Scope of Claims] 1. A data transmitting and receiving device that transmits and receives a predetermined signal by transmitting and receiving a code selected from a predetermined code group multiple times as a parallel signal via a data bus, wherein the transmitting and receiving device transmits and receives a plurality of codes. Each uses different code groups configured such that the code in one code group is different from the code in the other code group, and determines the data on the data bus to determine the transmitted and received data. A data transmitting/receiving device characterized by comprising means for detecting a code group of data.