JPH0441371B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit, and particularly to an output drive circuit in a logic circuit.

[Prior art and problems to be solved by the invention] Examples of conventional output drive circuits are shown in FIGS. 4 and 5.
The circuit of FIG. 4 constitutes a well-known Darlington circuit by transistors Q ₁ and Q ₂ . This circuit controls on/off of a large output current _I0 by a small drive current _I1 supplied from the power supply _VCC to the _Q2 base. That is, if the current amplification factors of Q ₁ and Q ₂ are equal to β, the relationship is I ₁ =I ₀ /β ² .
In this case, when the collector output of _Q1 is at low (L) level, the output level _VOL of the output terminal OUT can be expressed as follows. In other words, V _OL = V _BE (Q ₁ ) + V _SAT (Q ₂ )...(1) Here, V _BE is the base-emitter voltage of Q ₁ , which is approximately
0.7 (V), and V _SAT is the saturation voltage of Q ₂ which is approximately 0.1 (V). As is clear from equation (1), at least V _BE exists in this circuit, so V _OL > 0.7 (V). For example, to drive the logic of a TTL circuit,
Considering that V _OL requires 0.4 to 0.5 (V), there is a problem that the L level is too high.

On the other hand, the circuit shown in Fig. 5 is an improvement of the circuit shown in Fig. 4, and this circuit has a low output level V _OL and is already known as a method of controlling with a minute drive current I ₁ corresponding to the output current I ₀ . . The output level _VOL of this circuit can be expressed by the following relational expression. That is, V _OL = R ₁ + R ₂ / R ₁ V _BE (Q ₁ ) + R ₂ I ₀ / β + V _BE (Q ₂ ) − V _BE
(Q ₃ )−V _BE (Q ₄ )……(2) Here, if transistors Q ₁ to _{Q 4} have approximately the same V _BE , equation (2) can be approximated as follows. You can. That is, V _OL = R ₂ / R ₁ V _BE (Q ₁ ) + R ₂ I ₀ / β ... (3) Here, in the circuit shown in Figure 5, the collector of Q ₂ is not connected to the output terminal but is connected to the power supply V _CC side. connected to Q ₁ ,
Q ₂ is operated in the non-saturation region.
In this case, as mentioned above, the base current of Q ₁ is I ₀ /β,
It is sufficient if the base current of Q ₂ is I ₀ /β ² , but
Depending on the state of the load connected to the output, an excessive base current exceeding I ₀ /β ² may flow to the base of Q ₂ , and transistors Q ₃ and Q ₄ are provided to deal with this excessive current. and the excess current is being dissipated. This means that V _OL is set to 0.3 as a threshold value, for example.
(V), if it drops too much below 0.3 (V), Q ₃ and Q ₄ turn on, allowing the excess current to flow away, reducing the base current of Q ₁ and increasing V _OL , causing the opposite effect. This is achieved by appropriately setting the ratio of resistors R ₁ and R ₂ so that when the voltage rises too much, Q ₃ and Q ₄ turn off, allowing the base current of Q ₁ to flow and lowering V _OL . . Equation (2) can be adjusted to the desired value by selecting the values of the resistors R ₁ and R ₂ mentioned above.
This is a relational expression from which V _OL can be obtained, and Equation (3) is an approximate expression thereof.

However, there is a drawback that the second term R ₂ I ₀ /β on the right side of equation (3) changes depending on the output current I ₀ . Immediately,
When I ₀ is a small current, the second term can be ignored and V _OL
can be set only by the ratio of R ₁ and R ₂ , but the larger I ₀ increases, the more difficult it becomes to keep V _OL low.
Also, if R ₁ and R ₂ are made smaller, V _OL can be lowered and I ₀ can be increased, but conversely, when I ₀ becomes small, the output becomes even more unloaded. In some cases, the second term can be ignored, but V _BE Q ₁ /R ₁
remains as the emitter current of Q, and this current serves as a reactive current and causes a decrease in switching efficiency.

[Means and actions for solving problems]

An object of the present invention is to provide an output drive circuit that solves the above-mentioned problems, and its means include an output drive circuit in a logic circuit in which the collector is connected to a power supply ( _Vcc ) and the base is connected to a first resistor R. ₁ , a drive transistor Q ₂ connected to the power supply (V _cc ) via a constant current source (I ₁ ), and the drive transistor
An output transistor Q ₁ whose base is connected to the emitter of Q 2 and whose collector is connected to the output terminal ( _OUT ), a common contact between the constant current source (I ₁ ) and the first resistor R ₁ , and the output terminal. at least one diode clamp transistor Q ₃ , Q ₄ connected between (OUT), a collector connected to the first resistor R ₁ and an emitter connected to the second resistor R ₂ ;
a diode clamp transistor Q ₅ whose base is commonly connected to the base of the drive transistor Q ₂ and the first resistor R ₁ ; and the drive transistor Q ₂
a third resistor R ₃ connected between the common contact between the emitter of Q 1 and the base of the output transistor Q ₁ and ground;
, and the low level output (V _OL ) at the output terminal (OUT) is connected to the first resistor R ₁ and the second resistor
Further, according to the _present invention, in the output drive circuit in the logic circuit, the collector is connected to the power supply (V cc ), and the base is connected to the power supply (V _cc ). A drive transistor connected to the common contact of the resistor R ₁ of 1 and the constant current source (I ₁ )
Q ₂ , the output transistor Q ₁ whose base is connected to the emitter of the drive transistor Q 2 and whose collector is connected to the output terminal (OUT), and the first resistor R ₁ and the output terminal (OUT) _. a diode clamp transistor Q ₃ connected to the first
a diode clamp transistor Q whose collector is connected to a second resistor R ₁ , whose emitter is connected to a second resistor R 2 , and whose base is commonly connected to the base of the drive transistor _{Q 2 and} to the constant current source (I ₁ ); _Five
and a third resistor R ₃ connected between a common contact between the emitter of the drive transistor Q ₂ and the base of the output transistor Q ₁ and ground, and a low level output (V _OL ) is set by the ratio of the first resistor R ₁ and the second resistor R ₂ .

〔Example〕

FIG. 1 is a circuit diagram of an embodiment of an output drive circuit according to the present invention. In Figure 1, the base of output transistor _Q1 is directly connected to the emitter of drive transistor _Q2 , and the base of _Q2 is connected directly to the emitter of drive transistor Q2.
The base of _Q5 is connected to the first resistor _R1 , and the emitter of _Q5 is grounded via the second resistor _R2 . On the other hand, the collector of the power supply V _CC and Q ₁ , that is, the output terminal OUT
Transistors Q ₃ , Q ₄ through a fixed current source I ₁ between
is connected. The bases and collectors of Q ₃ and Q ₄ are short-circuited to function as diodes, so a diode clamp transistor configuration is used.

In such a configuration, the L level of the output terminal
V _OL can be expressed by the following formula. That is, V _OL = V _BE (Q ₁ ) + V _BE (Q ₂ ) – V _BE (Q ₃ ) – V _BE (Q ₄ ) + R
₁ /R ₂ {V _BE (Q ₁ ) + V _BE (Q ₂ ) − V _BE (Q ₅ )}...(4) Here, as mentioned above, V _BE of Q ₁ to _{Q 5} are all approximately equal. In this case, equation (4) can be approximated as follows. That is, V _OL = R ₁ / R ₂ V _BE (Q ₁ ) ...(5) Here, in the circuit shown in Figure 1, Q ₃ and Q ₄ are the drive current I ₁
For example, V _OL
is set to 0.3 (V), the threshold value is 0.3 (V)
When the voltage drops too much, Q ₃ and Q ₄ turn on, allowing the excess current of I ₁ to escape, and by reducing the base current of Q ₂ and Q ₁ , it is possible to increase V _OL . In the opposite case, that is, when V _OL rises too much, Q ₃ and Q ₄ are turned off, and Q ₂ and Q ₁
It is possible to lower V _OL by passing a base current of .

As is clear from equation (5), the output transistor
First and second resistors to avoid saturating _Q1
It is only necessary to appropriately select the ratio of R ₁ and R ₂ , and the emitter resistance R ₂ of Q ₂ shown in the circuit shown in FIG _. By directly connecting the base and the emitter of Q ₂ , the base current I ₀ /β of Q ₁ is buffered by Q ₂ .
The influence of the base current of Q ₁ can be almost ignored.

FIGS. 2 and 3 show other embodiments of the output drive circuit according to the present invention. In the circuit shown in Figure 2, the base of Q ₂ is connected to the common contact between constant current source I ₁ and resistor R ₁ , and transistor Q ₃ is installed between the common contact between R ₁ , Q ₅ , and the collector and the output terminal. It will be done.

Furthermore, FIG. 3 shows an example in which a Schittke barrier diode _D1 is used in place of the resistor _R2 .

In Figure 2 and Figure 1, Q ₁ for output and drive,
Q ₂ and Q ₅ transistors and level shift resistors
The configurations of R ₂ and R ₃ are the same. The voltage generated by the level shift resistor _R1 for clamping is added to the base point voltage of Q5 in Figure 1, but in Figure 2 it is added to the base point voltage of _Q5 .
The circuit is to subtract from the base point voltage of _Q5 , and _R1 and
The voltage at the connection point with the emitter of Q ₃ is shown in Figure 1.
R ₁ and Q ₃ base, than the connection point voltage with collector,
The voltage between the base and emitter of _Q3 is lowered. As a result, Q ₃ , which was included in Figure 1, is omitted from Figure 2.

V _OL in FIG. 2 can be expressed by the following equation, similar to equation (4).

So, V _OL = V _BE (Q ₁ ) + V _BE (Q ₂ ) − V _BE (Q ₃ ) − R ₁ /R ₂ {V _BE
(Q ₁ ) + V _BE (Q ₂ ) − V _BE (Q ₅ )}...(6) Here, as mentioned above, if the V _BE of Q ₁ to Q ₅ are all approximately equal, then the above Equation (6) can be approximated as follows. That is, _VOL =(1- _R1 / _R2 ) _VBE ( _Q1 )...(7). As is clear from the above equation (7), similarly to equation (5), the ratio of the first and second level shift resistors R ₁ and R ₂ is appropriately selected so as not to saturate the output transistor Q ₁ . This allows the _VOL to be set freely.

Also, as in FIG. 1, _Q3 in FIG. 2 operates to absorb an excessive amount of the drive current _I1 .

Figure 3 shows the level shift resistor in Figure 2.
In place of R ₁ , short barrier diode D ₁
This is an example using . Therefore _{, by} replacing the _voltage applied to R ₁ in FIG. 2 with the voltage applied to D ₁ in _{FIG .} ) + V _BE (Q ₂ ) − V _BE (O ₃ ) − V _SB
...(8) becomes.

Here, if Q ₁ to Q ₃ V _BE are all substantially equal as in the above-mentioned equation (6), equation (8) can be approximated as follows. That is, V _OL = V _BE (Q ₁ ) − V _SB ……(9) Also, the reason why Q ₃ in FIG. 3 operates to absorb an excessive amount of the drive current I ₁ is as shown in FIG. It is the same as Figure 2.

Here, the design value of V _OL is usually approximately 0.3V in TTL, which is used as a standard in logic ICs. Therefore, V _BE of the transistor is approximately
0.7V, which is the voltage of the Schottky barrier diode.
Since V _SB is approximately 0.4V, in equation (5), R ₁ /R ₂
= 3/7, and in equation (7), if R ₁ /R ₂ = 4/7, it will be calculated from equation (5), equation (7), and equation (9).
Both V _{and OL} can be 0.3V.

〔Effect of the invention〕

According to the present invention, it is possible to provide an output drive circuit that has less variation in the low level of the output with respect to variation in the output current due to the load and can reduce the drive current.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of one embodiment of the output drive circuit according to the present invention, FIGS. 2 and 3 are circuit diagrams of other embodiments of the output drive circuit according to the present invention, and FIGS. 4 and 5 are circuit diagrams of other embodiments of the output drive circuit according to the present invention. This is a conventional output drive circuit. (Explanation of symbols), Q1...output transistor,
Q ₂ ... Drive transistor, Q ₃ to _{Q 5} ... Clamp transistor, R ₁ to _{R 3} ... Resistor.

Claims (1)

[Claims] 1. A drive transistor Q whose collector is connected to a power supply (V _cc ) and whose base is connected to the power supply (V _cc ) via a first resistor R ₁ and a constant current source (I ₁ ). ₂ , an output transistor Q1 whose base is connected to the emitter of the drive transistor _Q2 and whose collector is connected to the output terminal ( _OUT ), the constant current source ( _I1 ) and the first resistor _R1 . at least one diode clamp transistor Q ₃ connected between the common contact and the output terminal (OUT),
_Q4 , a collector connected to the first resistor _R1 , an emitter connected to the second resistor _R2 , and a base connected to the base of the drive transistor _Q2 and the first resistor _R1.
a third resistor R ₃ connected between _a common contact between the emitter of the drive transistor Q ₂ and the base of the output transistor Q ₁ and ground; An output drive circuit characterized in that a low level output (V _OL ) at a terminal (OUT) is set by a ratio of the first resistor _R1 to the second resistor _R2 . 2 A drive transistor Q ₂ whose collector is connected to the power supply (V _cc ) and whose base is connected to the common contact of the first resistor R ₁ and the constant current source (I ₁ ), and a base connected to the emitter of the drive transistor Q ₂ an output transistor _Q1 whose collector is connected to the output terminal (OUT), and a diode clamp transistor _Q3 connected between the first resistor _R1 and the output terminal (OUT).
and a collector is connected to the first resistor _R1 , an emitter is connected to the second resistor _R2 , and a base is connected to the base of the drive transistor _Q2 and the constant current source ( _I1 ).
a third resistor R ₃ connected between _a common contact between the emitter of the drive transistor Q ₂ and the base of the output transistor Q ₁ and ground; An output drive circuit characterized in that a low level output (V _OL ) at a terminal (OUT) is set by a ratio between the first resistor R ₁ and the second resistor R ₂ . 3. The output drive circuit according to claim 2, wherein the first resistor R ₁ is a shotgun barrier diode.