JPH0440319B2 - - Google Patents
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- Publication number
- JPH0440319B2 JPH0440319B2 JP7437385A JP7437385A JPH0440319B2 JP H0440319 B2 JPH0440319 B2 JP H0440319B2 JP 7437385 A JP7437385 A JP 7437385A JP 7437385 A JP7437385 A JP 7437385A JP H0440319 B2 JPH0440319 B2 JP H0440319B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- semiconductor thin
- deflection
- speed
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- 239000010409 thin film Substances 0.000 claims description 25
- 239000004065 semiconductor Substances 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 18
- 239000013078 crystal Substances 0.000 claims description 16
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 4
- 238000000137 annealing Methods 0.000 description 22
- 239000010408 film Substances 0.000 description 18
- 238000009826 distribution Methods 0.000 description 14
- 239000010410 layer Substances 0.000 description 13
- 238000010894 electron beam technology Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 6
- 238000001704 evaporation Methods 0.000 description 6
- 230000008020 evaporation Effects 0.000 description 5
- 238000004220 aggregation Methods 0.000 description 4
- 230000002776 aggregation Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000009833 condensation Methods 0.000 description 1
- 230000005494 condensation Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、半導体薄膜結晶層の製造方法に係わ
り、特にビームアニール法を利用した半導体薄膜
結晶層の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor thin film crystal layer, and particularly to a method for manufacturing a semiconductor thin film crystal layer using a beam annealing method.
近年、電子ビームやレーザビームによるアニー
ルで、絶縁膜上にシリコン単結晶を形成する、所
謂SOI（Silicon On Insulator）技術の開発が盛ん
に行われている。さらに、SOI技術を利用して素
子を３次元的に形成する、所謂３次元ICの開発
も進められている。
In recent years, so-called SOI (Silicon On Insulator) technology, which forms silicon single crystals on insulating films by annealing using electron beams or laser beams, has been actively developed. Furthermore, so-called three-dimensional ICs, in which elements are formed three-dimensionally using SOI technology, are being developed.
３次元ICを製作するには、シリコンウエハ表
面に形成された素子（下層素子）上に層間絶縁膜
を形成した後、前記SOI技術によつて形成された
単結晶シリコン層を形成する。その後、該単結晶
シリコン層に素子（上層素子）を形成することに
よつて、２層構造素子が実現されることになる。 To manufacture a three-dimensional IC, an interlayer insulating film is formed on elements (lower layer elements) formed on the surface of a silicon wafer, and then a single crystal silicon layer formed by the SOI technique is formed. Thereafter, by forming an element (upper layer element) on the single crystal silicon layer, a two-layer structure element is realized.
ところで、ビームアニール法において、半導体
薄膜の大面積単結晶化の際に単にスポツトビーム
を直線的に走査するだけでは、ビーム径が小さく
溶融幅が大きくとれないため、幅50［μm］以上の
単結晶半導体薄膜を得るのが困難である。これを
克服する手法として、スポツトビームを走査方向
と直交する方向に高速偏向して疑似線状ビームを
形成し、この疑似線状ビーム用いてアニールする
方法が考えられる。この場合、走査方向と直交す
る方向の同時溶融幅は著しく広がり、大面積単結
晶が得られることになる。 By the way, in the beam annealing method, simply scanning a spot beam linearly when producing a large-area single crystallization of a semiconductor thin film cannot achieve a large melting width due to the small beam diameter. It is difficult to obtain crystalline semiconductor thin films. As a method to overcome this problem, a method can be considered in which a spot beam is deflected at high speed in a direction perpendicular to the scanning direction to form a pseudo-linear beam, and this pseudo-linear beam is used for annealing. In this case, the simultaneous melting width in the direction perpendicular to the scanning direction is significantly expanded, and a large-area single crystal can be obtained.
しかしながら、この種の方法にあつては次のよ
うな問題があつた。即ち、通常の疑似線状ビーム
では、第５図に示す如く高速偏向に高周波正弦波
が用いられるが、この場合SOI面内の温度分布が
不均一になるため、Si（半導体薄膜）の蒸発や凝
縮を避けられない。特に、SOIの下地酸化膜等が
厚くなると、シード開口部上Siを溶融し、且つ
SOIを蒸発、凝縮させないアニールが困難とな
る。また、高周波正弦波の代りに高周波三角波を
用いた場合、多少の改善を行えるが、根本的な改
善にはならない。 However, this type of method has the following problems. In other words, in a normal quasi-linear beam, a high-frequency sine wave is used for high-speed deflection as shown in Figure 5, but in this case, the temperature distribution within the SOI plane becomes uneven, causing evaporation of Si (semiconductor thin film) and Condensation is inevitable. In particular, when the base oxide film of SOI becomes thick, it melts the Si above the seed opening and
Annealing without evaporating or condensing SOI becomes difficult. Further, if a high frequency triangular wave is used instead of a high frequency sine wave, some improvement can be made, but it is not a fundamental improvement.
なお、第５図に示す高周波波形を用いても
SOI面内の温度分布が不均一になる理由は次の
通りである。高周波波形のＡ点とＢ点とを比較す
ると、Ａ点ではビームの偏向速度が比較的遅く、
Ｂ点ではビームの偏向速度が著しく速い。このた
め、Ａ点に対応する位置の方がＢ点に対応する位
置よりもビームの存在確立密度が遥かに高くな
る。故に、アニール領域の中央部より周辺部の方
がビームの存在確立密度が大きくなり、その結果
均一なアニールを行うことはできないのである。 The reason why the temperature distribution within the SOI plane becomes non-uniform even when the high-frequency waveform shown in FIG. 5 is used is as follows. Comparing points A and B of the high-frequency waveform, the beam deflection speed is relatively slow at point A;
At point B, the beam deflection speed is extremely high. Therefore, the beam existence probability density at the position corresponding to point A is much higher than at the position corresponding to point B. Therefore, the probability of the existence of beams is higher in the peripheral part than in the central part of the annealing region, and as a result, uniform annealing cannot be performed.
本発明は上記事情を考慮してなされたもので、
その目的とするところは、半導体薄膜を均一にビ
ームアニールすることができ、Si等の半導体薄膜
の蒸発や凝集等を著しく抑制することができ、絶
縁体表面上の半導体薄膜結晶の大面積化をはかり
得る半導体薄膜結晶層の製造方法を提供すること
にある。
The present invention was made in consideration of the above circumstances, and
The purpose of this is to uniformly beam-anneal semiconductor thin films, to significantly suppress evaporation and aggregation of semiconductor thin films such as Si, and to increase the area of semiconductor thin film crystals on the surface of insulators. An object of the present invention is to provide a method for manufacturing a semiconductor thin film crystal layer that can be measured.
本発明の骨子は、スポツトビームを走査方向と
垂直に高速偏向する際、高速偏向に用いる高周波
波形のベースレべルを周期的に変動させることに
より、被アニール領域におけるエネルギービーム
の存在確立密度分布の均一化をはかることにあ
る。
The gist of the present invention is that when a spot beam is deflected at high speed perpendicular to the scanning direction, by periodically varying the base level of the high frequency waveform used for high speed deflection, the density distribution of the existence probability of the energy beam in the annealed region is determined. The aim is to achieve uniformity.
即ち本発明は、基板の絶縁体表面上に形成され
た多結晶或いは非晶質の半導体薄膜にエネルギー
ビームを照射して該薄膜を再結晶化する半導体薄
膜結晶層の製造方法において、前記ビームを高周
波波形により一方向に高速偏向すると共に、この
偏向方向と交差する方向に前記ビームを前記半導
体薄膜上で走査し、且つ上記高速偏向に用いる高
周波波形のベースレべルを周期的に変動せしめる
ようにした方法である。 That is, the present invention provides a method for manufacturing a semiconductor thin film crystal layer in which a polycrystalline or amorphous semiconductor thin film formed on an insulator surface of a substrate is irradiated with an energy beam to recrystallize the thin film. The beam is deflected at high speed in one direction by a high frequency waveform, the beam is scanned on the semiconductor thin film in a direction crossing the direction of deflection, and the base level of the high frequency waveform used for the high speed deflection is periodically varied. This is the method.
本発明によれば、高速偏向に用いる高周波波形
のベースレべルを周期的に変動されることによ
り、アニール領域におけるエネルギービームの存
在確立密度分布を均一化することができる。この
ため、アニール領域を均一な温度分布に制御する
ことが可能となり、Siの蒸発や凝集を著しく抑制
し、均一な大面積の単結晶薄膜を製造することが
できる。
According to the present invention, by periodically varying the base level of the high-frequency waveform used for high-speed deflection, it is possible to equalize the density distribution of the existence probability of the energy beam in the annealing region. Therefore, it is possible to control the annealing region to have a uniform temperature distribution, significantly suppressing evaporation and aggregation of Si, and producing a uniform large-area single-crystal thin film.
以下、本発明の詳細を図示の実施例によつて説
明する。
Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.
第１図は本発明の一実施例方法に用いた電子ビ
ームアニール装置を示す概略構成図である。図中
１１は電子銃であり、この電子銃１１から放射さ
れた電子ビームは集束レンズ１２及び対物レンズ
１３により集束されて試料１４上に照射されると
共に、走査コイル１５により試料１４上で走査さ
れる。走査コイル１５は、実際にはビームをＸ方
向（紙面左右方向）に偏向するＸ方向偏向コイル
と、ビームをＹ方向（紙面表裏方向）に偏向する
Ｙ方向偏向コイルとから構成されている。また、
レンズ１２の主面にはアパーチヤマスク１６が配
置され、電子銃１１とレンズ１２との間にはビー
ムをON−OFFするためのブランキング電極１７
が配置されている。 FIG. 1 is a schematic diagram showing an electron beam annealing apparatus used in an embodiment of the present invention. In the figure, 11 is an electron gun, and the electron beam emitted from the electron gun 11 is focused by a focusing lens 12 and an objective lens 13 and irradiated onto a sample 14, and is scanned on the sample 14 by a scanning coil 15. Ru. The scanning coil 15 is actually composed of an X-direction deflection coil that deflects the beam in the X direction (left-right direction in the paper) and a Y-direction deflection coil that deflects the beam in the Y direction (front and back directions in the paper). Also,
An aperture mask 16 is arranged on the main surface of the lens 12, and a blanking electrode 17 is provided between the electron gun 11 and the lens 12 for turning the beam on and off.
is located.
ここまでの構成は通常の電子ビームアニール装
置と同様であり、この装置がこれと異なる点は、
前記レンズ１２と走査コイル１５との間にビーム
を高速偏向するための偏向板２１を設けたことに
ある。即ち、偏向板２１はＸ方向に対向配置さ
れ、ビームをＸ方向に高速偏向するものとなつて
いる。偏向板２１には、偏向電圧発生回路２２か
ら高周波電圧（高周波波形）が印加される。偏向
電圧発生回路２２には、２つの発振器２３，２４
からの発振出力である高周波正弦波が供給され、
偏向電圧発生回路２２はこれらの信号を重畳（加
算）するものとなつている。 The configuration up to this point is the same as a normal electron beam annealing device, and the difference between this device is that
A deflection plate 21 is provided between the lens 12 and the scanning coil 15 to deflect the beam at high speed. That is, the deflection plates 21 are arranged to face each other in the X direction and deflect the beam in the X direction at high speed. A high frequency voltage (high frequency waveform) is applied to the deflection plate 21 from a deflection voltage generation circuit 22 . The deflection voltage generation circuit 22 includes two oscillators 23 and 24.
A high frequency sine wave, which is the oscillation output from the
The deflection voltage generating circuit 22 is configured to superimpose (add) these signals.
次に、上記装置を用いた単結晶製造方法につい
て説明する。 Next, a method for producing a single crystal using the above apparatus will be explained.
まず、ビームとしては、直径約100［μm］の溶
融領域を与えるスポツト電子ビームを用いた。電
子ビームの加速エネルギーは10［kV］である。ビ
ーム走査と直交する方向の高速偏向には、
Vsinωt＋vsin（ωt／12）
の高周波電圧を用いた。即ち、前記第１の発振器
２３の出力信号（第１の高周波信号）をVsinωt
とし、前記第２の発振器２４の出力信号（第２の
高周波信号）をvsin（ωt／12）とした。ここで、
偏向電圧振幅Ｖ及びベース変動電圧振幅Ｖは共に
50［Ｖ］、角周波数ωは
2π×50［ＭHz・rad］とした。このときの高周波
波形を第２図に示す。この図からも判るように、
ベースレべルの変動に伴い、Ａ点及びＢ点共に０
点から最大電圧点まで変動している。このため、
アニール領域における電子ビームの存在確立密度
分布を均一なものとすることができ、アニール領
域の温度分布を均一に制御することが可能とな
る。 First, a spot electron beam was used that produced a melted region with a diameter of approximately 100 [μm]. The acceleration energy of the electron beam is 10 [kV]. A high-frequency voltage of Vsinωt + vsin (ωt/12) was used for high-speed deflection in the direction orthogonal to the beam scanning. That is, the output signal (first high frequency signal) of the first oscillator 23 is set to Vsinωt.
The output signal (second high frequency signal) of the second oscillator 24 was vsin (ωt/12). here,
The deflection voltage amplitude V and the base fluctuation voltage amplitude V are both
50 [V], and the angular frequency ω was 2π×50 [MHz·rad]. The high frequency waveform at this time is shown in FIG. As you can see from this figure,
As the base level fluctuates, both A and B points become 0.
It fluctuates from the point to the maximum voltage point. For this reason,
It is possible to make the density distribution of the existence probability of the electron beam in the annealing region uniform, and it becomes possible to uniformly control the temperature distribution in the annealing region.
試料として、第３図ａに示す如く、Si基板４１
上に厚さ1.3［μm］のSio2膜（絶縁膜）３２を形
成し、この上に厚さ0.6［μm］の多結晶Si膜（半
導体薄膜）３３を形成し、さらにこの上にキヤツ
プ層としてのSiN膜３４及びタングステン膜３５
を形成したものを用いた。前記第２図に示す高周
波波形により高速偏向して形成した疑似線状ビー
ムを用い、この疑似線状ビームでアニールを行つ
た結果、走査と直交する方向の温度分布は第４図
ａに示す如く平坦な分布となり、Si膜の蒸発や凝
集が著しく抑制された。 As a sample, as shown in FIG. 3a, a Si substrate 41 is used.
A Sio 2 film (insulating film) 32 with a thickness of 1.3 [μm] is formed on top, a polycrystalline Si film (semiconductor thin film) 33 with a thickness of 0.6 [μm] is formed on this, and a cap layer is further formed on this. SiN film 34 and tungsten film 35 as
was used. As a result of annealing using a pseudo-linear beam formed by high-speed deflection using the high-frequency waveform shown in FIG. 2, the temperature distribution in the direction perpendicular to the scanning is as shown in FIG. The distribution became flat, and evaporation and aggregation of the Si film were significantly suppressed.
一方、従来方法のように、ベース変動を用いず
に垂直偏向電圧としてVsinωtのみを用いた場合、
溶融領域周辺でのみビームの滞在時間が長くなる
ため、第４図ｂに示す如く不均一な温度分布とな
るのである。 On the other hand, when only Vsinωt is used as the vertical deflection voltage without using base variation as in the conventional method,
Since the residence time of the beam becomes longer only in the vicinity of the melting region, an uneven temperature distribution is produced as shown in FIG. 4b.
また、大面積単結晶SOI膜を得るため、第３図
ｂに示す如くSOIの下地酸化膜３２に1.5［μm］幅
のシード開口部３６を設けてアニールした結果、
再結晶化したSOIの表面形状は極めて良好であ
り、幅２［mm］、長さ10［mm］の単結晶薄膜層が得
られた。 In addition, in order to obtain a large-area single crystal SOI film, as shown in FIG. 3b, a seed opening 36 with a width of 1.5 [μm] was provided in the SOI base oxide film 32 and annealing was performed.
The surface shape of the recrystallized SOI was extremely good, and a single crystal thin film layer with a width of 2 [mm] and a length of 10 [mm] was obtained.
このように本実施例方法によれば、疑似線状ビ
ームを形成する際に、高速偏向するための高周波
波形のベースレべルを一定の周期で変動させるこ
とにより、アニール領域における電子ビームの存
在確立密度分布の均一化をはかり得る。このた
め、アニール領域の温度分布の均一化をはかり
得、Si膜の蒸発や凝集を抑制し、均一なSOI単結
晶層が得られる。従つて、絶縁膜上に大面積に亙
り均質で良質なSi単結晶層を製造することができ
る。 In this way, according to the method of this embodiment, when forming a pseudo-linear beam, the presence of the electron beam in the annealing region can be established by varying the base level of the high-frequency waveform for high-speed deflection at a constant cycle. The density distribution can be made uniform. Therefore, the temperature distribution in the annealing region can be made uniform, evaporation and aggregation of the Si film can be suppressed, and a uniform SOI single crystal layer can be obtained. Therefore, it is possible to manufacture a homogeneous and high-quality Si single crystal layer over a large area on the insulating film.
なお、本発明は上述した実施例方法に限定され
るものではない。例えば、高速偏向及びベースレ
べル変動に用いることのできる高周波波形は、実
施例に示す単一正弦波に限るものではなく、三角
波、矩形波、鋸歯状波等の周期性のある交番波形
であれば用いることが可能である。さらに、これ
らに直流成分があつても何等差支えない。また、
使用する電子ビームアニール装置の構成は前記第
１図に何等限定されるものではなく、ビームを一
方向に高速偏向する機能、及びこれと交差する方
向にビームを試料上で走査できる機能を有するも
のであればよい。さらに、アニールする半導体薄
膜は多結晶Siに限るものではなく、非晶質Siであ
つてもよい。また、電子ビームの代りには、レー
ザービームを用いることも可能であり、レーザビ
ームを用いた場合も前記と同様な効果が得られる
のが確認されている。その他、本発明の要旨を逸
脱しない範囲で、種々変形して実施することがで
きる。 Note that the present invention is not limited to the method of the embodiment described above. For example, the high-frequency waveform that can be used for high-speed deflection and base level fluctuation is not limited to the single sine wave shown in the embodiment, but may also be a periodic alternating waveform such as a triangular wave, a square wave, or a sawtooth wave. It is possible to use Furthermore, there is no problem even if there is a DC component in these. Also,
The configuration of the electron beam annealing device to be used is not limited to that shown in FIG. 1 above, but has the function of deflecting the beam in one direction at high speed and the function of scanning the beam over the sample in a direction crossing this direction. That's fine. Furthermore, the semiconductor thin film to be annealed is not limited to polycrystalline Si, but may be amorphous Si. Further, instead of the electron beam, it is also possible to use a laser beam, and it has been confirmed that the same effect as described above can be obtained even when a laser beam is used. In addition, various modifications can be made without departing from the gist of the present invention.
第１図乃至第４図はそれぞれ本発明の一実施例
方法を説明するためのもので第１図は同実施例方
法に使用した電子ビームアニール装置を示す概略
構成図、第２図はビームを高速偏向するための高
周波波形を示す信号波形図、第３図はビームアニ
ールに供される試料の概略構造を示す断面図、第
４図はアニール領域における温度分布を示す特性
図、第５図は従来方法を説明するためのものでビ
ームを高速偏向するための高周波波形を示す信号
波形図である。
１１……電子銃、１２，１３……レンズ、１４
……走査用偏向コイル、１５……試料、２１……
高速偏向用偏向板、２２……偏向電圧発生器、２
３，２４……発振器、３１……Si基板、３２……
SiO2膜（絶縁膜）、３３……多結晶Si膜（半導体
薄膜）、３４……SiN膜、３５……タングステン
膜、３６……開口部（シード部）。
1 to 4 are for explaining a method according to an embodiment of the present invention. FIG. 1 is a schematic configuration diagram showing an electron beam annealing apparatus used in the method of the embodiment, and FIG. A signal waveform diagram showing the high-frequency waveform for high-speed deflection, Figure 3 is a cross-sectional view showing the schematic structure of the sample subjected to beam annealing, Figure 4 is a characteristic diagram showing the temperature distribution in the annealing region, and Figure 5 is a diagram showing the temperature distribution in the annealing region. FIG. 2 is a signal waveform diagram showing a high-frequency waveform for deflecting a beam at high speed for explaining a conventional method. 11... Electron gun, 12, 13... Lens, 14
... Scanning deflection coil, 15 ... Sample, 21 ...
Deflection plate for high-speed deflection, 22...Deflection voltage generator, 2
3, 24... Oscillator, 31... Si substrate, 32...
SiO 2 film (insulating film), 33... polycrystalline Si film (semiconductor thin film), 34... SiN film, 35... tungsten film, 36... opening (seed part).
Claims (1)
は非晶質の半導体薄膜にエネルギービームを照射
して該薄膜を再結晶化する半導体薄膜結晶層の製
造方法において、前記ビームを高周波波形により
一方向に高速偏向すると共に、この偏向方向と交
差する方向に前記ビームを前記半導体薄膜上で走
査し、且つ上記高速偏向に用いる高周波波形のベ
ースレべルを周期的に変動せしめたことを特徴と
する半導体薄膜結晶層の製造方法。 ２ 前記高周波波形は、高速偏向に用いる第１の
高周波信号と、この第１の高周波信号よりも周波
数が低くベースレべルの変動に用いる第２の高周
波信号とを重畳して形成されることを特徴とする
特許請求の範囲第１項記載の半導体薄膜の製造方
法。 ３ 前記高速偏向に用いる高周波波形の振幅は一
定であることを特徴とする特許請求の範囲第１項
記載の半導体薄膜結晶層の製造方法。[Scope of Claims] 1. A method for manufacturing a semiconductor thin film crystal layer in which a polycrystalline or amorphous semiconductor thin film formed on an insulating surface of a substrate is irradiated with an energy beam to recrystallize the thin film. A beam is deflected at high speed in one direction by a high-frequency waveform, and the beam is scanned on the semiconductor thin film in a direction crossing the deflection direction, and the base level of the high-frequency waveform used for the high-speed deflection is periodically varied. A method for manufacturing a semiconductor thin film crystal layer, characterized in that: 2. The high-frequency waveform is formed by superimposing a first high-frequency signal used for high-speed deflection and a second high-frequency signal that has a lower frequency than the first high-frequency signal and is used for base level fluctuation. A method for manufacturing a semiconductor thin film according to claim 1. 3. The method of manufacturing a semiconductor thin film crystal layer according to claim 1, wherein the amplitude of the high-frequency waveform used for the high-speed deflection is constant.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7437385A JPS61236677A (en) | 1985-04-10 | 1985-04-10 | Preparation of crystal layer of semiconductor thin film |
| US06/762,374 US4662949A (en) | 1985-02-15 | 1985-08-05 | Method of forming a single crystal semiconductor layer from a non-single crystalline material by a shaped energy beam |
| US06/904,942 US4746803A (en) | 1985-02-15 | 1986-09-08 | Method of forming a single crystal semiconductor layer from a non-single-crystalline material and apparatus for forming the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7437385A JPS61236677A (en) | 1985-04-10 | 1985-04-10 | Preparation of crystal layer of semiconductor thin film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61236677A JPS61236677A (en) | 1986-10-21 |
| JPH0440319B2 true JPH0440319B2 (en) | 1992-07-02 |
Family
ID=13545300
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7437385A Granted JPS61236677A (en) | 1985-02-15 | 1985-04-10 | Preparation of crystal layer of semiconductor thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61236677A (en) |
-
1985
- 1985-04-10 JP JP7437385A patent/JPS61236677A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61236677A (en) | 1986-10-21 |
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| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |