JPH0439718A - Memory card power source energizing device - Google Patents

Memory card power source energizing device

Info

Publication number
JPH0439718A
JPH0439718A JP2148216A JP14821690A JPH0439718A JP H0439718 A JPH0439718 A JP H0439718A JP 2148216 A JP2148216 A JP 2148216A JP 14821690 A JP14821690 A JP 14821690A JP H0439718 A JPH0439718 A JP H0439718A
Authority
JP
Japan
Prior art keywords
memory card
power supply
power source
battery
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2148216A
Other languages
Japanese (ja)
Inventor
Koji Higuchi
樋口 孝司
Takayuki Shinohara
篠原 隆幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2148216A priority Critical patent/JPH0439718A/en
Publication of JPH0439718A publication Critical patent/JPH0439718A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To prevent the data from breakdown in a volatile memory IC by supplying the power from a built-in auxiliary power source even if an external power source of a memory card power source energizing device is disconnected instantaneously. CONSTITUTION:This device is provided with a means 2 for backing up plural pieces of volatile memories ICs 101 - 10n, and supplying a power source from the outside of a memory card in order to prevent the consumption of a built-in battery 9, and a control means 23 for preventing the breakdown of holding data caused by stepdown of an internal voltage of the memory card due to the slow fluctuation of an external input voltage. Also, this device is provided with a means for supplying the power source to the memory card by an auxiliary power source 22 incorporated in a main body even if an energizing device is disconnected instantaneously, a battery voltage detecting means 26 for informing a replacement time of the internal battery 9, and a means 23 for preventing erroneous write in the case of inserting and drawing out the memory card. In such a manner, the breakdown of holding data of the volatile memory IC caused by consumption at the time of backup of a memory and inserting and drawing out a hot-line, etc., can be prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は揮発性メモリエOを内蔵すZメモリカードに関
し、特にそのメモリカードの内部1次電池によるメモリ
バックアップ時の、電池の消耗及び活線挿脱等による保
持データの破壊防止構造を提供するものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a Z memory card with a built-in volatile memory card, and in particular, to reduce battery consumption and live wires during memory backup using the internal primary battery of the memory card. This provides a structure to prevent destruction of retained data due to insertion/removal, etc.

〔従来の技術〕[Conventional technology]

第2図は従来の揮発性メモリICを複数個内蔵したメモ
リカードのブロック図である。
FIG. 2 is a block diagram of a conventional memory card incorporating a plurality of volatile memory ICs.

図において、3は外部出力電源(図示せず)よりメモリ
カード外部電源端子14を通して供給されるメモリカー
ド用の5v電源電圧を監視する電源電圧検出工0で、こ
の電源電圧検出工03はその第1出力端子5がPNP 
)ランジスタ番のベースに接続されていて、その出力に
よりトランジスタ4をオン、オフ制御して、外部電源例
えFiBWt源と内部電源6とを切換動作する。
In the figure, reference numeral 3 denotes a power supply voltage detection device 0 that monitors the 5V power supply voltage for the memory card supplied from an external output power source (not shown) through the memory card external power supply terminal 14, and this power supply voltage detection device 03 is the first one. 1 output terminal 5 is PNP
) is connected to the base of the transistor number, and its output controls the on/off of the transistor 4 to switch between an external power source, such as a FiBWt source, and an internal power source 6.

また、メモリカード入力端子15−151は入力バッフ
ァx012側に接続され、その人カバツ7アエ012が
メモリカード本体を構成するlJ数個の揮発性メモリエ
0101〜10nに供給されている。そして、これらの
揮発性メモリエ0101〜1021は外部5マ電源と内
部電源6を切換えるトランジスタ4のフレフタ側の電源
ラインに共通に接続されていて、その電源ラインは逆流
防止用のタイオードフおよび電流制限抵抗日を経て1次
電池9が内部電源6として接続され、この1次電池9に
て各揮発性メモリエ0101〜10nの保持データをバ
ックアップするものとなっている0 なお、図中符号1はKSD対策用抵抗、11は入力レベ
ル確定用抵抗、17はOV電源入力端子である0次に動
作について説明する。メモリバックアップ時、つまり外
部5v電源電圧が4.25V以下の場合は、電源電圧検
出I03はそれを検出して、第1出力端子5の出力つま
り吸込み電流をオフにすると、それに接続されているP
NP )ランジスタ4がオフとなり内部電源6に切換わ
る。そして、入力端子151〜15nは入力レベル確定
用抵抗工1、!SI)対策用抵抗1を介してrLJとな
る0このとき、入力端子151〜15!1にかかる電圧
がゆるやかに変動した際、入力バッファl012が0V
OSタイプの場合、入力電圧が電源電圧の1/2v前後
となると1通電流が流れ、内部電圧6が降圧しメモリエ
0内データが破壊される可能性が生じる0 次いで、メモリカード内の揮発性メモリエC101〜1
鵠内のデータを保持する際、1次電池9より電源電圧を
供給される場合が多い。
In addition, the memory card input terminals 15-151 are connected to the input buffer x012 side, and the input terminals 7a 012 are supplied to several volatile memories 0101 to 10n constituting the memory card body. These volatile memory devices 0101 to 1021 are commonly connected to the power line on the left side of the transistor 4 that switches between the external 5-power source and the internal power source 6, and the power source line is connected to a diode for backflow prevention and a current-limiting resistor. Over time, a primary battery 9 is connected as an internal power source 6, and this primary battery 9 backs up the data held in each volatile memory 0101 to 10n. 11 is a resistor for determining the input level, and 17 is an OV power supply input terminal.The 0th order operation will be explained. During memory backup, that is, when the external 5V power supply voltage is 4.25V or less, the power supply voltage detection I03 detects it and turns off the output of the first output terminal 5, that is, the sink current, and the P
NP) The transistor 4 turns off and switches to the internal power supply 6. The input terminals 151 to 15n are input level determining resistors 1, ! SI) Becomes rLJ through the countermeasure resistor 1. At this time, when the voltage applied to the input terminals 151 to 15!1 changes slowly, the input buffer l012 becomes 0V.
In the case of the OS type, when the input voltage becomes around 1/2V of the power supply voltage, a current flows, causing the internal voltage 6 to drop and potentially destroying the data in the memory card. Memorie C101~1
When retaining the data in the memory, the power supply voltage is often supplied from the primary battery 9.

次いで、外部電源入力端子14より電源電圧を供給中に
停電が生じた場合、メモリカード内の1次電池9により
供給される電源電圧によりデータが保持される。
Next, if a power outage occurs while the power supply voltage is being supplied from the external power input terminal 14, the data is retained by the power supply voltage supplied by the primary battery 9 in the memory card.

次いで、メモリカード内の1次電池9によってその内部
の揮発性メモリエ0101〜1籟内のデータが保持され
ている場合、この1次電池9の寿命つまり交換時期が不
明である0 次いで、メモリカードを活性挿脱する際、内部の揮発性
メモリエ0101〜1011内のデータが破壊される可
能性が生じる。
Next, if the data in the volatile memory cells 0101 to 1 within the memory card is held by the primary battery 9 in the memory card, the lifespan of the primary battery 9, that is, when to replace it is unknown. When hot insertion/removal is performed, there is a possibility that the data in the internal volatile memory areas 0101 to 1011 will be destroyed.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のメモリカードは以上のように構成されていたので
、メモリカードバックアンプ時には入力端子の入力レベ
ルを「H」又はrLJに固定しなければ々らず、また、
メモリカード内部の1次電池のみの供給以外に、メモリ
エ0内のデータを保持することや1次電池の交換時期を
知らせる機能の手段を有することが必要で、また、メモ
リカードo活m挿脱時にメモリエ0内のデータが破壊(
誤書き込み)されるなどの問題点があった。
Conventional memory cards are configured as described above, so when using a memory card back amplifier, the input level of the input terminal must be fixed to "H" or rLJ.
In addition to supplying only the primary battery inside the memory card, it is necessary to have a means to retain the data in the memory card and to notify when it is time to replace the primary battery. Sometimes the data in memory 0 is destroyed (
There were problems such as incorrect writing.

本発明は上記のような問題点を解決するためになさnた
もので、メモリカード内の1次電池の消耗を防止でき、
さらに外部電源電圧の変動によるメモリカード内部電圧
の降圧を防止し、さらに、外部電源が瞬断となった場合
でも、メモリカードに電源電圧を供給でき、さらにメモ
リカード通電状態においても内部の1次電池の交換時期
を検知できるとともにメモリカードを活線挿脱ができる
ことを目的とする。
The present invention was made to solve the above-mentioned problems, and can prevent the primary battery in the memory card from being consumed.
Furthermore, it prevents the internal voltage of the memory card from dropping due to fluctuations in the external power supply voltage, and even if the external power supply is momentarily interrupted, the power supply voltage can be supplied to the memory card, and even when the memory card is powered on, the internal primary The purpose is to be able to detect when it is time to replace the battery and also to be able to hot insert and remove a memory card.

〔課題を解決するための手段〕[Means to solve the problem]

本発明に係るメモリカード電源通電装置は、メモリカー
ド内の1次電池の消耗を防ぐために、外部を源入力端子
より5vt源電圧を供給するもので、外部電源入力端子
からの電源電圧がゆるやかに降圧し、それに伴なう入力
ラインのゆるやかな電圧変動によるメモリカード内部電
圧の降圧を防ぐための電圧監視回路を設け、外部電源入
力端子からの電源電圧が瞬断となった場合、本装置内の
2次電池に切換わりメモリカードに電源電圧が供給出来
るようK[#、!圧切圧切換金路け、メモリカードを通
電保管し、内部の1次電池の交換時期を知らせるための
電池電圧検知回路を設けるとともに、メモリカードを活
線挿脱する際全入カラインをrHJレベルとし、メモリ
カードのデータを破壊(誤書き込み)を防止する等の手
段を設けたものである。
The memory card power source energizing device according to the present invention supplies a 5vt source voltage from the external source input terminal to the outside in order to prevent the primary battery in the memory card from being exhausted, and the power source voltage from the external power input terminal is gradually applied. A voltage monitoring circuit is installed to prevent the internal voltage of the memory card from dropping due to gradual voltage fluctuations on the input line. Switches to the secondary battery of K[#,! to supply power voltage to the memory card. It is equipped with a battery voltage detection circuit to store the memory card with electricity and to notify when it is time to replace the internal primary battery, and also sets all input power lines to the rHJ level when inserting or removing the memory card hot. , a means is provided to prevent the data on the memory card from being destroyed (erroneously written).

〔作用〕[Effect]

本発明におけるメモリカード電源通電装置は、外部電源
電圧をメモリカードに供給することにより、内部の1次
電池の寿命を伸ばすことができ、さら忙外部電源電圧監
視回路によりメモリカードの全入カラインの信号制御を
行ない内部電圧の降圧を防ぐことができ、さらに外部電
源と内部2次電池切換回路により停電においてもメモリ
カードに電源電圧を供給でき、さらにメモリカードを通
電状態とした場合でも電池電圧検知回路により、内部1
次電池の交換時期を知らせることができ、さらにメモリ
カードの全入カラインを「H」レベルにすることにより
、活線挿脱時におけるメモリIC内のデータ破壊(誤書
き込み)を防ぐことができる。
The memory card power supply energizing device of the present invention can extend the life of the internal primary battery by supplying an external power supply voltage to the memory card, and furthermore, can extend the life of the internal primary battery by supplying an external power supply voltage to the memory card. It is possible to prevent the internal voltage from dropping by performing signal control, and the external power supply and internal secondary battery switching circuit can supply power voltage to the memory card even in a power outage.Furthermore, the battery voltage can be detected even when the memory card is energized. Depending on the circuit, internal 1
It is possible to notify when it is time to replace the next battery, and further, by setting all input lines of the memory card to the "H" level, it is possible to prevent data destruction (erroneous writing) in the memory IC during hot insertion/removal.

〔実施例〕〔Example〕

以下、本発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例であるメモリカード外部電装
置およびメモリカードのブロック図テある。図において
、18は外部電源入力端子、19は外部電源、20は外
部電源19と2次電池22との切換制御を行なう電源電
圧監視回路で、この電源電圧監視回路20は外部電源1
9の電源電圧が6v以下になると、−時に2次電池22
からの供給に切換わり、メモリカード外部電源端子14
を通して通電され、電池電圧出力03の第1出力端子5
にて電気を吸込み、メモリカード外部電源2とメモリカ
ード内部電源6を切換えるPNP )ランジスタ番をオ
ン動作させ、内部1次電池9からの供給をオフとし、複
数個の揮発性メモ!J I 0101〜10nからなる
カード内部回路を動作させるものとする0これにより、
内部1次電池9の電池寿命を伸ばすことができる。
FIG. 1 is a block diagram of a memory card external electrical device and a memory card according to an embodiment of the present invention. In the figure, 18 is an external power supply input terminal, 19 is an external power supply, and 20 is a power supply voltage monitoring circuit that performs switching control between the external power supply 19 and the secondary battery 22.
When the power supply voltage of 9 becomes 6V or less, the secondary battery 22
The power supply is switched to the memory card external power terminal 14.
energized through the first output terminal 5 of the battery voltage output 03
PNP which sucks in electricity and switches between the memory card external power supply 2 and the memory card internal power supply 6) turns on the transistor number, turns off the supply from the internal primary battery 9, and writes multiple volatile memos! The card internal circuit consisting of J I 0101 to 10n shall be operated.0 As a result,
The battery life of the internal primary battery 9 can be extended.

次に、入力ライン信号制御回路23はメモリカード入力
端子151〜15nに接続され、外部電源19の電源電
圧が4v以下になると、入力ライン信号制御回路出力端
子241〜24mよりメモリカード入力端子151〜1
5nを通してrLJレベルの出力を発生させ、入カバツ
7アエ012の入カレベμをすべて「L」レベルとし、
入力信号のゆるやかな変動による貫通電流現象を防止し
、内部1次電池9にて供給されているメモリカード内部
電源の降圧を防止することができる。
Next, the input line signal control circuit 23 is connected to the memory card input terminals 151 to 15n, and when the power supply voltage of the external power supply 19 becomes 4V or less, the input line signal control circuit output terminals 241 to 24m are connected to the memory card input terminals 151 to 15n. 1
Generate rLJ level output through 5n, set all input voltages μ of input cover 7Ae 012 to “L” level,
It is possible to prevent a through current phenomenon due to gradual fluctuations in the input signal, and to prevent voltage drop of the memory card internal power supply supplied by the internal primary battery 9.

次に、内部1次電池9の十極側と電流制限抵抗8との間
より電池電圧出力Aが電池電圧出力端子16に接続され
、その電池電圧は電池電圧検出回路26に供給され、電
池電圧が2.5v以下になると、電池電圧検出回路26
の表示出力端子28より表示部25に信号が出力され、
表示される。
Next, the battery voltage output A is connected to the battery voltage output terminal 16 from between the ten pole side of the internal primary battery 9 and the current limiting resistor 8, and the battery voltage is supplied to the battery voltage detection circuit 26, and the battery voltage becomes 2.5v or less, the battery voltage detection circuit 26
A signal is output from the display output terminal 28 to the display section 25,
Is displayed.

次に、メモリカードを通電中に挿脱されても、入力ライ
ン信号制御回路23の入力ライン信号制御回路出力端子
241〜24ユからは外部電源ユ9の電源電圧が47以
上の場合、出力レベルがrHJとなるので、メモリカー
ドの各フントロール信号はrHJレベルとなり、内部揮
発性メモリエOユ01〜10n内のデータ破壊(誤書き
込み)を防ぐことができる。
Next, even if the memory card is inserted or removed while the power is being supplied, the output level from the input line signal control circuit output terminals 241 to 24 of the input line signal control circuit 23 is 47 or higher if the power supply voltage of the external power supply 9 is 47 or higher. is rHJ, each load signal of the memory card becomes rHJ level, and data destruction (erroneous writing) in the internal volatile memory units 01 to 10n can be prevented.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明によれば、メモリカードを通電状態
にすることによりカード内部の1次電池の消耗を防止し
、外部電源が瞬断しても内蔵された2次電池により供給
され、メモリカードを通電状態にで古、外部電源がゆる
やかな降圧または変動することによって起る貫通電流現
象によって、メモリカード内部電源電圧の降圧を防止し
、メモリカードを通電状態においても内部1次電圧の交
換時期を知ることができるとともに、メモリカードを活
線挿脱する場合、入力信号を「■」レベルとし、メモリ
IC内のデータの破壊(誤書き込み)を防止する等の効
果がある。
As described above, according to the present invention, by energizing the memory card, consumption of the primary battery inside the card is prevented, and even if the external power supply is momentarily interrupted, the memory is supplied by the built-in secondary battery. This prevents the memory card's internal power supply voltage from dropping due to the through current phenomenon that occurs when the external power supply gradually drops or fluctuates when the card is powered on, and replaces the internal primary voltage even when the memory card is powered on. Not only can the timing be known, but when a memory card is hot inserted or removed, the input signal is set to the "■" level, which has the effect of preventing data destruction (erroneous writing) in the memory IC.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一5!施例であるメモリカード電源通
電装置とメモリカードのブロック図、第2図は従来のメ
モリカードのブロック図である。 図において、1・・・ICgD対策用抵抗、2・・・メ
モリカード外部電源、3・・・電池電圧出力0.4・・
・PNP )ランジスタ、5・・・第1出力端子、6・
・・内部電源、7・・・逆流防止用ダイオード、8・・
・電流制限抵抗、9・・・1次電池、101〜10.・
・・揮発性メモリエ0.1ユ・・・入カレペμ確定用抵
抗、12・・・入力バッ77IO,13・・・入力信号
線、14・・・メモリカード外部電源端子、151〜1
5!l・・・メモリカード入力端子、l6・・・電池電
圧端子、17・・・Ov電源端子、18・・・外部電源
六方端子、19・・・外部電源、20・・・電源電圧監
視回路、21−・・外部出力電源、22・・・2次電池
、23・・・入力ライン信号制御回路、241〜24n
・・・入力ライン信号制御出力端子、26・・・表示部
、26・・・電池電圧検出回路、8フ・・・電池電圧検
出入力端子、2日・・・表示出力端子0 なお、図中、同一符号は同一 または相当部分を示す0
Figure 1 shows part 5 of the present invention! FIG. 2 is a block diagram of a memory card power supply device and a memory card as an example. FIG. 2 is a block diagram of a conventional memory card. In the figure, 1...Resistor for ICgD countermeasure, 2...Memory card external power supply, 3...Battery voltage output 0.4...
・PNP) transistor, 5... 1st output terminal, 6...
...Internal power supply, 7...Reverse current prevention diode, 8...
・Current limiting resistance, 9...Primary battery, 101-10.・
・・Volatile memory 0.1U・・Resistor for determining input voltage μ, 12・・Input buffer 77IO, 13・・Input signal line, 14・・Memory card external power supply terminal, 151~1
5! l...Memory card input terminal, l6...Battery voltage terminal, 17...Ov power supply terminal, 18...External power supply hexagonal terminal, 19...External power supply, 20...Power supply voltage monitoring circuit, 21-... External output power supply, 22... Secondary battery, 23... Input line signal control circuit, 241 to 24n
...Input line signal control output terminal, 26...Display unit, 26...Battery voltage detection circuit, 8F...Battery voltage detection input terminal, 2nd...Display output terminal 0 Note that in the figure , the same code indicates the same or equivalent part 0

Claims (1)

【特許請求の範囲】[Claims] 複数個の揮発性メモリICを内蔵し、この揮発性メモリ
ICの保持データを内部電池にてバックアップ可能なメ
モリカードにおいて、前記複数個の揮発性メモリICを
バックアップする電池の消耗を防ぐ為の外部電源を供給
する手段と、供給電源が瞬停し入力電圧のゆるやかな変
動によりメモリカード内部電圧の降圧による保持データ
の破壊を防ぐ為の制御回路を設ける手段と、供給電源が
瞬停しても本体に内蔵された2次電池でメモリカードに
電源を供給出来る様に電圧制御回路を設ける手段と前記
揮発性メモリICの保持データを内部電池にてバックア
ップ可能なメモリカードを電源通電装置にて保管されて
いる場合においても、そのメモリカードの内部1次電池
の交換時期を知らせる電池電圧検出回路を設ける手段と
、メモリカードを電源通電装置にて挿脱を行なう場合、
誤書込みを防止する回路を搭載したことを特徴とするメ
モリカード電源通電装置。
In a memory card that includes a plurality of volatile memory ICs and is capable of backing up the data held in the volatile memory ICs with an internal battery, an external A means for supplying power, and a means for providing a control circuit to prevent destruction of retained data due to a drop in the internal voltage of the memory card due to gradual fluctuations in input voltage when the power supply stops momentarily; A means for providing a voltage control circuit so that power can be supplied to the memory card using a secondary battery built into the main body, and a memory card capable of backing up data held in the volatile memory IC using an internal battery, is stored in a power supply device. Even in the case where the memory card is installed, there is a means for providing a battery voltage detection circuit to notify the replacement time of the internal primary battery of the memory card, and when the memory card is inserted and removed using a power supply device,
A memory card power supply device characterized by being equipped with a circuit that prevents erroneous writing.
JP2148216A 1990-06-05 1990-06-05 Memory card power source energizing device Pending JPH0439718A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2148216A JPH0439718A (en) 1990-06-05 1990-06-05 Memory card power source energizing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2148216A JPH0439718A (en) 1990-06-05 1990-06-05 Memory card power source energizing device

Publications (1)

Publication Number Publication Date
JPH0439718A true JPH0439718A (en) 1992-02-10

Family

ID=15447870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2148216A Pending JPH0439718A (en) 1990-06-05 1990-06-05 Memory card power source energizing device

Country Status (1)

Country Link
JP (1) JPH0439718A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007096067A (en) * 2005-09-29 2007-04-12 Sunx Ltd Photoelectric converting circuit
WO2007136210A1 (en) * 2006-05-24 2007-11-29 Lg Electronics Inc. Method for reducing power consumption for detachable card and mobile communication terminal thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007096067A (en) * 2005-09-29 2007-04-12 Sunx Ltd Photoelectric converting circuit
WO2007136210A1 (en) * 2006-05-24 2007-11-29 Lg Electronics Inc. Method for reducing power consumption for detachable card and mobile communication terminal thereof

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