JPH04193041A - Power supply circuit - Google Patents

Abstract

PURPOSE:To backup a load by bringing first and second capacitors, connected in parallel with the load, continuously into charged state so long as a voltage is fed from a voltage supply and connecting the first and second capacitors in series and inserting in parallel with the load upon interruption of voltage supply to the load. CONSTITUTION:When a voltage supply is interrupted and voltage Vcc is not fed from the voltage supply to input terminals T1, T2, a voltage detecting circuit 3 turns first switching means 2, 2', second switching means 6, 6' and third switching means 7, 7' 'OFF' while turns a fourth switching means 9 'ON'. Consequently, a series circuit of a first super capacitor 5, fourth switching means 9, 9' and a second super capacitor 8 is inserted in parallel with a load 4 and thereby a total voltage of 10V, which is the sum of 5V voltages across the first and second super capacitors, is applied on the voltage detecting circuit 3 thus charging the voltage detecting circuit 3.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a power supply circuit that performs power supply compensation using the discharge current of a capacitor, and supplies sufficient voltage to drive a voltage detection circuit with an extremely simple configuration when the voltage source is cut off. The purpose of this invention is to provide a power supply circuit capable of backing up a load, and in a power supply circuit for driving a load such as a handy terminal, first and second capacitors are connected in parallel to the load. In a normal state, the first and second capacitors are charged via the voltage source and the load is driven, and when the voltage is cut off from the voltage source to the load, the first and second capacitors are charged. The capacitors are configured to switch in series to supply the discharge voltages of the first and second capacitors to the load.

[Industrial Application Field] The present invention relates to a power supply circuit for backing up a load, and more particularly to a power supply circuit in which power supply compensation is performed using discharge current of a capacitor.

[Conventional technology]

In conventional handheld terminals and the like, power supply circuits are configured to back up data stored in memory within these electronic devices when the voltage source is cut off. The power is cut off when the battery is replaced to charge it, or when the battery is dropped due to an impact, etc., and normally the backup is for several milliseconds.

FIG. 3 shows a system diagram of a conventional power supply circuit 1 having such a backup function.

In FIG. 3, a voltage of Vcc=5V is supplied to input terminals T1 and T2 from a voltage source (not shown). Input terminal T is on the hot side, input terminal T2 is on the ground side, and input terminal T is on the hot side.
A load 4 such as a memory such as a handy terminal or each circuit is connected in parallel between T2. Furthermore, an electric double layer capacitor (hereinafter referred to as super capacitor) 5 and a second
A series circuit of the switch means 6 is connected in parallel to the load 4, and the first switch means 2, the voltage detection circuit 3, and the second load 4 are connected in series with the input terminals T, T2.

The operation in the above configuration will be explained with reference to Fig. 4.
Input terminal T3. When a voltage of VCC-5■ is supplied from the voltage source between T2, the voltage detection circuit 3
The switch means 2.6 is controlled to be in the "on" state, and further a constant current is supplied to the load 4.

During the normal energization period, input terminal T1. Vcc= between T2
5 (see FIG. 4A), the voltage detection circuit 3 switches the first and second switch means 2.6 to "'".
To this end, the supercapacitor 5 is in a charged state and supplies a constant voltage to the load 4 via the first and second switch means 2 and 6 as shown in FIG. 4B. Next, when a voltage source cutoff state occurs in which the voltage of VCC is not supplied to the input terminals TI and T2 for some reason, the voltage detection circuit 3 turns the first switch means 2 "off".
The super capacitor 5 starts discharging when the super capacitor 5 is brought into the state (see FIG. 4B). As a result, the discharge current of the supercapacitor 5 is supplied to the load via the voltage detection circuit 3, so that the memory of the load can be banked up for a predetermined period of time.

[Problem to be solved by the invention]

According to the power supply circuit configured as shown in FIG. There was a problem in that when the load 4 was driven by the discharge current of the super capacitor 5, the voltage detection circuit 3 could not be driven.

That is, the voltage detection circuit 3 includes a constant current source and switching means 2.6.
It is composed of an IC that includes a control circuit that controls the
Voltage detection circuit 3 with internal resistance etc. in super capacitor 5
For example, V6. There was a problem in that it became impossible to hack up the load 4 because it became impossible to supply a voltage equivalent to -5±0.5V.

Of course, this is done by appropriately selecting the capacity, withstand voltage, etc. of the supercapacitor 5.

SUMMARY OF THE INVENTION An object of the present invention is to provide a power supply circuit capable of supplying sufficient voltage to drive a voltage detection circuit with an extremely simple configuration and backing up a load when the voltage source is cut off.

[Means for Solving the Problems] The problem with the power supply circuit of the present invention is that in a power supply circuit for driving a load 4 such as a handy terminal, first and second capacitors 5 connected in parallel to the load 4 .8, which charges the first and second capacitors 5 and 8 through the voltage source and drives the load 4 in a normal state, and when the voltage is cut off from the voltage source to the load 4, the first and second capacitors This is achieved by a power supply circuit l characterized in that the capacitors 5 and 8 are switched in series to supply the discharge voltage of the first and second capacitors 5 and 8 to the load 4.

[Function] The power supply circuit 1 of the present invention keeps the first and second capacitors connected in parallel to the load in a charged state at all times while the load 4 is supplied with voltage from the voltage source. When the voltage supply is cut off, the first and second capacitors are connected in series and inserted in parallel to the load 4, so the power supply can sufficiently back up the memory, etc. of the load for a predetermined period of time. A circuit l is obtained.

〔Example〕

Hereinafter, the power supply circuit of the present invention will be described in detail with reference to FIGS. 1 and 2.

Note that parts corresponding to those in FIG. 3 are designated by the same reference numerals.

FIG. 1 is a fundamental block diagram of a power supply circuit 1 of the present invention, and FIG. 2 is a concrete circuit diagram of the power supply circuit 1 of the present invention. First, the present invention will be explained with reference to FIG.

In the same figure, T1. T2 indicates the hot and ground side input terminals, respectively, and is connected to Vcc=5 from a voltage source (not shown).
Approximate voltage is supplied.

A load such as a handy terminal is connected in parallel between the input terminals T and T2. This load 4 is connected to the input terminal T via a series circuit of the first switch means 2 and the voltage detection circuit 3.
I, connected to T2, and further connected to the first supercapacitor 5
and a second switch means 6 are connected in parallel to the load 4.

That is, one end of the first supercapacitor 5 is connected to the midpoint between the first switch means 2 and the voltage detection circuit 3, and one end of the second switch means 6 is connected between the load 4 and the input terminal T2. The other end of the first supercapacitor 5 and the other end of the second switching means 6 are directly connected.

Furthermore, a series circuit of a third switch means 7 and a second supercapacitor 8 is connected in parallel between the input terminals T+ and T2. That is, one end of the third switch means 7 is connected to the input terminal T1, the other end is connected to the other end of the second supercapacitor 8, and one end of the supercapacitor 8 is connected to the input terminal T2, so that the box 3 A series circuit of the switch means 7 and the second supercapacitor 8 is connected in parallel to the load 4. Further, in this embodiment, one end of the fourth switch means 9 is connected to the connection midpoint between the first supercapacitor 5 and the second switch means 6, and the fourth switch means 9
The other end is connected to the connection midpoint between the second supercapacitor 8 and the third switch means 7. Further, the first to third switch means 2, 6, 7, and 9 are configured to be turned on, turned off, and controlled by the control output of the voltage detection circuit 3.

FIG. 2 shows the first to fourth switch means 2 shown in FIG.
, 6.7.9 is replaced with a transistor to constitute an electrical switching means, and the transistor serving as the switching means is given the same reference numeral as in FIG.
This symbol is shown with a dash added. The other configurations are the same as those in FIG. 1, so detailed explanations will be omitted. 1st to 4th
switch means, namely transistors 2', 6', 7',
By supplying the base voltage from the voltage detection circuit 3 to each base of the transistors 2', 6', and 7'.

9' is controlled "on" and "off".

To explain the operation of the above configuration, input terminal TI.

When the VCC voltage is supplied to T2 from the voltage source, the first switch means 2.2' and the second switch means 6.6
The voltage detection circuit 3 switches each switch means 2.2' so that the third switch means 7.7' and the third switch means 7.7' are turned on and the fourth switch means 9.9' is turned off. ,6.
6'7.7' and control. Therefore■. A voltage of, for example, 5cm of the C voltage is supplied to the voltage detection circuit 3 through the first switch means 2.2', and the voltage detection circuit 3 supplies a constant voltage to the load 4. At the same time the first switch means 2
．． 2' and the first supercapacitor 5 as well as the first supercapacitor 5 via the second switch means 6.6'.
is charged with a voltage of Vcc'=5 from a voltage source. Similarly, from the input terminals T, , T2 via a series circuit of a third switch means 7, 7' and a second supercapacitor 8; C is supplied, and the second supercapacitor 8 is charged with a voltage of Vcc=5V.

Next, when replacing or charging the battery of the voltage source, or when the voltage source is cut off by dropping the battery and the VCC voltage is no longer supplied from the voltage source to the input terminals T, T2, the voltage detection circuit 3 The first switch means 2.2', the second switch means 6.6' and the third switch means 7.7' are turned off and the fourth switch means 9 is turned on. Therefore, a series circuit of the first supercapacitor 5, the fourth switch means 9,9' and the second supercapacitor 8 is inserted in parallel to the load 4,
The voltage of 10V in total, which is 5cm each, which had been charged in the first and second supercapacitors 5°8 is discharged and supplied to the voltage detection circuit 3. Of course, in this case, since there is a voltage drop due to the internal resistance of the first and second supercapacitors 5.8, a voltage of 8 to 9 cm is actually supplied to the input of the voltage detection circuit 3, so the voltage detection The voltage detection circuit 3, which can sufficiently drive the circuit 3, supplies a voltage of 8 to 9 square meters to the load 4 as a constant voltage (or constant current) of 5 square meters. In addition, in Fig. 2, the voltage detection circuit 3 and the input terminal T
A line 10 shown by a broken line connecting the three is a line necessary for the voltage detection circuit 3 to detect that the voltage source has been restored after the voltage source has been cut off.

As explained above, according to the power supply circuit of the present invention, memory hack amplification can be effectively performed when the voltage source is cut off, and the voltage detection circuit 3 can be operated to drive the load 4 at a constant current. A power circuit may be provided.

〔Effect of the invention〕

According to the power supply circuit of the present invention, there is no need for expensive hack-up means such as a lithium battery, and the voltage detection circuit 3 is connected to the load.
Since a stabilized voltage can be supplied via the voltage source, it is also possible to lengthen the bank-up time, and a power supply circuit that does not cause the voltage detection circuit to operate when the voltage source is cut off can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a system diagram showing an embodiment of the power supply circuit of the present invention; Fig. 2 is a circuit diagram showing an embodiment of the power supply circuit of the invention; Fig. 3 is a system diagram of a conventional power supply circuit; The figure is an operation waveform diagram of FIG. 3. l... Power supply circuit, 2.6, 7.9... Switch means, 3...
Voltage detection circuit, 4... Load, 5.8... Super capacitor. Patent applicant: Fujitsu Kiden Ltd. Figure 3 Sketch diagram Figure 4/C:)

Claims (1)

[Claims] A power supply circuit for driving a load (4) such as a handy terminal, comprising first and second capacitors (5, 8) connected in parallel to the load (4). , Under normal conditions, the first and second capacitors (5, 8) are charged via the voltage source and the load (4) is driven, and when the voltage is cut off from the voltage source to the load (4), The first and second capacitors (5, 8) are switched in series to supply the discharge voltage of the first and second capacitors (5, 8) to the load (4). power supply circuit.