JPH0439148B2 - - Google Patents

Description

[Detailed description of the invention]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal recording circuit, and more particularly to a video signal recording circuit that pre-emphasizes a digital video signal and then performs frequency modulation to record a frequency-modulated wave signal obtained on a magnetic recording medium. Conventional technology and its problems In VIR, a frequency modulated wave signal obtained by frequency modulating (FM) a video signal (especially a luminance signal) is recorded on a magnetic tape and then reproduced. So-called triangular noise, which is unique to waveforms, occurs, and the higher the modulation frequency component, the more affected by the noise. For this reason, a pre-emphasis circuit is installed on the input side of the frequency modulator to enhance the level of the high frequency components of the video signal, increasing the degree of modulation for the high frequency components and reducing noise during FM demodulation in the playback system. It is well known that the signal-to-noise ratio is improved by reducing the signal, and at the same time, the de-emphasis circuit is used to attenuate the level of the high frequency component by the amount of the level enhancement, thereby restoring the original signal waveform. In this case, the S/N can be improved as the amount of pre-emphasis increases, but if the amount of pre-emphasis is made too large, the degree of modulation of FM becomes excessive, causing phenomena such as inversion. Therefore, in an actual VTR, the pre-emphasis amount of the above-mentioned pre-emphasis circuit in the recording system is made as large as possible, and the amplitude of the large-amplitude portion where the degree of FM modulation becomes excessive is limited in relation to the output video signal of the pre-emphasis circuit. It is well known that a clip circuit is provided on the input side of a frequency modulator. Therefore, since the high frequency components are enhanced by the pre-emphasis circuit, the waveform as shown in FIG. The video signal is
The large amplitude component that exceeds the proper input level, indicated by the broken line in A of the same figure, is clipped by the above-mentioned clipping circuit (or limiter circuit) into a video signal with the waveform shown in B of the same figure, and then sent to the frequency modulator. Supplied. However, if the video signal having the clipped portion is frequency-modulated, recorded on a magnetic tape, played back, FM demodulated, and then passed through a de-emphasis circuit, the reproduced video signal waveform will be the 8th.
The waveform shown in FIG. B, which is different from the original video signal waveform shown in FIG. A, is obtained, and the reproducibility of the waveform becomes poor. For this reason, conventionally, the time constant of the de-emphasis circuit has been set to a different value from that of the pre-emphasis circuit. However, although this method can slightly improve the reproducibility of the waveform of a video signal that has a clipped part, the reproducibility of the waveform of a video signal that does not have a clipped part deteriorates, and the S/
The degree of improvement in N was also decreasing. Incidentally, it is known that this deterioration in waveform reproducibility due to clipping can be almost completely prevented by changing the time constant of the pre-emphasis circuit according to the amount of clipping, as shown in FIG. 1st
FIG. 0 shows a circuit system diagram of an example of the above-mentioned conventional pre-emphasis circuit with a variable time constant. In the figure, a video signal input to an input terminal 50 is supplied to a differential amplifier 51, where it is amplified differentially with the output signal of a de-emphasis circuit 53, and then supplied to a clip circuit 52, where it is The large amplitude portion is amplitude limited. The output video signal of the clip circuit 52 is supplied to a de-emphasis circuit 53, where the level of a predetermined high frequency component is attenuated relative to that of the low frequency component.
1. Now, suppose that a step-shaped video signal as shown by the dashed-dotted line 56 in FIG. Become. As a result, the signal waveforms outputted from the clip circuit 52 to the output terminal 54 and the de-emphasis circuit 53, respectively, become as shown by a solid line 58 in FIG. Here, in the output signal indicated by the solid line 58, a period T indicates a period during which the clipping circuit 52 performs the clipping operation. According to this conventional circuit, since the de-emphasis circuit 53 is inserted and connected to the negative feedback loop of the differential amplifier 51, the output terminal 54 receives a video signal with pre-emphasis characteristics complementary to the characteristics of the de-emphasis circuit 53. taken out. Further, when clipping is performed by the clipping circuit 52, the time constant of the circuit changes. However, the conventional circuit shown in FIG. 10 is an analog circuit, and has a problem in that it is extremely difficult to obtain a time constant that provides the best waveform reproducibility due to variations in circuit elements, temperature changes, etc. Therefore, the present invention solves the above problems by varying the characteristics (time constant) of a variable pre-emphasis circuit to which a digital video signal is supplied according to the amplitude portion (amount of information) lost by the clip circuit. The purpose of the present invention is to provide a video signal recording circuit that provides a video signal recording circuit. Means for Solving the Problems FIG. 1 is a block system diagram showing the configuration of a video signal recording circuit according to the present invention. In the circuit of the present invention, a first pre-emphasis circuit 2 imparts a fixed pre-emphasis characteristic to a digital video signal input to an input terminal 1, and a second pre-emphasis circuit 3 imparts a variable pre-emphasis characteristic. Here, the digital video signal is a digital signal obtained by sampling and quantizing an analog video signal. The first clip circuit 4 has the same characteristic as the second clip circuit 8, which will be described later, to limit amplitude components above a certain value. The detection means 5 subtracts the input and output signals of the first clip circuit 4 to detect the amplitude component lost by the first clip circuit 4. The control means 6 variably controls the pre-emphasis characteristic of the second pre-emphasis circuit 3 according to the level of the output detection signal of the detection means 5. Further, the switch circuit means 7 includes at least the first
The first signal detected by the output signal of the clip circuit 4 of
During the clipping period by the clipping circuit 4, the output signal of the second pre-emphasis circuit 3 is selectively outputted;
Further, during a period when clipping is not performed by the first clip circuit 4, the output signal of the first pre-emphasis circuit 2 is selectively outputted and outputted to the second clip circuit 8. The signal taken out from the second clip circuit 8 is output to an output terminal 9 as a video signal for recording.
The signal is then supplied to a frequency modulator and a DA converter (both not shown), where it is frequency modulated, digital/analog converted, and then recorded on a recording medium. Operation Since the detection means 5 outputs a detection signal of a level corresponding to the amplitude component (amount of information) discarded by the first clipping circuit 4, the second pre-emphasis circuit 3 is controlled by the control means 6 to A variable pre-emphasis characteristic such that the time constant becomes large when the amplitude component is large can be imparted to the input video signal. The switch circuit means 7 operates during the period in which the first clip circuit 4 is performing the clipping operation (the clipping period of the input video signal).
Since the output signal of the pre-emphasis circuit 3 is selectively outputted, the time constant of the switch circuit means 7 is varied approximately in proportion to the amplitude component rejected by the first clip circuit 4. During the non-clipped period, the first pre-emphasis circuit 2 extracts a video signal to which an optimal pre-emphasis characteristic has been applied. Hereinafter, the present invention will be described in more detail along with examples. Embodiment FIG. 2 shows a block diagram of an embodiment of the circuit of the present invention. In the figure, the same components as in FIG. 1 are denoted by the same reference numerals, and their explanations will be omitted. In FIG. 2, a digital luminance signal as an example of a digital video signal inputted to an input terminal 11 is supplied to a pre-emphasis circuit 12, and is also supplied to a variable pre-emphasis circuit 14 through a delay circuit 13. The pre-emphasis circuit 12
This circuit has fixed pre-emphasis characteristics and corresponds to the pre-emphasis circuit 2 shown in FIG. As a result, when a digital luminance signal obtained by sampling and quantizing a 100% white luminance signal a as shown in FIG. As a result of the level enhancement, a luminance signal b having a waveform as shown in FIG. 3B in which overshoot and undershoot occur at the rising and falling portions of the waveform is extracted. It should be noted that each circuit shown in FIG. 2 is a digital circuit to which a digital signal is supplied and which processes the digital signal. Therefore, the waveforms of each part shown in FIG. 2 are digital data obtained by sampling and quantizing the analog signal waveforms shown in FIGS. 3A to 3K.
In the following description, for convenience, analog signal waveforms will be used. This luminance signal b is supplied to a clip circuit (or limiter circuit) 15 constituting the first clip circuit 4, where it detects parts of larger amplitude b ₁ , b ₂ , b than the range indicated by the broken line in FIG. 3B. ₃ and _b4 are respectively discarded by clipping and extracted as a luminance signal c as shown in FIG. 3C. The subtraction circuit 16 constitutes the detection means 5, and performs an operation of subtracting the output luminance signal c from the input luminance signal b of the clipping circuit 15 to obtain the discarded large amplitude portion as shown in FIG. 3D. A level and phase detection signal d corresponding to b ₁ , b ₂ , b ₃ and b ₄ is output. This detection signal d is sent to the integrator 17 and the window comparator 18.
are supplied respectively. The window comparator 18 compares the level of the detection signal d with a reference level, and compares the level of the detection signal d with the reference level during the period when the positive pulse portion or the negative pulse portion of the detection signal d is present (that is, during the period when the clip circuit 15 is performing the clipping operation). ), outputs a low-level signal, and outputs a high-level signal during other periods (ie, a period when the clipping circuit 15 is not performing a clipping operation). Therefore, a pulse train g as shown in FIG. 3G is taken out from the window comparator 18. This pulse train g is delayed for a certain period of time by a delay circuit 19 and then supplied to an integrator 17 as a clear pulse, while being supplied to a latch 20 and a delay circuit 22, which will be described later, without being delayed. FIG. 4 shows a block diagram of one embodiment of the integrator 17. In the figure, the detection signal d inputted to the input terminal 28 passes through the adder 29 to the switch circuit 3.
0 terminal 30a. This switch circuit 30 has a zero level signal (actually digital data) applied to a terminal 30b, and a pulse train g delayed by the delay circuit 19 is applied to a terminal 30b.
The clearing operation is performed by selectively outputting the input signal of the terminal 30b during the high level period of the delayed pulse train g as a clear pulse (switching pulse), and during the low level period of the delayed pulse train g. 30a input signal as it is 1
Selectively output to the sample delay unit 32. The signal delayed by one sample by the one-sample delayer 32 is supplied to the adder 29, where it is added to the input detection signal d, and then outputted to the output terminal 33 and again supplied to the terminal 30a of the switch circuit 30. Ru. As a result, the output terminal 33 of the integrator 17 is
As shown in FIG. 2, an integral signal e is obtained by integrating the input detection signal d. This integral signal e is supplied to a latch 20 shown in FIG. 2, where it is latched at the rising edge of the pulse train g. The contents of the integrator 17 are cleared by the rising edge of the pulse train g, but since the rising time of the integrator 17 is slightly delayed from the rising time of the pulse train g supplied to the latch 20 by the delay circuit 19, the latch 20 The maximum value of the integral signal e is latched. As a result, a signal f as shown in FIG. 3F is taken out from the latch 20 and supplied to the next stage read-only memory (ROM) 21 as an address signal. The ROM 21 contains first data for varying the pre-emphasis characteristic of the variable pre-emphasis circuit 14 in accordance with the level of the signal f, and second data for determining the output time width of the monostable multivibrator 23. data are stored respectively. Therefore, the first data read from the address specified in the ROM 21 by the address signal f is supplied to the pre-emphasis circuit 14, and the second data is supplied to the monostable multivibrator 23. , whose time constant is variably controlled. FIG. 5 shows a block diagram of one embodiment of the variable pre-emphasis circuit 14. As shown in FIG. 5, the variable pre-emphasis circuit 14 is a digital filter, and the multiplication coefficients (multipliers) of the multipliers 38, 39 and 40 are transmitted from the ROM 21 to the control terminal 4.
The pre-emphasis characteristics can be varied by being varied in accordance with the first data supplied to 3 ₁ , 43 ₂ and 43 ₃ . Input terminal 35
In this case, the input digital luminance signal is delayed by the delay time of the signal transmission path from the pre-emphasis circuit 12 to the ROM 21 by the delay circuit 13 in FIG.
(indicated by a in FIG. The digital data taken out from the delay device 37 is supplied to multipliers 39 and 40, respectively, and multiplied by a predetermined multiplier determined according to the first data input to the control terminals 43 ₂ and 43 ₃ . The output signal of multiplier 39 is supplied to adder 36 and added to the input digital data. Further, the output signal of the adder 36 is multiplied by a predetermined multiplier according to the input first data of the control terminal 43 ₁ by the multiplier 38 .
Here, the signal is added and mixed with the output signal of the multiplier 40 and then output to the output terminal 42. To summarize a specific example of the output value of the integrator 17 and the time constant of the variable pre-emphasis circuit 14, as shown in the following table, the larger the value of the output signal e of the integrator 17, the more the variable pre-emphasis circuit 1
4 has a large time constant.

[Table] However, in Table 1 above, the value of the output of the integrator 17 assumes that the sync chip level of the luminance signal a is 0, and
Indicates the value when the white peak level is 100. An example of the relationship between the clip level of the clip circuit 15, the time constant of the variable pre-emphasis circuit 14, and the multipliers of the multipliers 38, 39, and 40 when obtaining this time constant is summarized in the following table. .

[Table] However, in Table 2, the clip level (unit: %) is a relative value to the input signal b. For example, the clip level shown by the dashed line V in Figure 6 is
It is 160% for the input signal waveform of the clip circuit 15 indicated by m ₁ and 180% for the input signal waveform indicated by m ₂ . In this way, variable pre-emphasis circuit 1
The signal waveform when the pre-emphasized signal taken out from the output terminal 42 of No. 4 is DA converted is
As shown in FIG. In the unclipped amplitude portion, the brightness signal h is given an optimal pre-emphasis characteristic with a small time constant. This luminance signal h is supplied to the terminal 24b of the switch circuit 24. On the other hand, the output luminance signal b of the pre-emphasis circuit 12 is time-aligned with the output luminance signal h of the variable pre-emphasis circuit 14 by the delay circuit 25, and then supplied to the terminal 24a of the switch circuit 24. Furthermore, the monostable multivibrator 23 is supplied with the pulse train g taken out through a delay circuit 22 having a delay time equal to the time delay due to the signal transmission path consisting of the integrator 17, latch 20, and ROM 21, and is is triggered, and from this trigger point onwards, the level is high for a time width corresponding to the second data read from the ROM 21 (that is, a time width approximately proportional to the amount of the amplitude portion clipped by the clipping circuit 15). A pulse i as shown in FIG. 3 is generated and outputted. The switch circuit 24 is supplied with this pulse i as a switching pulse, and selects and outputs the input signal of the terminal 24b during the high level period of the pulse i (that is, the period during which at least clipping is performed by the clip circuit 15), During the low level period, switching control is performed to selectively output the input signal of the terminal 24a. As a result, a pre-emphasized luminance signal j as shown in FIG. 3J is taken out from the switch circuit 24. This signal j
is supplied to a clipping circuit (or limiter circuit) 26 having the same characteristics as the clipping circuit 15, where the clipping level exceeds the clipping level shown by the broken line in FIG. After the amplitude parts j ₁ , j ₂ , j ₃ and j ₄ are discarded by the clip and converted into a signal k as shown by the solid line in FIG. ) is supplied as a recording luminance signal.
The digital luminance signal frequency-modulated by the frequency modulator is converted into an analog luminance signal by a DA converter (not shown), and then recorded on a magnetic tape (not shown) by a head. Here, the waveform shown by the broken line in FIG. 3K is the same waveform as FIG. 3C obtained by the conventional circuit, but according to this embodiment, the waveform is clipped as shown in FIG. 3K. The time constant of the pre-emphasis circuit 14 increases as the lost amplitude portion increases, so the clip period becomes longer than before, and the reproducibility of the waveform can be improved when passing through the de-emphasis circuit in the reproduction system. Note that a DA converter may be provided at the input stage of the frequency modulator to perform frequency modulation on the analog video signal. Also,
The reason why the signal format recorded on the magnetic tape is an analog signal is to enable existing VTRs to reproduce recorded signals. Effects of the Invention As described above, according to the present invention, when the amplitude is limited by the clip circuit, a video signal to which a pre-emphasis characteristic whose time constant is varied according to the amount of the amplitude portion is extracted, Since the video signal with the optimal fixed pre-emphasis characteristic is switched and output for the video signal in the period where the amplitude is not limited, the amount of information discarded due to clipping can be reduced, and the de-emphasis circuit of the playback system can be In this case, the reproducibility of the waveform of the clipped video signal can be improved, and the waveform of the unclipped video signal can be almost completely restored, and the required amount of S/N improvement can be obtained. Since it can be constructed from a digital circuit, it has the advantage that the adverse effects of variations in circuit elements, temperature changes, etc. can be significantly reduced compared to conventional analog circuits, and it is also suitable for integration into integrated circuits.

[Brief explanation of drawings]

FIG. 1 is a block system diagram showing the configuration of the circuit of the present invention, FIG. 2 is a block system diagram showing an embodiment of the circuit of the invention, and FIG. 3 is a signal waveform diagram for explaining the operation of the block system shown in FIG. 4 is a block system diagram showing an embodiment of the integrator in the block system shown in FIG. 2, and FIG. 5 is a block system diagram showing an embodiment of the variable pre-emphasis circuit in the block system shown in FIG. Figure 6 is a signal waveform diagram explaining the clip level of the circuit of the present invention, Figure 7 is a diagram showing an example of the input video signal waveform and output video signal waveform of a conventional pre-emphasis circuit, and Figure 8 is a diagram showing the original video signal waveform and the clip level. Figure 9 shows an example of a signal waveform when a video signal is passed through a de-emphasis circuit.
The figure shows the output video signal waveform of the pre-emphasis circuit when the time constant of the pre-emphasis circuit is varied. FIG. 10 is a block system diagram showing an example of a conventional pre-emphasis circuit with a variable time constant. FIG. 3 is a signal waveform diagram for explaining the operation of the illustrated block system. 1, 50...Video signal input terminal, 2...First pre-emphasis circuit, 3...Second pre-emphasis circuit, 4...First clip circuit, 5...
Detection means, 6... Control means, 7... Switch circuit means, 8... Second clip circuit, 9, 54...
Video signal output terminal, 11... Luminance signal input terminal,
12... Pre-emphasis circuit, 14... Variable pre-emphasis circuit, 15, 26, 52... Clip circuit, 16... Subtraction circuit, 17... Integrator,
18...Window comparator, 20...Latch, 21...Read-only memory (ROM),
23... Monostable multivibrator, 24,30
...Switch circuit, 27...Brightness signal output terminal,
32, 37...1 sample delay device, 38, 39,
40... Multiplier, 53... De-emphasis circuit.

Claims (1)

[Claims] 1 The above-mentioned recording signal of a recording system that converts an analog video signal into a digital video signal, performs predetermined recording signal processing, and then records the frequency-modulated and DA-converted analog frequency-modulated video signal on a recording medium. In the video signal recording circuit that performs processing, a first pre-emphasis circuit provides a fixed pre-emphasis characteristic to the input digital video signal, and a second pre-emphasis circuit provides a variable pre-emphasis characteristic to the input digital video signal. , a first clip circuit that limits the amplitude component of the output signal of the first pre-emphasis circuit that exceeds a certain value, and subtracts the input and output signals of the first clip circuit to the first clip circuit. a detection means for detecting the amplitude component that is lost as a result; a control means for variably controlling the pre-emphasis characteristic of the second pre-emphasis circuit in accordance with the level of the output detection signal of the detection means; and at least the first clip circuit. During the clipping period by the first clipping circuit detected by the output signal of the pre-emphasis circuit, the output signal of the second pre-emphasis circuit is selected and output, and during the period when no clipping is being performed by the first clipping circuit, the first clipping circuit selects and outputs the output signal of the second pre-emphasis circuit. switch circuit means for selectively outputting the output signal of the pre-emphasis circuit; and the output signal of the switch circuit means is supplied, and the signal obtained by limiting the amplitude component above the predetermined value is outputted to the frequency modulator as a video signal for recording. 1. A video signal recording circuit comprising a second clip circuit.