JPH04372582A - Capacitor rush current preventing circuit for rectifier - Google Patents

Capacitor rush current preventing circuit for rectifier

Info

Publication number
JPH04372582A
JPH04372582A JP14636691A JP14636691A JPH04372582A JP H04372582 A JPH04372582 A JP H04372582A JP 14636691 A JP14636691 A JP 14636691A JP 14636691 A JP14636691 A JP 14636691A JP H04372582 A JPH04372582 A JP H04372582A
Authority
JP
Japan
Prior art keywords
circuit
capacitor
rectifier
integrating
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14636691A
Other languages
Japanese (ja)
Inventor
Yukio Murakami
村上 幸男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP14636691A priority Critical patent/JPH04372582A/en
Publication of JPH04372582A publication Critical patent/JPH04372582A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To contain a capacitor rush current preventing circuit in a diode module by composing the circuit of an integrator having a series unit of an integrating capacitor and a resistor, and a trigger circuit for detecting the voltage of the capacitor at a predetermined level to supply a gate current to a thyristor. CONSTITUTION:When an AC power source system 2 is connected to a diode rectifying bridge 1, an integrated voltage of an integrating capacitor 22 is low immediately after the connection, and a thyristor 8 maintains an OFF state. And, a smoothing capacitor 3 is charged by an output current of the bridge 1 through a limiting resistor 7. When the integrating voltage of an integrator 21 rises to reach a Zener voltage of a Zener diode 27, the thyristor 8 is triggered to be in a continuity, and a smoothed DC current is supplied to an external load. Thus, a capacitor rush current preventing circuit 20 shows a simple element configuration, and can be contained in a diode module.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は、電動機の可変速度制
御用インバ−タ装置等の直流電源に用いられる整流装置
、ことにその始動時に平滑コンデンサに流入する突入電
流を抑制するために設けられる突入電流防止回路に関す
る。
[Industrial Application Field] This invention relates to a rectifying device used in a DC power source such as an inverter device for variable speed control of an electric motor, and particularly to a rectifier device provided for suppressing inrush current flowing into a smoothing capacitor at the time of starting the device. Related to inrush current prevention circuit.

【0002】0002

【従来の技術】交流電力を直流電力に変換する整流装置
において、平滑コンデンサをダイオ−ド整流ブリッジの
直流出力側に直接接続して交流電源を投入すると、平滑
コンデンサにピ−ク値が極めて大きい充電電流(突入電
流)が流れる。そのため、ダイオ−ド整流ブリッジには
サ−ジ電流定挌の大きい整流素子を用いる必要があり、
また整流装置の容量が大きい場合には充電電流により交
流電源系統の電圧が低下するなどの障害をおよぼす。そ
こで整流素子の大型化や電源系統への悪影響を排除する
ために、ダイオ−ド整流ブリッジの直流出力側にコンデ
ンサ突入電流防止回路を設けたものが知られている。
[Prior Art] In a rectifier that converts AC power to DC power, when a smoothing capacitor is connected directly to the DC output side of a diode rectifier bridge and AC power is turned on, the peak value of the smoothing capacitor is extremely large. Charging current (rush current) flows. Therefore, it is necessary to use a rectifier element with a large surge current rating in the diode rectifier bridge.
Furthermore, if the capacity of the rectifier is large, the charging current may cause problems such as a drop in the voltage of the AC power supply system. Therefore, in order to eliminate the increase in the size of the rectifying element and the adverse effects on the power supply system, it is known that a diode rectifying bridge is provided with a capacitor inrush current prevention circuit on the DC output side.

【0003】図3は整流装置の従来のコンデンサ突入電
流防止回路を示す接続図であり、交流電源系統2からの
交流電力を直流電力に変換して外部負荷に供給する整流
装置はダイオ−ド整流ブリッジ1と平滑コンデンサ3と
で構成される。また、コンデンサ突入電流防止回路10
は、ダイオ−ド整流ブリッジ1と平滑コンデンサ2との
間に直列接続された制限抵抗7とサイリスタ8との並列
回路からなる主回路9と、サイリスタ8のゲ−トGにゲ
−ト電流を供給するトリガ−回路11とで構成される。 トリガ−回路11は、平滑コンデンサ3の電圧が規定の
充電電圧に達したことを電圧検出器12で検出し、その
出力をANDゲ−ト14のゲ−ト信号として発振回路1
3の出力を絶縁トランス15の1次巻線に供給し、その
2次巻線電圧をダイオ−ド16および抵抗17を介して
サイリスタ8のゲ−トGにゲ−ト電流として供給するよ
う構成される。
FIG. 3 is a connection diagram showing a conventional capacitor inrush current prevention circuit for a rectifier. The rectifier converts AC power from the AC power supply system 2 into DC power and supplies it to an external load using a diode rectifier. It is composed of a bridge 1 and a smoothing capacitor 3. In addition, the capacitor inrush current prevention circuit 10
is a main circuit 9 consisting of a parallel circuit of a limiting resistor 7 and a thyristor 8 connected in series between a diode rectifier bridge 1 and a smoothing capacitor 2, and a gate current to the gate G of the thyristor 8. It is composed of a trigger circuit 11 that supplies the trigger circuit. The trigger circuit 11 uses a voltage detector 12 to detect that the voltage of the smoothing capacitor 3 has reached a specified charging voltage, and uses the output as a gate signal for the AND gate 14 to control the oscillation circuit 1.
3 is supplied to the primary winding of an isolation transformer 15, and its secondary winding voltage is supplied as a gate current to the gate G of the thyristor 8 via a diode 16 and a resistor 17. be done.

【0004】したがって、電源投入直後は平滑コンデン
サ3の電圧が低いのでサイリスタ8はオフ状態にあり、
ダイオ−ド整流ブリッジ1の直流出力電流は制限抵抗7
を介して平滑コンデンサ3を充電することにより、平滑
コンデンサ3に過大な充電電流が流れることを防止でき
る。また、平滑コンデンサ3の充電電圧が規定の電圧に
到達すると、トリガ−回路11を介してサイリスタ8に
ゲ−ト電流が流れ、サイリスタ8がオンし、その後の負
荷電流はサイリスタ8を介して供給される。
[0004] Immediately after the power is turned on, the voltage across the smoothing capacitor 3 is low, so the thyristor 8 is in an off state.
The DC output current of the diode rectifier bridge 1 is controlled by the limiting resistor 7.
By charging the smoothing capacitor 3 via the smoothing capacitor 3, it is possible to prevent an excessive charging current from flowing into the smoothing capacitor 3. Furthermore, when the charging voltage of the smoothing capacitor 3 reaches a specified voltage, a gate current flows to the thyristor 8 via the trigger circuit 11, the thyristor 8 is turned on, and the subsequent load current is supplied via the thyristor 8. be done.

【0005】[0005]

【発明が解決しようとする課題】上述のような従来のコ
ンデンサ突入電流防止回路においては、トリガ−回路の
構成部材の数が多く回路が複雑であるため経済的不利益
を生ずるばかりか、絶縁トランスを含むために電力用半
導体素子を内蔵したモジュ−ル製品(ダイオ−ドモジュ
−ル)に内蔵させることが困難であり、したがってモジ
ュ−ルの外部回路が複雑かつ大型化するという問題があ
り、その改善が求められている。
[Problems to be Solved by the Invention] In the conventional capacitor inrush current prevention circuit as described above, the number of components of the trigger circuit is large and the circuit is complicated, which not only causes an economic disadvantage, but also requires an isolation transformer. Because of this, it is difficult to incorporate it into module products (diode modules) that incorporate power semiconductor elements, and there is a problem that the external circuit of the module becomes complicated and large. Improvement is required.

【0006】この発明の目的は、回路の構成が簡素で、
ダイオ−ドモジュ−ルに容易に内蔵できるトリガ−回路
を有する整流装置のコンデンサ突入電流防止回路を得る
ことにある。
[0006] An object of the present invention is to have a simple circuit configuration;
An object of the present invention is to obtain a capacitor inrush current prevention circuit for a rectifier having a trigger circuit that can be easily built into a diode module.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
に、この発明によれば、ダイオ−ド整流ブリッジと、そ
の直流出力側に並列接続された平滑コンデンサとからな
る整流装置が、前記ダイオ−ド整流ブリッジと平滑コン
デンサとの間に直列接続された制限抵抗およびサイリス
タの並列回路を備え、前記ダイオ−ド整流ブリッジの始
動時には前記サイリスタをオフして前記制限抵抗により
前記平滑コンデンサへの突入電流を防止するものにおい
て、前記ダイオ−ド整流ブリッジの直流出力側に並列接
続された積分コンデンサおよび抵抗器の直列体からなる
積分回路と、前記積分コンデンサの電圧を所定のレベル
で検出して前記サイリスタにゲ−ト電流を供給するトリ
ガ−回路とを備えてなるものとする。
[Means for Solving the Problems] In order to solve the above problems, according to the present invention, a rectifying device comprising a diode rectifying bridge and a smoothing capacitor connected in parallel to the DC output side of the diode rectifying bridge is provided. - a parallel circuit of a limiting resistor and a thyristor connected in series between a diode rectifying bridge and a smoothing capacitor; when the diode rectifying bridge is started, the thyristor is turned off and the limiting resistor causes a rush to the smoothing capacitor; The current prevention device includes an integrating circuit comprising an integrating capacitor and a series resistor connected in parallel to the DC output side of the diode rectifier bridge, and detecting the voltage of the integrating capacitor at a predetermined level. and a trigger circuit that supplies gate current to the thyristor.

【0008】またトリガ−回路が、サイリスタのアノ−
ド,ゲ−ト間にエミッタおよびコレクタがゲ−ト側に抵
抗を配して接続されたトランジスタと、このトランジス
タのベ−スと積分回路の中間接続点との間に接続された
ツェナ−ダイオ−ドとからなり、前記積分回路の積分電
圧が前記ツェナ−ダイオ−ドのツェナ−電圧を越えたと
き、前記トランジスタにベ−ス電流が流れ始めるよう形
成されてなるものとする。
[0008] Also, the trigger circuit
A transistor whose emitter and collector are connected between the gate and the gate with a resistor placed on the gate side, and a Zener diode connected between the base of this transistor and the intermediate connection point of the integrating circuit. The transistor is formed such that a base current begins to flow through the transistor when the integrated voltage of the integrating circuit exceeds the Zener voltage of the Zener diode.

【0009】さらに、トリガ−回路が、平滑コンデンサ
の充電電圧が所定レベルに到達するまで積分回路の動作
を抑制する遅延回路を備えてなるものとし、遅延回路が
、平滑コンデンサに並列接続された抵抗分圧器と、積分
回路にエミッタおよびコレクタが直列接続されたトラン
ジスタと、このトランジスタのベ−スと前記抵抗分圧器
の分圧端子との間に接続されたツェナ−ダイオ−ドとか
らなるものとする。
Furthermore, the trigger circuit includes a delay circuit that suppresses the operation of the integrating circuit until the charging voltage of the smoothing capacitor reaches a predetermined level, and the delay circuit includes a resistor connected in parallel to the smoothing capacitor. A voltage divider, a transistor whose emitter and collector are connected in series to an integrating circuit, and a Zener diode connected between the base of this transistor and the voltage dividing terminal of the resistor voltage divider. do.

【0010】0010

【作用】この発明の構成において、ダイオ−ド整流ブリ
ッジと平滑コンデンサとの間に直列接続された制限抵抗
およびサイリスタの並列回路に、ダイオ−ド整流ブリッ
ジの直流出力側に並列接続された積分コンデンサおよび
抵抗器の直列体からなる積分回路と、この積分回路の積
分電圧を所定のレベルで検出してサイリスタにゲ−ト電
流を供給するトリガ−回路とを付加するよう構成したこ
とにより、積分回路の時定数の決め方によりサイリスタ
がオンするまでの時間を遅延する機能が得られ、その間
平滑コンデンサが制限抵抗を介して充電されるので、過
大な突入電流を抑制する機能が得られる。
[Operation] In the configuration of the present invention, in a parallel circuit of a limiting resistor and a thyristor connected in series between a diode rectifier bridge and a smoothing capacitor, an integrating capacitor is connected in parallel to the DC output side of the diode rectifier bridge. By adding an integrating circuit consisting of a resistor and a resistor in series, and a trigger circuit that detects the integrated voltage of this integrating circuit at a predetermined level and supplies a gate current to the thyristor, the integrating circuit By determining the time constant, a function is obtained to delay the time until the thyristor turns on, and during this time, the smoothing capacitor is charged via the limiting resistor, so a function to suppress excessive inrush current is obtained.

【0011】また、トリガ−回路を、サイリスタのアノ
−ド,ゲ−ト間にエミッタおよびコレクタがゲ−ト側に
抵抗を配して接続されたトランジスタと、このトランジ
スタのベ−スと積分回路の中間接続点との間に接続され
たツェナ−ダイオ−ドとで構成し、積分回路の積分電圧
がツェナ−ダイオ−ドのツェナ−電圧を越えたとき、ト
ランジスタにベ−ス電流が流れ始めるよう形成すれば、
積分回路を含めてトリガ−回路を簡素に構成できるとと
もに、ダイオ−ドモジュ−ルへの内蔵を阻害する絶縁ト
ランスが排除されるので、コンデンサ突入電流防止回路
と整流装置とが一体化したダイオ−ドモジュ−ルを得る
ことができる。
[0011] The trigger circuit is also constructed by using a transistor whose emitter and collector are connected between the anode and gate of a thyristor with a resistor placed on the gate side, and the base of this transistor and an integrating circuit. When the integrated voltage of the integrating circuit exceeds the Zener voltage of the Zener diode, base current begins to flow through the transistor. If formed like this,
The trigger circuit including the integrator circuit can be configured simply, and the isolation transformer that would prevent it from being built into the diode module is eliminated, making it possible to create a diode module that integrates the capacitor inrush current prevention circuit and rectifier. − You can obtain the following information.

【0012】さらに、トリガ−回路に平滑コンデンサの
充電電圧が所定レベルに到達するまで積分回路の動作を
抑制する遅延回路を付加するよう構成すれば、サイリス
タがオンするまでの遅延時間を積分回路と遅延回路とで
分担することになり、積分回路のコンデンサ容量を低減
してモジュ−ル化を一層容易にする機能が得られる。こ
とに遅延回路を、平滑コンデンサに並列接続された抵抗
分圧器と、積分回路にエミッタおよびコレクタが直列接
続されたトランジスタと、このトランジスタのベ−スと
抵抗分圧器の中間接続点との間に接続されたツェナ−ダ
イオ−ドとで構成すれば、遅延回路および積分回路のモ
ジュ−ル化も容易になる。
Furthermore, if the trigger circuit is configured to include a delay circuit that suppresses the operation of the integrating circuit until the charging voltage of the smoothing capacitor reaches a predetermined level, the delay time until the thyristor is turned on can be changed from that of the integrating circuit. Since this function is shared by the delay circuit, the function of reducing the capacitance of the integrating circuit and facilitating modularization can be obtained. In particular, a delay circuit is connected between a resistive voltage divider connected in parallel to a smoothing capacitor, a transistor whose emitter and collector are connected in series with an integrating circuit, and an intermediate connection point between the base of this transistor and the resistive voltage divider. By configuring it with connected Zener diodes, it becomes easy to modularize the delay circuit and the integration circuit.

【0013】[0013]

【実施例】以下、この発明を実施例に基づいて説明する
。図1はこの発明の実施例になる整流装置のコンデンサ
突入電流防止回路を示す接続図であり、以下、従来技術
と同じ構成部分には同一参照符号を付すことにより、重
複した説明を省略する。図において、平滑コンデンサ3
の突入電流防止回路20は、ダイオ−ド整流ブリッジ1
の直流出力側に並列接続された積分回路21と、積分コ
ンデンサ22と抵抗23の直列回路で構成される積分回
路21の積分電圧(積分コンデンサ22の電圧)を検知
してサイリスタ8にゲ−ト電流を供給するトリガ−回路
25とで構成される。トリガ−回路25は、エミッタE
がサイリスタ8のアノ−ドに,コレクタCが抵抗28を
介してサイリスタ8のゲ−トGにそれぞれ接続された図
の場合pnpトランジスタ26と、そのベ−スBと積分
回路21の中点との間に接続されたツェナ−ダイオ−ド
27とで構成される。
EXAMPLES The present invention will be explained below based on examples. FIG. 1 is a connection diagram showing a capacitor inrush current prevention circuit of a rectifier according to an embodiment of the present invention. Hereinafter, the same components as those in the prior art are given the same reference numerals, and redundant explanation will be omitted. In the figure, smoothing capacitor 3
The inrush current prevention circuit 20 includes a diode rectifier bridge 1
The integrated voltage of the integrating circuit 21 (voltage of the integrating capacitor 22), which is composed of an integrating circuit 21 connected in parallel to the DC output side of the integrator 21 and a series circuit of an integrating capacitor 22 and a resistor 23, is detected and gated to the thyristor 8. It is composed of a trigger circuit 25 that supplies current. The trigger circuit 25 emitter E
is connected to the anode of the thyristor 8, and the collector C is connected to the gate G of the thyristor 8 via the resistor 28. In this case, the midpoint between the pnp transistor 26, its base B, and the integrating circuit 21. and a Zener diode 27 connected between the two.

【0014】このように構成された整流装置のコンデン
サ突入電流防止回路において、ダイオ−ド整流ブリッジ
1に交流電源系統2を投入すると、投入直後はpnpト
ランジスタ26のE,B間に加わる積分コンデンサ22
の積分電圧が低く、トランジスタ26のベ−ス電流がツ
ェナ−ダイオ−ド27のツェナ−電圧により阻止され、
サイリスタ8にはゲ−ト電流が供給されないので、サイ
リスタ8はオフ状態を維持し、ダイオ−ド整流ブリッジ
1の出力電流は制限抵抗7を介して平滑コンデンサ3を
充電する。したがって、ダイオ−ド整流ブリッジの始動
直後に平滑コンデンサ3に流れる過大なピ−ク値を有す
る突入電流は、制限抵抗7によりそのピ−ク値が抑制さ
れる。積分回路21の積分電圧がその時定数によって決
まる上昇速度で上昇し、ツェナ−ダイオ−ド27のツェ
ナ−電圧に到達すると、pnpトランジスタ26にはベ
−ス電流が流れ、増幅されたコレクタ電流がゲ−ト電流
としてサイリスタ8のゲ−トGに供給されるので、サイ
リスタ8がトリガ−されて導通状態となり、ダイオ−ド
整流ブリッジ1の出力電流がサイリスタを介して平滑コ
ンデンサ3を充電するとともに、平滑化された直流電流
が外部負荷に供給される。
In the capacitor inrush current prevention circuit of the rectifier constructed as described above, when the AC power supply system 2 is turned on to the diode rectifier bridge 1, immediately after the AC power supply system 2 is turned on, the integrating capacitor 22 is applied between E and B of the pnp transistor 26.
Since the integrated voltage of the transistor 26 is low, the base current of the transistor 26 is blocked by the Zener voltage of the Zener diode 27.
Since no gate current is supplied to the thyristor 8, the thyristor 8 remains off, and the output current of the diode rectifier bridge 1 charges the smoothing capacitor 3 via the limiting resistor 7. Therefore, the peak value of the inrush current having an excessively high peak value flowing into the smoothing capacitor 3 immediately after the diode rectifying bridge is started is suppressed by the limiting resistor 7. When the integrated voltage of the integrating circuit 21 rises at a rising speed determined by its time constant and reaches the Zener voltage of the Zener diode 27, a base current flows through the PNP transistor 26, and the amplified collector current flows into the gate. Since the current is supplied to the gate G of the thyristor 8 as a gate current, the thyristor 8 is triggered and becomes conductive, and the output current of the diode rectifier bridge 1 charges the smoothing capacitor 3 via the thyristor. The smoothed DC current is supplied to an external load.

【0015】その結果、積分回路21の時定数と制限抵
抗7の抵抗値の決め方により平滑コンデンサ3への突入
電流を抑制できるので、ダイオ−ド整流ブリッジ1に使
用するダイオ−ドはそのサ−ジ電流定挌をことさら大き
くする必要がなく、したがってダイオ−ド整流ブリッジ
を小型かつ経済的に有利に構成できるとともに、過大な
突入電流が流れることによる交流電源系統の電圧降下等
の悪影響も排除される。また、コンデンサ突入電流防止
回路20は絶縁トランスを含まず、半導体プロセスによ
る1チップ化が可能な簡素な素子構成となるので、電力
用半導体チップを複数内蔵したダイオ−ドモジュ−ルか
らなる整流装置に内蔵させることができるとともに、外
部回路を排除または簡素化することができる。
As a result, the rush current to the smoothing capacitor 3 can be suppressed by determining the time constant of the integrating circuit 21 and the resistance value of the limiting resistor 7, so that the diode used in the diode rectifier bridge 1 can be There is no need to make the current constant particularly large, so the diode rectifier bridge can be made compact and economically advantageous, and the negative effects such as voltage drop in the AC power supply system due to the flow of excessive inrush current are eliminated. Ru. In addition, the capacitor inrush current prevention circuit 20 does not include an isolation transformer and has a simple element configuration that can be integrated into a single chip using a semiconductor process. It can be built-in, and external circuitry can be eliminated or simplified.

【0016】なお、前述の実施例はトリガ−回路にpn
pトランジスタを用いた場合を例に説明したが、npn
トランジスタを用いても前述の実施例と同様の機能を有
するコンデンサ突入電流防止回路を構成することが可能
である。この場合、トランジスタのE,C端子のサイリ
スタへの接続方向、およびツェナ−ダイオ−ドの接続方
向は図1に示す方向と逆向きにする。
Note that in the above embodiment, the trigger circuit has a pn
The explanation was given using a p-transistor as an example, but npn
It is also possible to construct a capacitor inrush current prevention circuit having the same function as the above-described embodiment by using a transistor. In this case, the direction in which the E and C terminals of the transistor are connected to the thyristor and the direction in which the Zener diode is connected are opposite to the direction shown in FIG.

【0017】図2はこの発明の異なる実施例を示す接続
図であり、平滑コンデンサ3に並列接続された抵抗分圧
器32と、積分回路21にコレクタCおよびエミッタE
が直列接続されたトランジスタ(図の場合npnトラン
ジスタ)34と、そのベ−スBと抵抗分圧器32の分圧
端子間に接続されたツェナ−ダイオ−ド33とからなる
遅延回路31を付加した点が前述の実施例と異なってお
り、遅延回路31の抵抗分圧器32が平滑コンデンサ3
の充電電圧を監視し、その電圧がツェナ−ダイオ−ド3
3のツェナ−電圧に到達するまで、トランジスタ34の
ベ−ス電流の通流を阻止するので、平滑コンデンサの充
電電圧が規定の電圧値に到達するまでの間、トランジス
タ34はオフ状態を維持して積分回路21の積分動作を
阻止することになる。したがって、サイリスタ8がオフ
状態を維持する時間を積分回路21と遅延回路31とで
分担することになり、両者の時定数の選択の仕方により
、積分コンデンサ22の容量を低減し、ダイオ−ドモジ
ュ−ルへのコンデンサ突入電流防止回路の内蔵を一層容
易化することができる。
FIG. 2 is a connection diagram showing a different embodiment of the present invention, in which a resistive voltage divider 32 is connected in parallel to a smoothing capacitor 3, and a collector C and an emitter E are connected to an integrating circuit 21.
A delay circuit 31 is added, which consists of a transistor (NPN transistor in the figure) connected in series and a Zener diode 33 connected between its base B and the voltage dividing terminal of the resistor voltage divider 32. This is different from the previous embodiment in that the resistance voltage divider 32 of the delay circuit 31 is replaced by the smoothing capacitor 3.
monitors the charging voltage of the Zener diode 3.
Since the base current of the transistor 34 is blocked until the Zener voltage of No. 3 is reached, the transistor 34 remains off until the charging voltage of the smoothing capacitor reaches the specified voltage value. This prevents the integrating circuit 21 from performing an integrating operation. Therefore, the time during which the thyristor 8 remains off is shared between the integrating circuit 21 and the delay circuit 31, and depending on how the time constants of both are selected, the capacitance of the integrating capacitor 22 can be reduced and the diode module This makes it easier to incorporate a capacitor inrush current prevention circuit into the module.

【0018】[0018]

【発明の効果】この発明は前述のように、ダイオ−ド整
流ブリッジと平滑コンデンサとの間に直列接続された制
限抵抗とサイリスタの並列回路に、ダイオ−ド整流ブリ
ッジの直流出力側に並列接続された積分コンデンサと抵
抗器の直列体からなる積分回路と、この積分回路の積分
電圧を所定のレベルで検出してサイリスタにゲ−ト電流
を供給するトリガ−回路とを付加するよう構成した。そ
の結果、積分回路の時定数の決め方によりサイリスタが
オンするまでの時間を遅延する機能が得られ、その間平
滑コンデンサが制限抵抗を介して充電されるので、過大
な突入電流を抑制することができ、したがってダイオ−
ド整流ブリッジにサ−ジ電流耐量の大きい電力半導体素
子を用いる必要性が回避され、小型化された整流装置を
経済的に有利に提供することができる。
Effects of the Invention As described above, the present invention has a parallel circuit of a limiting resistor and a thyristor connected in series between a diode rectifier bridge and a smoothing capacitor, and a parallel circuit of a limiting resistor and a thyristor connected in parallel to the DC output side of the diode rectifier bridge. The thyristor is provided with an integrating circuit consisting of a series integrated capacitor and a resistor, and a trigger circuit that detects the integrated voltage of the integrating circuit at a predetermined level and supplies a gate current to the thyristor. As a result, by determining the time constant of the integrating circuit, a function is obtained to delay the time until the thyristor turns on, and during this time the smoothing capacitor is charged via the limiting resistor, making it possible to suppress excessive inrush current. , therefore the diode
This eliminates the need to use a power semiconductor element with a large surge current capacity in the double rectifier bridge, and provides an economically advantageous miniaturized rectifier.

【0019】また、トリガ−回路を、サイリスタのアノ
−ド,ゲ−ト間にエミッタおよびコレクタがゲ−ト側に
抵抗を配して接続されたトランジスタと、このトランジ
スタのベ−スと積分回路の中点との間に接続されたツェ
ナ−ダイオ−ドとで構成し、積分回路の積分電圧がツェ
ナ−ダイオ−ドのツェナ−電圧を越えたとき、トランジ
スタにベ−ス電流が流れ始めるよう形成すれば、従来技
術で問題となったコンデンサ突入電流防止回路の大型化
やダイオ−ドモジュ−ルへの内蔵を阻害する絶縁トラン
スが排除されるとともに、コンデンサ突入電流防止回路
をコンデンサ,抵抗,および小型半導体素子からなり,
ダイオ−ドモジュ−ルへの内蔵が容易で簡素な回路構成
とすることができるので、電力用半導体チップを複数内
蔵したダイオ−ドモジュ−ルからなる整流装置にコンデ
ンサ突入電流防止回路を内蔵した整流装置を提供するこ
とができる。
[0019] The trigger circuit is also constructed by using a transistor whose emitter and collector are connected between the anode and gate of a thyristor with a resistor placed on the gate side, and the base of this transistor and an integrating circuit. It consists of a zener diode connected between the center point and the zener diode, and when the integrated voltage of the integrating circuit exceeds the zener voltage of the zener diode, the base current starts flowing through the transistor. This eliminates the problem of increasing the size of the capacitor inrush current prevention circuit and the isolation transformer that prevents it from being built into the diode module, which was a problem with the conventional technology, and also eliminates the need for a capacitor inrush current prevention circuit that requires a capacitor, a resistor, and a diode module. Consists of small semiconductor elements,
Since it can be easily built into a diode module and has a simple circuit configuration, we have developed a rectifier that has a built-in capacitor inrush current prevention circuit in a rectifier that consists of a diode module that incorporates multiple power semiconductor chips. can be provided.

【0020】さらに、トリガ−回路に平滑コンデンサの
充電電圧が所定レベルに到達するまで積分回路の動作を
抑制する遅延回路を付加するよう構成すれば、サイリス
タがオンするまでの遅延時間を積分回路と遅延回路とで
分担することになり、積分回路のコンデンサ容量を低減
してモジュ−ル化を一層容易化できる。ことに、遅延回
路を、平滑コンデンサに並列接続された抵抗分圧器と、
積分回路にエミッタおよびコレクタが直列接続されたト
ランジスタと、このトランジスタのベ−スと抵抗分圧器
の中点との間に接続されたツェナ−ダイオ−ドとで構成
すれば、遅延回路および積分回路のモジュ−ル化も一層
容易になる利点が得られる。
Furthermore, if the trigger circuit is configured to include a delay circuit that suppresses the operation of the integrating circuit until the charging voltage of the smoothing capacitor reaches a predetermined level, the delay time until the thyristor is turned on can be changed from that of the integrating circuit. Since this is shared by the delay circuit, the capacitance of the integrating circuit can be reduced and modularization can be further facilitated. In particular, the delay circuit is configured with a resistive voltage divider connected in parallel with a smoothing capacitor,
If an integrating circuit is constructed with a transistor whose emitter and collector are connected in series, and a Zener diode connected between the base of this transistor and the midpoint of a resistor voltage divider, a delay circuit and an integrating circuit can be formed. This has the advantage that modularization is even easier.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】この発明の実施例になる整流装置のコンデンサ
突入電流防止回路を簡略化して示す接続図
[Fig. 1] A simplified connection diagram showing a capacitor inrush current prevention circuit of a rectifier according to an embodiment of the present invention.

【図2】この
発明の異なる実施例を示す接続図
[Fig. 2] Connection diagram showing different embodiments of this invention

【図3】整流装置の従
来のコンデンサ突入電流防止回路を示す接続図
[Figure 3] Connection diagram showing a conventional capacitor inrush current prevention circuit for a rectifier

【符号の説明】[Explanation of symbols]

1    ダイオ−ド整流ブリッジ 3    平滑コンデンサ 7    制限抵抗 8    サイリスタ 9    主回路 10    コンデンサ突入電流防止回路11    
トリガ−回路 20    コンデンサ突入電流防止回路21    
積分回路 22    積分コンデンサ 23    抵抗 25    トリガ−回路 26    トランジスタ 27    ツェナ−ダイオ−ド 28    抵抗 31    遅延回路 32    抵抗分圧器 33    ツェナ−ダイオ−ド 34    トランジスタ
1 Diode rectifier bridge 3 Smoothing capacitor 7 Limiting resistor 8 Thyristor 9 Main circuit 10 Capacitor inrush current prevention circuit 11
Trigger circuit 20 Capacitor inrush current prevention circuit 21
Integrating circuit 22 Integrating capacitor 23 Resistor 25 Trigger circuit 26 Transistor 27 Zener diode 28 Resistor 31 Delay circuit 32 Resistor voltage divider 33 Zener diode 34 Transistor

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】ダイオ−ド整流ブリッジと、その直流出力
側に並列接続された平滑コンデンサとからなる整流装置
が、前記ダイオ−ド整流ブリッジと平滑コンデンサとの
間に直列接続された制限抵抗およびサイリスタの並列回
路を備え、前記ダイオ−ド整流ブリッジの始動時には前
記サイリスタをオフして前記制限抵抗により前記平滑コ
ンデンサへの突入電流を防止するものにおいて、前記ダ
イオ−ド整流ブリッジの直流出力側に並列接続された積
分コンデンサおよび抵抗器の直列体からなる積分回路と
、前記積分コンデンサの積分電圧を所定のレベルで検出
して前記サイリスタにゲ−ト信号を供給するトリガ−回
路とを備えてなることを特徴とする整流装置のコンデン
サ突入電流防止回路。
1. A rectifier comprising a diode rectifier bridge and a smoothing capacitor connected in parallel to the DC output side of the rectifier, comprising a limiting resistor connected in series between the diode rectifier bridge and the smoothing capacitor; A parallel circuit of thyristors is provided, and when the diode rectifier bridge is started, the thyristor is turned off to prevent inrush current to the smoothing capacitor by the limiting resistor, the DC output side of the diode rectifier bridge being It comprises an integrating circuit consisting of a series body of an integrating capacitor and a resistor connected in parallel, and a trigger circuit that detects the integrated voltage of the integrating capacitor at a predetermined level and supplies a gate signal to the thyristor. A capacitor inrush current prevention circuit for a rectifier, characterized by:
【請求項2】トリガ−回路が、サイリスタのアノ−ド,
ゲ−ト間にエミッタおよびコレクタがゲ−ト側に抵抗を
配して接続されたトランジスタと、このトランジスタの
ベ−スと積分回路の中間接続点との間に接続されたツェ
ナ−ダイオ−ドとからなり、前記積分回路の積分電圧が
前記ツェナ−ダイオ−ドのツェナ−電圧を越えたとき、
前記トランジスタにベ−ス電流が流れ始めるよう形成さ
れてなることを特徴とする請求項1記載の整流装置のコ
ンデンサ突入電流防止回路。
[Claim 2] The trigger circuit includes a thyristor anode,
A transistor whose emitter and collector are connected between the gates with a resistor placed on the gate side, and a Zener diode connected between the base of this transistor and the intermediate connection point of the integrating circuit. and when the integrated voltage of the integrating circuit exceeds the Zener voltage of the Zener diode,
2. A capacitor inrush current prevention circuit for a rectifier according to claim 1, wherein said transistor is formed so that a base current begins to flow through said transistor.
【請求項3】トリガ−回路が、平滑コンデンサの充電電
圧が所定レベルに到達するまで積分回路の動作を抑制す
る遅延回路を備えてなることを特徴とする請求項1また
は請求項2記載の整流装置のコンデンサ突入電流防止回
路。
3. The rectifier according to claim 1 or 2, wherein the trigger circuit includes a delay circuit that suppresses the operation of the integrating circuit until the charging voltage of the smoothing capacitor reaches a predetermined level. Equipment capacitor inrush current prevention circuit.
【請求項4】遅延回路が、平滑コンデンサに並列接続さ
れた抵抗分圧器と、積分回路にエミッタおよびコレクタ
が直列接続されたトランジスタと、このトランジスタの
ベ−スと前記抵抗分圧器の分圧端子との間に接続された
ツェナ−ダイオ−ドとからなることを特徴とする請求項
3記載の整流装置のコンデンサ突入電流防止回路。
4. The delay circuit comprises a resistive voltage divider connected in parallel to a smoothing capacitor, a transistor whose emitter and collector are connected in series to an integrating circuit, and a base of the transistor and a voltage dividing terminal of the resistive voltage divider. 4. The capacitor inrush current prevention circuit for a rectifier according to claim 3, further comprising a Zener diode connected between the rectifier and the zener diode.
JP14636691A 1991-06-19 1991-06-19 Capacitor rush current preventing circuit for rectifier Pending JPH04372582A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14636691A JPH04372582A (en) 1991-06-19 1991-06-19 Capacitor rush current preventing circuit for rectifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14636691A JPH04372582A (en) 1991-06-19 1991-06-19 Capacitor rush current preventing circuit for rectifier

Publications (1)

Publication Number Publication Date
JPH04372582A true JPH04372582A (en) 1992-12-25

Family

ID=15406099

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14636691A Pending JPH04372582A (en) 1991-06-19 1991-06-19 Capacitor rush current preventing circuit for rectifier

Country Status (1)

Country Link
JP (1) JPH04372582A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009100639A (en) * 2007-09-25 2009-05-07 Panasonic Electric Works Co Ltd Switching power supply unit
CN102075101A (en) * 2011-01-18 2011-05-25 江苏省电力公司常州供电公司 Single-phase full-control rectifier current-limiting device and work method thereof
CN104092364A (en) * 2014-05-30 2014-10-08 四川大学 Device and method for soft starting and safe closing of high-power switching power supply
WO2015125333A1 (en) * 2014-02-20 2015-08-27 株式会社村田製作所 Charging current control circuit and charging current control device
KR20160147385A (en) * 2015-06-15 2016-12-23 현대로템 주식회사 Inrush current limiting circuit even for a load with power switch

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009100639A (en) * 2007-09-25 2009-05-07 Panasonic Electric Works Co Ltd Switching power supply unit
CN102075101A (en) * 2011-01-18 2011-05-25 江苏省电力公司常州供电公司 Single-phase full-control rectifier current-limiting device and work method thereof
WO2015125333A1 (en) * 2014-02-20 2015-08-27 株式会社村田製作所 Charging current control circuit and charging current control device
JPWO2015125333A1 (en) * 2014-02-20 2017-03-30 株式会社村田製作所 Charging current control circuit and charging current control device
CN104092364A (en) * 2014-05-30 2014-10-08 四川大学 Device and method for soft starting and safe closing of high-power switching power supply
KR20160147385A (en) * 2015-06-15 2016-12-23 현대로템 주식회사 Inrush current limiting circuit even for a load with power switch

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