JPH04368154A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enhance noise resistance without forming multiterminals, to further facilitate a partial alteration of a circuit configuration and to enhance light resistance by disposing a circuit board on a surface of a semiconductor element, connecting partial electrode of the element to a wiring film of the bard, and connecting the residual electrode of the element to an outer lead. CONSTITUTION:A circuit board 3 is disposed on a surface of a semiconductor element 1, partial electrode of the element 1 is electrically connected to wiring films 6a, 6b of the board 3, and further the residual electrode 2 of the element 1 is electrically connected to an outer lead 14. Thus, a power source voltage applied to a pair of the outer leads 14 is applied to a power source plane 6 for supplying power of the board 3, a power source plane 5 for a ground, and can be applied from the planes 6, 5 to many pairs of electrodes 2d, 2s of the element 1 in parallel. Accordingly, the number of the pairs 2d, 2s of the power source electrodes is increased to supply the power source voltage to the element in parallel, thereby reducing an impedance of a power source voltage supply route.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device whose noise resistance can be improved or whose circuit configuration can be partially changed.

0002

2. Description of the Related Art Generally, a resin-sealed semiconductor device has a semiconductor element chip-bonded onto a die pad of a lead frame, and wires are connected between each electrode of the semiconductor element and the corresponding inner lead portion of the lead frame. It is formed by bonding, resin sealing, and removing unnecessary parts of the lead frame.

0003

By the way, in resin-sealed semiconductor devices, there has been a remarkable trend toward higher integration of semiconductor elements, multilayer wiring, faster circuits, more terminals, larger chips, and lower power supply voltages. When input/output signals are simultaneously turned on/off (level up/level down) at a plurality of terminals, noise is generated due to the bounce of the power supply voltage, and there is a risk that this noise may cause a malfunction in the circuit. Therefore, it is conceivable to increase the number of power supply electrodes (eg, Vdd electrode) and ground electrodes (eg, Vss electrode). This is because the power source (e.g., Vdd) potential and ground potential (e.g., Vss potential) of the power source voltage are transmitted in parallel through multiple pairs of electrodes, so the resistance (impedance) of the power source voltage supply path becomes small, and the bounce of the power source voltage and This is because fluctuations in the power supply voltage level and ground level can be reduced. However, according to conventional resin-sealed semiconductor devices, if the number of power supply electrodes and ground electrodes is increased, the number of leads that serve as external terminals connected to the power supply electrodes and ground electrodes via wires must also be increased accordingly. It disappears. This is an undesirable factor that hinders miniaturization and high integration of resin-sealed semiconductor devices. Moreover, such a multi-terminal system inevitably tends to increase the wire length, resulting in a problem that high speed performance tends to be sacrificed.

Furthermore, in conventional semiconductor devices, the circuit configuration of the semiconductor device is determined by the circuit configuration of the semiconductor element, and when a part of the circuit is changed, it is necessary to redesign and manufacture a completely different semiconductor element. Yes, it was difficult to change some parts of the circuit. Furthermore, in conventional semiconductor devices,
As resin packages become thinner, light from the outside enters the surface of the semiconductor element, causing a photocurrent to flow through the parasitic phototransistor and parasitic diode, resulting in an increase in leakage current. That is, there was also a problem of poor light resistance.

[0005] The present invention has been made to solve these problems, and has the object of increasing noise resistance without increasing the number of terminals, making it easy to partially change the circuit configuration, and improving light resistance. With the goal.

[0006]

[Means for Solving the Problems] In the semiconductor device of the present invention, a circuit board is arranged on the surface of a semiconductor element, some electrodes of the semiconductor element are connected to a wiring film of the circuit board, and the remaining electrodes of the semiconductor element are connected to a wiring film of the circuit board. It is characterized by being connected to an external lead.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The semiconductor device of the present invention will be explained in detail below according to the illustrated embodiments. 1(A) and 1(B) show one embodiment of the semiconductor device of the present invention, in which (A) is a cross-sectional view, (
B) is an enlarged perspective view of the main part before sealing, and FIG. 2 is a perspective view showing the state after the semiconductor element is connected to the TAB tape. In the drawings, 1 indicates a semiconductor element, 2
, 2, ... are electrodes arranged on the surface of the semiconductor element 1, among which 2s, 2s, ... are grounding electrodes (VSS electrodes), and 2d, 2d, ... are power supply electrodes (Vdd electrodes). It is. In addition, the grounding electrode (VSS electrode) 2s, 2s
, . . . and power supply electrodes (Vdd electrodes) 2d, 2d, .

Reference numeral 3 denotes a circuit board, and wiring films 5, 6a, and 6b are formed on both surfaces of a base 4. That is, this circuit board 3 is a two-layer circuit board. The wiring film 5 is formed on the back surface of the base 4 and forms a grounding power plane. The wiring films 6, 6a, 6b, 6b, ... are formed on the surface of the base 4, the wiring film 6 forms a power supply plane for power supply, and the wiring films 6a, 6a, ... are integrally connected to the power supply plane for power supply. It forms part of the

On the other hand, the wiring films (connection parts) 6b, 6b
, . . . form separate joints with the power plane 6 for power supply, and are connected through through holes 7 to the wiring film 5 forming the power plane for grounding. In addition, the joint part 6
Although there are a plurality of both a and 6b, one each appears in FIG. The circuit board 3 is placed on the surface of the semiconductor element 1 via a resin 8 made of polyimide, for example. Reference numeral 9 denotes an adhesive for bonding the resin 8 and the circuit board 3 together.

Reference numeral 10 denotes a TAB tape, in which leads 12, 12,
... are arranged so as to cross from the outside to the inside when viewed from above, and the tips of the inner lead portions, that is, the portions inside the base 11, are connected to the surface of the semiconductor element 1 via bumps 13 made of, for example, gold. Connected to electrodes 2, 2, . In addition, 12d, 12d,... are power supply leads, 12
s, 12s, . . . are grounding leads. Also, lead 1
2, 12, ..., i.e., the base 11
The tips of the outer portions are connected to the inner ends of the leads 14, 14, . . . formed by the lead frame.

15 is a sealing resin. 16, 16, ... are power supply electrodes 2d, 2d, ..., grounding electrodes 2s, 2s
, . . . and the adjacent electrodes 2, 2, . . . A wiring film that connects the electrodes 2, 2, . Then, power supply leads 12d, 12d, ..., grounding leads 12s, 1
The power supply potential (Vdd) and ground potential (VSS) applied from the outside to the bump 13, the wiring film 16, and the wire 1
7 and the connecting portions 6a and 6b of the circuit board to the power plane 6 for power supply and the power plane 5 for grounding. The power supply potential and ground potential given to the power supply plane 6 and the grounding power plane 5 are connected to the junctions 6a and 6.
a,..., 6b, 6b,... through each power supply potential electrode 2d,
2d, . . . and the ground potential electrodes 2s, 2s, . . . are distributed by wires 17.

According to such a semiconductor device, the power supply voltage applied to the pair of external leads 14 is once transferred to the power supply plane 6 for power supply and the ground power plane 5 of the circuit board 3.
from the power plane 6 for power supply and the power plane 4 for grounding to the multiple pairs 2d, 2s, 2d of the semiconductor element 1.
, 2s, . . . can be applied in parallel. Therefore, by increasing the number of power supply electrode pairs 2d and 2s of the semiconductor element 1, the power supply voltage can be supplied in parallel into the semiconductor element, thereby reducing the impedance of the power supply voltage supply path. Noise resistance can be improved. In other words, input/output signals are turned on at multiple terminals at the same time,
It is possible to reduce the noise generated due to the bounce of the power supply voltage when the power supply is turned off, and it is possible to prevent malfunctions.

Furthermore, since the circuit board 3 is disposed on the semiconductor element 1, the circuit board 3 can block external light from entering the surface of the semiconductor element 1, and as a result, the semiconductor element 1 can be prevented from entering the surface area of the semiconductor element 1. It is possible to prevent photocurrent from flowing into the phototransistor or photodiode parasitic on the surface of the element. That is, light resistance can be improved.

FIG. 3 shows a modification of the semiconductor device shown in FIG. This semiconductor device differs from the semiconductor device shown in FIG. 1 in that it has a die pad, whereas the semiconductor device shown in FIG. 1 is of a die padless type. However, they are similar in other respects. That is, in the semiconductor device shown in FIG. 1, the leads 12 of the TAB tape 10,
The outer lead parts of 12,... are connected to the leads 14, 14,... of the lead frame, and then wire bonding, resin sealing, and unnecessary parts of the lead frame are removed, making it possible to manufacture without the need for a die pad. .

On the other hand, the semiconductor device shown in FIG. 3 uses a lead frame with a die pad, and on the die pad is a semiconductor after TAB tape connection and unnecessary portions of the leads 12, 12, . . . have been removed by cutting. Element 1
Bond the outer lead portions of the leads 12, 12, ... to the leads 14, 14, ... of the lead frame.
The lead frame is connected to the inner lead portion of the lead frame, and then resin sealed and unnecessary parts of the lead frame are removed by cutting. Note that the die padless method has a slightly more complicated process than the die padless method, and the crack occurrence rate, that is, the probability that water in the resin evaporates during solder reflow and cracks occur is slightly higher.

FIGS. 4(A) and 4(B) show another embodiment of the semiconductor device of the present invention, in which (A) is a perspective view showing the main part before resin sealing, and (B) is a circuit diagram. FIG. 3 is an enlarged cross-sectional view of the substrate. In this embodiment, a four-layer circuit board is used as the circuit board 3, and a power supply plane 6 for power supply and a power supply plane 5 for grounding are provided on the four-layer circuit board 3 to not only improve noise resistance but also provide signal lines. By providing this, it is possible to partially change the circuit configuration of the semiconductor device using the circuit board 3 while using the semiconductor element 1 having the same circuit configuration.

Specifically, the circuit board 3 has connection wiring films 19, 19, .
0 and a power supply plane 6 for power supply as the second layer.
, a ground power plane 5 is formed as the third layer, and signal wiring 20 is formed as the bottom layer. Since the circuit board 3 has four layers, it is also possible to electrically connect the uppermost layer wiring films that are separated from each other by using the through holes 7 and the lowermost wiring film, allowing freedom in circuit design. You can increase the degree. Note that by increasing the number of power supply planes to three, a semiconductor device compatible with multiple power supplies can also be configured.

FIGS. 5A and 5B show still another embodiment of the semiconductor device of the present invention, in which (A) is a perspective view of a semiconductor element connected to a TAB tape, and (B) is a perspective view of a semiconductor device connected to a TAB tape. FIG. In this embodiment, the semiconductor element 1 is provided with electrodes 2, 2, etc. not only on the periphery but also in the center, and as the circuit board 3, the electrodes 2, 2, etc. are provided in the center of the semiconductor element 1.
, . . . is provided with an escape hole 21 for escaping. If this escape hole 21 is large enough to accommodate the tip of the wire bonder, wire bonding can be performed without any problem. According to this embodiment, the electrodes 2, 2,
... is provided, the power supply voltage can also be supplied to the central portion of the semiconductor element 1, increasing the degree of freedom in designing the semiconductor element. Note that the electrodes 2, 2, . . . provided in the center of the semiconductor element 1 are wires 17, 1.
7, . . . are connected to the connection portion on the surface of the circuit board 3.

[0019]

Effects of the Invention In the semiconductor device of the present invention, a circuit board is disposed on the surface of a semiconductor element, some electrodes of the semiconductor element and a wiring film of the circuit board are electrically connected, and the semiconductor element The remaining electrodes and the external lead are electrically connected. Therefore, according to the semiconductor device of the present invention, the power supply voltage received from the external lead is applied to the power supply plane for power supply and the power supply plane for grounding, and from the power supply plane for power supply and the power supply plane for grounding, multiple pairs of semiconductor elements are connected. Since it can be applied in parallel to the power supply electrodes, the impedance of the power supply voltage supply path can be lowered without increasing the number of external leads, which in turn prevents fluctuations in the power supply voltage level and ground potential level due to signal on/off. This improves noise resistance. Also,
By providing wiring for signals on the circuit board, the circuit configuration of the semiconductor element can be partially changed using the circuit board, and the circuit of the semiconductor device can be changed without changing the semiconductor element, increasing versatility. .

[Brief explanation of drawings]

[Fig. 1] (A) and (B) show one embodiment of the semiconductor device of the present invention, in which (A) is a cross-sectional view, and (B) is an enlarged perspective view showing the main part in a state before resin sealing. It is a diagram.

FIG. 2 is a perspective view showing a state in which a semiconductor element is connected to the TAB tape of the embodiment shown in FIG. 1;

FIG. 3 is a cross-sectional view of a modification of the semiconductor device shown in FIG. 1 having a die pad.

FIGS. 4(A) and 4(B) show other embodiments of the semiconductor device of the present invention, in which (A) is a perspective view showing the main part before resin sealing, and (B) is a circuit board. FIG.

[Fig. 5] (A) and (B) show still other embodiments of the semiconductor device of the present invention, in which (A) is a perspective view of a state in which a semiconductor element is connected to a TAB tape, and (B) is a cross-sectional view. It is.

[Explanation of symbols]

1 Semiconductor element 3 Circuit board 5　Power supply plane for grounding 6 Power supply plane for power supply 7 Through hole 10 TAB tape 12 TAB read 14 Lead (lead frame) 15 Resin 17 Wire

Claims (1)

[Claims] 1. A circuit board is disposed on a surface of a semiconductor element, a part of the electrodes of the semiconductor element and a wiring film of the circuit board are electrically connected, and the remaining electrodes of the semiconductor element and an external A semiconductor device characterized in that a lead is electrically connected to the semiconductor device.