JPH04368132A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH04368132A JPH04368132A JP14438391A JP14438391A JPH04368132A JP H04368132 A JPH04368132 A JP H04368132A JP 14438391 A JP14438391 A JP 14438391A JP 14438391 A JP14438391 A JP 14438391A JP H04368132 A JPH04368132 A JP H04368132A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- emitter
- base
- junction
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 6
- 239000011800 void material Substances 0.000 claims description 3
- 230000001681 protective effect Effects 0.000 claims description 2
- 230000005855 radiation Effects 0.000 abstract description 12
- 150000004767 nitrides Chemical class 0.000 abstract description 10
- 230000000694 effects Effects 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- 238000005215 recombination Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 231100000987 absorbed dose Toxicity 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は半導体装置に関し、特に
耐放射線特性をもつ縦型バイポーラトランジスタに関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a vertical bipolar transistor having radiation-resistant characteristics.
【０００２】0002
【従来の技術】従来の耐放射線性ＮＰＮトランジスタは
、図３に示すようにエミッタ３−ベース２接合上の酸化
膜５の厚さが数１００Ａとなっている。この値は通常の
ＮＰＮトランジスタのエミッタ−ベース接合上の酸化膜
厚である５０００〜１００００Ａと比べて極端に薄くな
っている。そのほかエピタキシャル層の各拡散層上では
、通常のトランジスタと変るところはない。2. Description of the Related Art In a conventional radiation-resistant NPN transistor, as shown in FIG. 3, an oxide film 5 on an emitter 3-base 2 junction has a thickness of several hundred angstroms. This value is extremely thin compared to the thickness of the oxide film on the emitter-base junction of a normal NPN transistor, which is 5,000 to 10,000 Å. Other than that, on each diffusion layer of the epitaxial layer, there is no difference from a normal transistor.
【０００３】酸化膜を薄くするのは、界面準位を減少さ
せるためである。The reason why the oxide film is made thin is to reduce the interface states.
【０００４】放射線照射後の電流増幅率（ｈＦＥ）低下
の原因であるベース電流の増加は、シリコン−酸化膜界
面の準位が発生・再結合中心として働く表面再結合電流
によるものである。The increase in base current, which is the cause of the decrease in current amplification factor (hFE) after radiation irradiation, is due to surface recombination current that acts as a center of generation and recombination at the level at the silicon-oxide film interface.
【０００５】この界面準位は酸化膜中で放射線照射時に
発生した正孔を起源とするからである。This is because this interface state originates from holes generated in the oxide film during radiation irradiation.
【０００６】[0006]
【発明が解決しようとする課題】従来の耐放射線性縦型
トランジスタでは、一般のトランジスタに比べれば耐放
射線性は向上している。しかし、人工衛星などで要求さ
れる１０３ Ｇｒａｙ（Ｓｉ）以上の吸収線量の領域に
おいては、エミッタ−ベース接合上の数１００Ａの酸化
膜から発生する界面準位のため、十分な耐性をもつとは
言い難い。[Problems to be Solved by the Invention] Conventional radiation-resistant vertical transistors have improved radiation resistance compared to general transistors. However, in the region of absorbed doses of 103 Gray (Si) or more required for artificial satellites, etc., it is difficult to have sufficient resistance because of the interface states generated from the oxide film of several hundred amperes on the emitter-base junction. It's hard to say.
【０００７】[0007]
【課題を解決するための手段】本発明の半導体装置は、
半導体層表面に形成された一導電型のベースと逆導電型
エミッタとの接合部の表面が自然酸化膜および空隙によ
って表面保護膜と隔てられているものである。[Means for Solving the Problems] A semiconductor device of the present invention includes:
The surface of the junction between the base of one conductivity type and the emitter of the opposite conductivity type formed on the surface of the semiconductor layer is separated from the surface protective film by a natural oxide film and a void.
【０００８】[0008]
【実施例】本発明の第１の実施例について、図１を参照
して説明する。Embodiment A first embodiment of the present invention will be described with reference to FIG.
【０００９】絶縁膜の構造は、エミッタ３−ベース２接
合上を除いて酸化膜５の上に厚さ１０００Ａの窒化膜６
を重ねた２層構造となっている。Ｎ− 型エピタキシャ
ル層１およびＰ型ベース２上の酸化膜５の厚さは５００
０〜１００００Ａである。Ｐ型ベース２上の酸化膜５の
厚さはＮ型エミッタ３に近づくにつれて薄くなる。エミ
ッタ３近傍２μｍ以内では一定の数１００Ａの薄い熱酸
化膜５となる。The structure of the insulating film is that a nitride film 6 with a thickness of 1000 Å is formed on the oxide film 5 except on the emitter 3-base 2 junction.
It has a two-layer structure. The thickness of the oxide film 5 on the N- type epitaxial layer 1 and the P-type base 2 is 500 mm.
It is 0-10000A. The thickness of the oxide film 5 on the P-type base 2 becomes thinner as it approaches the N-type emitter 3. Within 2 μm near the emitter 3, a thin thermal oxide film 5 of a certain number of 100 A is formed.
【００１０】エミッタ３近傍１μｍ以内ではこの酸化膜
５は存在しない。エミッタ３−ベース２接合上は約１０
Ａの自然酸化膜１０で覆われている。その上部はエミッ
タ３近傍１〜２μｍのベース２上の熱酸化膜５の厚さ数
１００Ａの空隙１１となっている。その上に厚さ約１０
００Ａの窒化膜６が覆った構造となっている。This oxide film 5 does not exist within 1 μm near the emitter 3. Approximately 10 on emitter 3-base 2 junction
It is covered with a natural oxide film 10 of A. The upper part is a gap 11 with a thickness of several hundred angstroms in the thermal oxide film 5 on the base 2 of 1 to 2 μm near the emitter 3. On top of that, the thickness is about 10
It has a structure covered with a nitride film 6 of 00A.
【００１１】なお、本実施例を実現するにはつぎのよう
にすればよい。Note that the present embodiment can be implemented as follows.
【００１２】熱酸化膜５および窒化膜６が形成されてい
る状態で、エミッタ３予定領域の窒化膜６および熱酸化
膜５を通常通りエッチングしてから、熱酸化膜５のみ１
〜１．５μｍオーバーエッチングする。そのあとＮ型ポ
リシリコン１２を通してＮ型不純物をＰ型ベース２中に
拡散してＮ型エミッタ３を形成する。With the thermal oxide film 5 and the nitride film 6 formed, the nitride film 6 and the thermal oxide film 5 in the area where the emitter 3 is to be etched are etched as usual, and then only the thermal oxide film 5 is etched.
Overetch by ~1.5 μm. Thereafter, an N-type impurity is diffused into the P-type base 2 through the N-type polysilicon 12 to form an N-type emitter 3.
【００１３】つぎに本発明の第２の実施例について、図
２を参照して説明する。Next, a second embodiment of the present invention will be explained with reference to FIG.
【００１４】Ｎ型エミッタ３に直接エミッタ電極７が接
している。Ｎ型エミッタ３を形成したのち、熱酸化膜５
をオーバーエッチングすることにより、容易に本実施例
の構造を実現することができる。An emitter electrode 7 is in direct contact with the N-type emitter 3. After forming the N-type emitter 3, a thermal oxide film 5 is formed.
By over-etching, the structure of this example can be easily realized.
【００１５】本実施例は、第１の実施例と比べてより深
いエミッタ３−ベース２接合を形成することができると
いう利点がある。This embodiment has the advantage that a deeper emitter 3-base 2 junction can be formed compared to the first embodiment.
【００１６】[0016]
【発明の効果】エミッタ−ベース接合上の絶縁膜を自然
酸化膜とその上の窒化膜との間に空隙を設けた構造とし
た。その結果放射線照射によるシリコン−酸化膜界面の
界面準位の発生源が厚さ１０Ａ程度の自然酸化膜のみと
なった。界面準位は従来の１／１０以下と大幅に減少し
た。Effects of the Invention The insulating film on the emitter-base junction has a structure in which a gap is provided between the natural oxide film and the nitride film thereon. As a result, the only source of interface states at the silicon-oxide film interface due to radiation irradiation was the native oxide film with a thickness of about 10A. The interface level was significantly reduced to less than 1/10 of the conventional level.
【００１７】界面準位による表面再結合電流、すなわち
ベース電流の増加を抑制し、放射線照射後のｈＦＥの変
動を大幅に抑える効果がある。[0017] This has the effect of suppressing an increase in surface recombination current, ie, base current, due to interface states, and greatly suppressing fluctuations in hFE after radiation irradiation.
【００１８】窒化膜の下面は従来と同じシリコン面から
数１００Ａを隔てている。そのため放射線照射後の窒化
膜の正の準位によるＰ型ベース表面の空乏化作用は、従
来と同等のレベルを保っている。The lower surface of the nitride film is separated from the silicon surface by several hundred amps as in the conventional case. Therefore, the depletion effect on the P-type base surface due to the positive level of the nitride film after radiation irradiation remains at the same level as in the conventional case.
【図１】本発明の第１の実施例を示す断面図である。FIG. 1 is a sectional view showing a first embodiment of the present invention.
【図２】本発明の第２の実施例を示す断面図である。FIG. 2 is a sectional view showing a second embodiment of the invention.
【図３】従来技術による耐放射線性縦型トランジスタを
示す断面図である。FIG. 3 is a cross-sectional view of a radiation-resistant vertical transistor according to the prior art.
１ Ｎ− 型エピタキシャル層 ２ Ｐ型ベース ３ Ｎ型エミッタ ４ Ｎ型コレクタ引出部 ５ 熱酸化膜 ６ 窒化膜 ７ エミッタ電極 ８ ベース電極 ９ コレクタ電極 １０ 自然酸化膜 １１ 空隙 １２ Ｎ型ポリシリコン 1 N- type epitaxial layer 2 P type base 3 N-type emitter 4 N type collector drawer 5 Thermal oxide film 6 Nitride film 7 Emitter electrode 8 Base electrode 9 Collector electrode 10 Natural oxide film １１ Void 12 N-type polysilicon
Claims (1)
ベースと逆導電型エミッタとの接合部の表面が自然酸化
膜および空隙によって表面保護膜と隔てられている半導
体装置。1. A semiconductor device, wherein a surface of a junction between a base of one conductivity type and an emitter of an opposite conductivity type formed on the surface of a semiconductor layer is separated from a surface protective film by a natural oxide film and a void.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14438391A JP2636555B2 (en) | 1991-06-17 | 1991-06-17 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14438391A JP2636555B2 (en) | 1991-06-17 | 1991-06-17 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04368132A true JPH04368132A (en) | 1992-12-21 |
| JP2636555B2 JP2636555B2 (en) | 1997-07-30 |
Family
ID=15360859
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14438391A Expired - Lifetime JP2636555B2 (en) | 1991-06-17 | 1991-06-17 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2636555B2 (en) |
-
1991
- 1991-06-17 JP JP14438391A patent/JP2636555B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2636555B2 (en) | 1997-07-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19970311 |