JPH04359446A - Probe card and its manufacturing method - Google Patents

Abstract

PURPOSE:To provide a probe card having an electrode made of a wire other than a prone needle for testing a semiconductor chip having an extremely fine pad and the manufacturing method with regard to a probe card used in a prob ing apparatus. CONSTITUTION:A probe card has an electrode for contacting a pad 6a on a semiconductor chip 6 in a probe test. The prove card comprises a substrate 1 having a recessed part 1a at a place corresponding to the pad 6a of the semiconductor chip 6 set as an target for the measurement, a multilevel interconnecting layer 3 consisting of an interconnecting layer 3a and an insulating layer 3b formed on the surface of the substrate 1, and an electrode 2 made of a conductive material in an opening 3c, provided at a place corresponding to the pad 6a, in the multilevel interconnecting layer 3.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe card for a probing device and a method for manufacturing the same.

As semiconductor devices have become more highly integrated in recent years, the number of pads on a semiconductor chip has increased, the pitch has become finer, and the area where pads are provided has come to be provided not only at the periphery but also at the center of the semiconductor chip. ing.

The conventional method of performing a probe test using a probe card equipped with probe needles has reached its physical limit, and it is now necessary to test such semiconductor chips using a new method.

Under the above circumstances, there is a demand for a probe card that can test semiconductor chips equipped with miniaturized pads without using probe needles.

[0005]

[Prior art] The size of a conventional pad is 100 μm.
A probe card used for probe testing of semiconductor chips with a pitch of 100 μm at each corner will be explained with reference to FIG.

As shown in FIG. 4, a conventional probe card is made of a wire made of metal such as tungsten and having a diameter of 60 μm and a tip having a diameter of 30 μm, which is connected to the wiring layer 11a of the multilayer wiring board 11. A probe needle 12 is provided.

A probe test is performed by bringing the probe needles 12 of such a probe card into contact with the pads 6a of the semiconductor chip 6 formed on the semiconductor wafer placed on the surface of the wafer stage 15.

[0008]

[Problems to be Solved by the Invention] It is difficult to perform probe tests on semiconductor chips with extremely fine pad pitches using the conventional probe card equipped with the probe needles described above, which has reached its physical limit. The problem was that it was impossible to conduct the test.

In view of the above-mentioned circumstances, the present invention provides a probe card and its probe card equipped with electrodes other than probe needles made of wires, which enable probe testing of semiconductor chips equipped with extremely fine pads. The purpose is to provide a manufacturing method.

0010

[Means for Solving the Problems] A probe card of the present invention is a probe card equipped with a probe electrode that comes into contact with a pad of a semiconductor chip, and has a recess at a position corresponding to the position of the pad of the semiconductor chip to be measured. A multilayer wiring layer formed on the surface of this board, which is a stack of a wiring layer and an insulating layer, and a conductive layer formed in an opening formed at a position corresponding to the position of this pad in this multilayer wiring layer. and an electrode made of a transparent material.

The method of manufacturing a probe card of the present invention is the above-mentioned method of manufacturing a probe card, and includes the step of forming a recess on the surface of the substrate at a position corresponding to a position of a pad of a semiconductor chip to be tested. Then, an insulating layer is formed on the surface of this substrate, a conductive layer is formed on the surface of this insulating layer, and then this conductive layer is patterned to form a wiring layer,
A step of further forming an insulating layer on the surface of this wiring layer to form a multilayer wiring layer consisting of this insulating layer and a wiring layer, a step of forming an oxide film on the surface of this multilayer wiring layer, and a step of forming an oxide film on the surface of this multilayer wiring layer. and a step of forming openings at the positions of the recesses of this substrate in the multilayer wiring layer, a step of forming electrodes made of a conductive material in these openings, and a step of removing the oxide film and removing the surface of the multilayer wiring layer. and a step of causing the electrode to protrude.

0012

[Operation] That is, in the present invention, recesses are formed on the surface of the substrate at positions corresponding to the pad positions of the semiconductor chip to be tested, and wiring layers formed by patterning and insulating layers are alternately laminated. A multilayer wiring layer is formed on the surface of this substrate, an oxide film is formed on the surface of this multilayer wiring layer, an opening is formed in the oxide film and the multilayer wiring layer at the position of the recess of this substrate, and a conductive layer is formed in this opening. By forming electrodes made of a transparent material and removing the oxide film to make these electrodes protrude from the surface of the multilayer wiring layer, it is possible to perform probe tests on semiconductor chips whose pitch has become extremely small due to miniaturization. It becomes possible.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A probe card according to an embodiment of the present invention will be described below with reference to FIG. 1, and a method for manufacturing a probe card having three wiring layers according to an embodiment of the present invention will be explained in detail with reference to FIG.

FIG. 1 is a side sectional view showing an embodiment of a probe card according to the present invention. As shown in the figure, a recess 1a is provided in the substrate 1 at a position corresponding to the position of the pad 6a of the semiconductor chip 6 to be measured.

Three wiring layers 3a are formed on the surface of the substrate 1.
A multilayer wiring layer 3 is formed by laminating four insulating layers 3b, and an opening 3c formed in the multilayer wiring layer 3 at a position corresponding to the position of this pad 6a is filled with a conductive material made of a conductive material. An electrode 2 is formed.

In order to perform a probe test on the semiconductor chip 6 using such a probe card, the semiconductor chip 6 formed on the semiconductor wafer placed on the surface of the wafer stage 5 is
A probe test is performed by bringing this electrode 2 into contact with the pad 6a.

FIG. 2 is a side sectional view showing a method for manufacturing a probe card according to an embodiment of the present invention in the order of steps. First, as shown in FIG. 2(a), a recess 1a with a diameter of 15 μm and a depth of 100 μm is formed using photolithography at a position corresponding to the pad position of the semiconductor chip to be measured on a substrate 1 made of silicon with a thickness of about 500 μm. are formed at a pitch of 60 μm.

Next, as shown in FIG. 2(b), the film thickness
Insulating layer 3b1 made of polysilicon with a thickness of 1,000 μm
is formed on the surface of the substrate 1 by the CVD method, a metal layer made of aluminum with a film thickness of 50 μm is formed on this surface, and this metal layer is patterned by photolithography technology to form a wiring layer 3a1.
An insulating layer 3b2 is formed on the surface of the insulating layer 3b2.

Next, a wiring layer 3a2 is formed on the surface of this insulating layer 3b2 by photolithography, and an insulating layer 3b3 is formed on the surface of this wiring layer 3a2. Furthermore, a wiring layer 3a3 is formed on the surface of this insulating layer 3b3 by photolithography, and an insulating layer 3b4 is formed on the surface of this wiring layer 3a3, thereby forming a multilayer wiring layer 3.

When electrically connecting this wiring layer 3a3 to the electrode 2 formed in the next step shown in FIG. Pattern it so that it sticks out.

Next, as shown in FIG. 2(c), a film with a thickness of 1,000 μm is formed on the surface of this multilayer wiring layer 3 by CVD.
oxide film 4 is formed. Then, as shown in FIG. 3(a), the recess 1 of the substrate 1 is formed using photolithography technology.
Opening 4a with a diameter of 20 μm at a pitch of 60 μm at position a
and 3c.

As shown in FIG. 3(b), a conductive rubber containing conductive particles such as silver in silicone is introduced into the opening 3c, degassed, and cooled. Electrode 2 is formed.

Finally, this oxide film 4 is removed using hydrofluoric acid, and the electrode 2 is made to protrude from the multilayer wiring layer 3, as shown in FIG.

[0024]

Effects of the Invention As is clear from the above description, according to the present invention, the electrodes that come into contact with the pads of the semiconductor chip are manufactured using photolithography technology. It is possible to provide a probe card and a method for manufacturing the same, which has the advantage that it is possible to perform a probe card, and can be expected to have significant economical and reliability improvement effects.

[Brief explanation of the drawing]

FIG. 1 is a side sectional view showing a probe card according to an embodiment of the present invention;

FIG. 2 is a side cross-sectional view (1) showing a method for manufacturing a probe card according to an embodiment of the present invention in the order of steps;

[Figure 3]
A side sectional view (2) showing a method for manufacturing a probe card according to an embodiment of the present invention in the order of steps;

[Figure 4] Side sectional view showing a conventional probe card,

[Explanation of symbols]

1 is a substrate, 1a is a recess, 2 is an electrode, 3 is a multilayer wiring layer, 3a1, 3a2, 3a3 are wiring layers, 3b1, 3b2, 3b3, 3b4 are insulating layers, 3c is an opening, 4 is an oxide film, 4a is an opening, 5 is a wafer stage, 6 is a semiconductor chip, 6a is a pad,

Claims (2)

[Claims] [Claim 1] A pad (6a) of a semiconductor chip (6)
); a substrate (1) having a recess (1a) at a position corresponding to the position of a pad (6a) of a semiconductor chip (6) to be measured; formed on the surface of the substrate (1);
A multilayer wiring layer (3) in which a wiring layer (3a) and an insulating layer (3b) are laminated, and the pad (6) of the multilayer wiring layer (3).
A probe card comprising: an electrode (2) made of a conductive material formed in an opening (3c) formed at a position corresponding to position a). 2. The method for manufacturing a probe card according to claim 1, wherein a probe card is provided on the surface of the substrate (1) at a position corresponding to a position of a pad (6a) of the semiconductor chip (6) to be tested. forming a recess (1a) and forming an insulating layer (3b1) on the surface of the substrate (1);
After forming a conductive layer on the surface of the insulating layer (3b1), patterning the conductive layer to form a wiring layer (3a1), and further forming an insulating layer (3b2) on the surface of the wiring layer (3a1).
to form a multilayer wiring layer consisting of an insulating layer and a wiring layer (
3) forming an oxide film (4) on the surface of the multilayer wiring layer (3);
and a step of forming openings (4a) and (3c) at the positions of the recesses (1a) of the substrate (1) of the multilayer wiring layer (3), and forming a conductive material in the openings (4a) and (3c). A step of forming an electrode (2) made of the material, and a step of forming the oxide film (
4) A method for manufacturing a probe card, comprising the steps of: removing the multilayer wiring layer (3) and causing the electrode (2) to protrude from the surface of the multilayer wiring layer (3).