KR100595373B1 - Bridge-type probe card and method for manufacturing the same using silicon micromachining technology - Google Patents

Abstract

The present invention forms through holes at both edges of a silicon substrate, such as a silicon on insulator (SOI) substrate, and fills a conductive layer in the through holes, and a spring portion is formed by a photolithography process at the center of the silicon layer of the SOI substrate. And a tip end portion, and a metal line electrically connected to the conductive layer of the through hole at the spring portion and the tip end portion. Thereafter, the conductive layer in the through hole is bonded to the metal wiring of the printed circuit board. In particular, by forming the structure of the spring portion in the form of a bridge (bridge) so that probing can be made stably, by forming two tip ends of the spring portion it is possible to probe two electrically isolated pads. .

Therefore, the present invention forms a probe tip on the silicon substrate using a microfabrication technique, so signal separation between the tips is easy, and the tip has good mechanical properties. In addition, since the pitch between the tips can be reduced, fine pitch semiconductor devices can be tested. Moreover, the flatness uniformity of the tip can be improved.

Description

Bridge-type probe card and its manufacturing method {BRIDGE-TYPE PROBE CARD AND METHOD FOR MANUFACTURING THE SAME USING SILICON MICROMACHINING TECHNOLOGY}

1 is a cross-sectional view of a probe card using a probe needle of a cantilever type probe needle according to the prior art.

2 is a schematic cross-sectional view showing a probe card using a probe tip of a silicon / metal thin film according to the prior art.

3 is a cross-sectional view of a probe card using a probe tip of a solder ball according to the prior art.

4 is a cross-sectional view of a probe card using a probe tip of a metal line according to the prior art.

5 is a cross-sectional view showing a probe card according to the present invention.

6 is a cross-sectional view showing a modification of the probe card according to the present invention.

7 is a sectional view showing still another modified example of the probe card according to the present invention;

8A to 8H are cross-sectional process diagrams illustrating a method of manufacturing the probe card of FIG. 5.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe card for inspecting electrical characteristics of a semiconductor integrated circuit device. More particularly, a probe tip is formed on a silicon substrate by using a microfabrication technique to shorten the pitch of the probe tip and flatten it. The present invention also relates to a bridge-type probe card and a method of manufacturing the same to improve uniformity and improve electrical and mechanical properties.

In general, in the process of manufacturing a semiconductor integrated circuit device such as a memory device, a non-memory device, or a logic device, each chip is manufactured on a wafer, and then each chip is cut before the chips of the wafer are cut into each chip. Wafer tests are performed to determine if they are good or bad. This wafer test is performed with the probe card connected to the probe device and the probe needle of the probe card contacting a pad of the semiconductor chip. After contacting the probe needle with the semiconductor chip, a certain pressure is applied between the probe needle and the pad. This causes the probe needle to slide the surface of the pad to remove the aluminum oxide film on the surface. Thus, the aluminum under the aluminum oxide film and the probe needle are electrically connected.

One example of a conventional probe card using such probe needles is described in US Pat. No. 6,087,840. In the conventional probe card, as illustrated in FIG. 1, the probe needle 5 is arranged such that the tungsten probe needle 5 is radially disposed at the opening 3 of the single-layer printed circuit board 1. It is provided in the bottom surface of the said board | substrate 1. In addition, a contact portion for connecting a connector (not shown) provided at the end of the printed circuit board 1 is connected to the base portion of the probe needle 5 via interconnection wiring. The probe card of FIG. 1 can measure 32 pads simultaneously using the probe needle 5. However, since the probe needle 5 is installed on the printed circuit board 1 by manual labor, the pitch of the pad of the semiconductor chip cannot be reduced to 50 μm or less. Moreover, since the chips of the wafer cannot be tested all at once and must be divided and tested several times, the test time and cost per wafer are high.

As another example of a conventional probe card, a probe card in the form of a membrane is described in US Pat. No. 6,072,321. In the probe card, as illustrated in FIG. 2, the conductive layer 17 is stacked on the contact portion 13 of the silicon substrate 11 via the insulating layer 15, and the conductive layer of the contact portion 13 is formed. A conductor 19 for conducting electricity to 17 is formed on a part of the front surface of the silicon substrate 11 outside the contact portion 13. In addition, an etch groove 16 is formed in a portion of the rear surface of the silicon substrate 11 positioned below the contact portion 13 to form the flexible membrane portion 14. At the same time, passages 18 for conduits (not shown) are formed. Since the probe card of FIG. 2 uses the silicon 11 / conductive layer 17 of the contact portion 13 as a probe tip, there is no problem in mechanical properties. However, when testing a chip of a wafer, there is a disadvantage in that a fluid must be flowed to the back side of the membrane portion 14 in order to easily contact the probe tip and the pad of the chip.

Another example of a conventional probe card is described in US Pat. No. 6,114,864. In the probe card, as shown in FIG. 3, a recess 22 is formed in a bottom surface of the substrate 21, and the substrate 21 is formed so that the insulating resin film 23 extends below the recess 22. It extends to the bottom of the bottom). The probe pattern 25 extends on the bottom of the insulating resin film 23. Solder balls 27 are formed in the upper portion of the probe pattern 25. An interconnect pattern 19 is in contact with the probe pattern 25 end and is formed on the top surface of the substrate 21.

However, the probe card of FIG. 3 has a disadvantage in that the final tip of the probe pattern 25 is formed of solder balls 27 and thus exhibits an external mechanical shock or temperature sensitive reaction.

Another example of a conventional probe card is described in US Pat. No. 6,059,982. In the probe tip of the probe card, as illustrated in FIG. 4, a conductive layer 41 is formed by patterning a metal layer such as tungsten, copper, aluminum, and gold stacked on the insulating layer 31, and the conductive line 41 is formed. The tip portion 42 of the substrate includes a probe tip point 43, and a stud 45 on the end 44 of the conductive line 41 has a transition metal layer in the via hole 48 of the silicon substrate 47. 49, the solder balls 51 are electrically contacted with each other. However, since the probe card of FIG. 4 uses the tip structure of the conductive line instead of the tip of the metal needle type, there is a disadvantage in that the mechanical properties are not good.

Conventional probe cards having such problems are difficult to separate signals between probe tips, have poor mechanical properties, difficult to shorten the pitch of pads of semiconductor devices to 50 μm or less, and have flatness between probe tips within several μm. Difficult to maintain As a result, the conventional probe card is impossible to test more than 32 parallel, and also difficult to test at the wafer level, which requires a lot of test time and cost.

Accordingly, an object of the present invention is to probe a semiconductor device having a fine pad pitch.

Another object of the invention is to improve the mechanical and electrical properties of the probe tip.

Another object of the present invention is to improve the flatness of the probe tip.

Another object of the present invention is to enable probing at the wafer level.

Another object of the present invention is to reduce the cost and time required for probing.

Bridge form probe card according to the present invention for achieving the above object, the first silicon layer made of a silicon material spaced apart on each side; A spring portion made of the same material as the material of the first silicon layer, integrally connected between the first silicon layers on both sides, and having a predetermined elasticity; A tip tip portion formed of the same material as the spring portion and integrally connected to a predetermined region of the spring portion to protrude downward; Insulating films formed on the first silicon layers on both sides; Second silicon layers respectively formed on the insulating films on both sides; A conductive layer formed in a through hole vertically penetrating the first and second silicon layers and a portion of the insulating layer; A metal wiring formed in the spring portion and the tip end portion to reduce resistance of the spring portion and the tip end portion, and electrically connected to a conductive layer in the through hole of the first silicon layer; And a printed circuit board disposed on the second silicon layer so as to face the spring part and electrically connected to a conductive layer in a through hole of the second silicon layer.

Preferably, one tip end portion may be formed in the spring portion. In addition, two tip ends are formed in the spring part, and each of the tip ends may be electrically isolated.

Preferably, the conductive layer may be composed of a copper layer.

Preferably, the metal wiring may be composed of a silicide layer.

Preferably, the tip end portion may be formed in a triangular shape in cross section.

In addition, a bridge-type probe card manufacturing method according to the present invention for achieving the above object is prepared a semiconductor substrate having a first silicon layer and a second silicon layer and an insulating film disposed between the first and second silicon layers. Doing; Forming a through hole vertically penetrating a portion of both edge portions of the first silicon layer, the insulating layer, and the second silicon layer; Forming a conductive layer only in the through hole; Etching a central portion of the second silicon layer and the insulating layer by using a photolithography process and forming a first silicon layer of the central portion in a shape of a spring portion and a tip end portion; Forming metal wires on the springs and the tip ends to electrically reduce the resistance of the springs and the tip ends, and electrically connecting the metal wires to the conductive layers in the through holes of the first silicon layer; And arranging a printed circuit board on the second silicon layer so as to face the spring part, and electrically connecting the printed circuit board to a conductive layer in a through hole of the second silicon layer.
The spring part is made of the same material as the material of the first silicon layer, and has a bridge shape having a predetermined elasticity integrally connected between the first silicon layers on both sides, and the tip end part is made of the same material as the spring part. It is made, it is characterized in that the tip is protruded downward integrally connected to a predetermined region of the spring portion.

Preferably, the forming of the conductive layer comprises: forming an insulating film on an inner wall of the through hole; Filling the conductive layer in the through hole; And planarizing the conductive layer by a chemical mechanical polishing process, leaving the conductive layer only in the through hole.

Preferably, filling the conductive layer comprises: forming a seed layer on the insulating film of the through hole; And filling the conductive layer in the through hole by forming the conductive layer on the seed layer. In addition, the seed layer is preferably formed of one of titanium and gold, chromium and gold and tungsten by chemical vapor deposition process.

Preferably, the filling of the conductive layer may be performed by stacking one of copper and nickel using electroless plating.

Preferably, the filling of the conductive layer may include stacking a polycrystalline silicon layer and a tungsten layer by chemical vapor deposition on the polycrystalline silicon layer.

Preferably, the filling of the conductive layer may include laminating a polycrystalline silicon layer, laminating a tungsten layer by a chemical vapor deposition process on the polycrystalline silicon layer, and laminating a gold layer on the tungsten layer.

Preferably, the metal wiring of the spring portion and the tip end portion can be formed of a silicide layer.

Hereinafter, a bridge type probe card and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a cross-sectional view showing a bridge type probe card according to the present invention. Referring to FIG. 5, the probe card of the present invention includes a probe tip 100 and a printed circuit board 200.

 In the probe tip 100, the insulating film 112 and the second silicon layer 113 having the same pattern are disposed in the order from the lower side to the upper edge of the left and right sides of the first silicon layer 111 of the semiconductor substrate. The printed circuit board 200 is disposed to correspond to the corresponding metal wiring 201. In addition, a plurality of tip tips 119 integrally protrude downward from the central portion of the lower surface of the first silicon layer 111, for example, a pad of a corresponding semiconductor device of the wafer 300 to be tested, for example. Disposed to correspond to the two electrically isolated pads 301. The first silicon layer 111 preferably has a relatively thin thickness to serve as a spring portion 117 of a bridge shape having elasticity. Here, the semiconductor substrate is one of a single crystal silicon substrate, an SOI substrate, an SOG substrate, and other substrates fabricated using a direct or indirect bonding process. It is preferable that the tip end portion 119 has a predetermined shape, for example, a triangular shape in cross section, in order to reduce contact resistance with the pad 301.

In addition, a through hole 123 vertically penetrating the center portion of the second silicon layer 113 and the insulating layer 112 and the first silicon layer 111 below is formed. An insulating layer 125 such as a thermal oxide film, a tetraethylorthosilane (TEOS) chemical vapor deposition oxide film, and a silicon nitride film is formed on an inner wall of the through hole 123. The through hole 123 is filled with a conductive layer 129 such as copper or nickel and is planarized to the first and second silicon layers 111 and 113. A metal wire 141 is formed on the second silicon layer 113 to make an electrical connection with the conductive layer 129, and silicides are formed on the surfaces of the spring part 117 and the tip end part 119 to reduce resistance. The metal wiring 143 is formed of a material. Of course, it is obvious that each of the tip tips 119 should be electrically isolated. The metal wires 141 and 143 may be made of one of gold, nickel, and tungsten.

In addition, the metal wiring 141 is electrically connected to the metal wiring 201 of the printed circuit board 200 by, for example, solder 210.

Of course, as shown in FIG. 6, the probe tip 101 may be formed in the same manner as the structure of FIG. 5 except that only one tip tip portion 119 is provided. For convenience of description, detailed description thereof will be omitted in order to avoid duplication of description.

Referring to FIG. 7, the probe card of the present invention includes a probe tip 400 and a printed circuit board 200. The probe tip 400 has a recessed portion formed at the center of the upper surface of the main body 410, and one tip end portion 411 protrudes downward integrally at the center of the lower surface of the main body 410. It is disposed to correspond to the pad 311 of the semiconductor device. The body 410 is a metal fabricated structure or a structure manufactured by plating.

In the case of the probe card configured as described above, since the silicon substrate is processed by a microfabrication technique to form the probe tip, signal separation between the tips is easy and the mechanical properties of the tip are good. In addition, since the pitch between the tips can be reduced, fine pitch semiconductor devices can be tested. Furthermore, the flatness of the tip can be improved to such an extent that it can be maintained within several micrometers.

Meanwhile, when a signal applied from a test apparatus (not shown) is input to a corresponding semiconductor element of the wafer to be tested by using the probe card of the present invention, and a result signal output from the semiconductor element is transferred to the test apparatus, Since a force of about 100 mN acts on the test device and the wafer, it is preferable that the probe tip of the present invention can withstand the force of about 100 mN. In addition, it is desirable to have a reliability capable of probing at least one million times in contact with the wafer. In addition, the contact resistance of the probe tip is preferably 1 kΩ or less.

Hereinafter, a method for manufacturing a bridge type probe card according to the present invention will be described with reference to FIGS. 8A to 8H.

Referring to FIG. 8A, first, a semiconductor substrate, for example, an SOI substrate 110, for forming a probe tip is prepared. The SOI substrate 110 has a structure in which an insulating film 112 such as a thermal oxide film is interposed between the first silicon layer 111 and the second silicon layer 113. Of course, the semiconductor substrate may be a single crystal silicon substrate, an SOG substrate, or a substrate manufactured using a direct or indirect bonding process instead of the SOI substrate 110.

Referring to FIG. 8B, an insulating film 121 is formed on both surfaces of the SOI substrate 110. In this case, the insulating layer 121 may be formed by an oxidation process such as exposing the SOI substrate 110 to an oxidizing atmosphere of a reaction chamber (not shown). In addition, an oxide film stacked on the SOI substrate 110 using a plasma chemical vapor deposition process may be used as the insulating film 121. Here, tetraethylorthosilane (TEOS) may be injected into the reaction chamber (not shown) to grow the oxide film at a temperature of about 400 ° C. In addition, a nitride film may be used as the insulating film 121.

Subsequently, a through hole having a diameter of 100 μm or less vertically penetrating the corresponding region of the SOI substrate 110 by a photolithography process for electrical connection with the metal wiring 201 of the printed circuit board 200 of FIG. 5. 123). In this case, it is preferable to use a dry etching process having anisotropic etching characteristics as an etching process.

Thereafter, similarly to the formation of the insulating film 121, the insulating film 125 is formed on the inner wall of the through hole 123.

Referring to FIG. 8D, a seed layer 127 is then formed on the insulating film 121 on both surfaces of the SOI substrate 110. The seed layer 127 may be formed of one of titanium (Ti) / gold (Au), chromium (Cr) / gold (Au), and tungsten (W) by a chemical vapor deposition process. In addition, the seed layer 127 may be formed of a copper layer by a chemical vapor deposition process.

Referring to FIG. 8E, a conductive layer, for example, a copper layer 129, is formed in the through hole 123 using an electroplating method. In this case, it is preferable that the copper layer 129 completely fills the through hole 123.

On the other hand, when the electroless plating method is used instead of the electroplating method, the through hole 123 is formed by directly forming one of a copper layer and a nickel (Ni) layer on the insulating layer 121 without forming the seed layer 127. ) May be filled with either the copper layer or the nickel (Ni) layer. The tungsten layer may be filled in the through hole 123 by laminating a polycrystalline silicon layer on the insulating layer 121 without forming the seed layer 127 and then laminating a tungsten layer by a chemical vapor deposition process. In addition, it is possible to further stack gold (Au).

Then, the copper layer 129 of the through hole 123 is planarized on both surfaces of the SOI substrate 110 by polishing both surfaces of the SOI substrate 110 using a chemical mechanical polishing process. . In this case, the copper layer 129 remains only in the through hole 123 and all of the copper layer 129 outside the through hole 123 is removed.

Referring to FIG. 8F, an insulating film as an etch mask of the first and second silicon layers 111 and 113 may be formed on both planarized surfaces of the SOI substrate 110 by using the above-described insulating film forming method. 131).

Referring to FIG. 8G, two electrically isolated pads of a portion of the first silicon layer 111, for example, the corresponding semiconductor device of the wafer 300 of FIG. 5 to be tested, are then subjected to a photolithography process. Patterns of the insulating film 131 are formed on portions for the two tip ends 119 corresponding to 301, and a portion of the second silicon layer 113, for example, a bridge-shaped spring portion ( The insulating film 131 on the portion for 117 is removed and a pattern of the insulating film 131 is formed on the portion outside thereof.

Then, the first and second silicon layers 111 and 113 are etched by a dry etching process or a wet etching process using, for example, TMAH or KOH solution, using the pattern of the insulating layer 131 as an etching mask. . Thus, the bridge spring portion 117 and the tip end portion 119 is formed. Here, the spring portion 117 preferably has a predetermined thickness so as to maintain elasticity suitable for performing the role as the spring portion.

Referring to FIG. 8H, metal wires 143 made of a material such as gold, nickel, and tungsten are formed on the spring part 117 and the tip end part 119, and the copper layer 129 in the through hole is formed. Connect with Of course, it is obvious that each of the tip tips 119 should be electrically isolated. Here, the metal wire 143 is preferably made of a silicide material to reduce the resistance of the tip.

 In addition, a metal wiring 141 is formed on the copper layer 129 to electrically connect the metal wiring 201 of the printed circuit board 200 of FIG. 5. Here, the metal wire 141 may be made of a material such as gold, nickel and tungsten.

Then, as shown in FIG. 5, the metal wiring 141 is electrically connected to the metal wiring 201 of the printed circuit board 200 by, for example, solder 210 or the like. Thereafter, although not shown in the drawings, the probe tip is surrounded by a resin such as epoxy to protect from external environment or mechanical shock.

Meanwhile, in the present invention, the structure of FIG. 6 having one tip end portion 119 and the same remaining portion may be manufactured by the same process instead of the structure of FIG. 5 having two tip ends 119. For convenience of description, description thereof will be omitted in order to avoid duplication of description.

Meanwhile, as shown in FIG. 7, the present invention may be manufactured by processing or plating a structure of the probe tip 400 with metal. The probe tip 400 has a recessed portion formed at the center of the upper surface of the main body 410, and one tip end portion 411 protrudes downward integrally at the center of the lower surface of the main body 410. It is comprised so that it may correspond to the pad 311 of the said semiconductor element.

Therefore, the present invention processes the silicon substrate, such as the SOI substrate, by a microfabrication technique to form a probe tip, so that signal separation between the tips is easy and the mechanical properties of the tip are good. In addition, since the pitch between the tips can be reduced, fine pitch semiconductor devices can be tested. Furthermore, the flatness of the tip can be improved to such an extent that it can be maintained within several micrometers. As a result, the present invention enables more than 32 parallel tests and wafer-level tests. This saves time and costs for testing.

As described above, the present invention forms through-holes on both side edges of a silicon substrate such as an SOI substrate, fills a conductive layer in the through-holes, and springs by a photolithography process in the center of the silicon layer of the SOI substrate. A portion and a tip tip portion are formed, and a metal line is formed at the spring portion and the tip tip portion to be electrically connected to the conductive layer of the through hole. Thereafter, the conductive layer in the through hole is bonded to the metal wiring of the printed circuit board.

Therefore, the present invention forms a probe tip on the silicon substrate using a microfabrication technique, so signal separation between the tips is easy, and the tip has good mechanical properties. In addition, since the pitch between the tips can be reduced, fine pitch semiconductor devices can be tested. Moreover, the flatness uniformity of the tip can be improved.

On the other hand, the present invention is not limited to the contents described in the drawings and the upper description, it is obvious to those skilled in the art that various forms of modifications are possible without departing from the spirit of the invention. .

Claims (14)

A first silicon layer made of a silicon material and spaced apart from each other on both sides; A bridge-shaped spring portion made of the same material as the material of the first silicon layer and having only two side portions connected between the first silicon layers on both sides thereof and having a predetermined elasticity; A tip tip portion formed of the same material as the spring portion and integrally connected to a predetermined region of the spring portion to protrude downward; Insulating films formed on the first silicon layers on both sides; Second silicon layers respectively formed on the insulating films on both sides; A conductive layer formed in a through hole vertically penetrating the first and second silicon layers and a portion of the insulating layer; A metal wiring formed in the spring portion and the tip end portion to reduce resistance of the spring portion and the tip end portion, and electrically connected to a conductive layer in the through hole of the first silicon layer; And And a printed circuit board disposed on the second silicon layer so as to face the spring part and electrically connected to a conductive layer in a through hole of the second silicon layer. The bridge-type probe card of claim 1, wherein one tip end portion is formed at the spring portion. The bridge-type probe card according to claim 1, wherein two tip ends are formed in the spring part, and each of the tip ends is electrically isolated. The bridge-type probe card according to claim 1, wherein the conductive layer is a copper layer. The bridge-type probe card according to claim 1, wherein the metal wiring is a silicide layer. The bridge-type probe card according to claim 1, wherein the tip end portion has a triangular shape in cross section. Preparing a semiconductor substrate having an insulating film disposed between the first and second silicon layers and the first and second silicon layers; Forming a through hole vertically penetrating a portion of both edge portions of the first silicon layer, the insulating layer, and the second silicon layer; Forming a conductive layer only in the through hole; Etching a central portion of the second silicon layer and the insulating layer by using a photolithography process and forming a first silicon layer of the central portion in a shape of a spring portion and a tip end portion; Forming metal wires on the springs and the tip ends to electrically reduce the resistance of the springs and the tip ends, and electrically connecting the metal wires to the conductive layers in the through holes of the first silicon layer; And Arranging a printed circuit board on the second silicon layer so as to face the spring part, and electrically connecting the printed circuit board to a conductive layer in a through hole of the second silicon layer; The spring part is made of the same material as the material of the first silicon layer, and is a bridge shape having a predetermined elasticity in which both side portions are connected between the first silicon layers on both sides, The tip tip portion is made of the same material as the spring portion, bridge type probe card manufacturing method characterized in that the tip tip portion protruded downward integrally connected to a predetermined region of the spring portion. The method of claim 7, wherein forming the conductive layer Forming an insulating film on an inner wall of the through hole; Filling the conductive layer in the through hole; And And planarizing the conductive layer by a chemical mechanical polishing process to leave the conductive layer only in the through-holes. The method of claim 8, wherein the filling of the conductive layer is performed. Forming a seed layer on the insulating film of the through hole; And Forming the conductive layer on the seed layer to fill the through hole with the conductive layer. 10. The method of claim 9, wherein the seed layer is formed of one of titanium, gold, chromium, gold, and tungsten by a chemical vapor deposition process. The method of claim 8, wherein the filling of the conductive layer comprises stacking one of copper and nickel using electroless plating. The method of claim 8, wherein the filling of the conductive layer comprises stacking a polycrystalline silicon layer and stacking a tungsten layer on the polycrystalline silicon layer by a chemical vapor deposition process. The method of claim 12, wherein the filling of the conductive layer comprises laminating a polycrystalline silicon layer, laminating a tungsten layer by a chemical vapor deposition process on the polycrystalline silicon layer, and laminating a gold layer on the tungsten layer. Method of manufacturing a bridge type probe card. 8. The method of claim 7, wherein the metal wiring of the spring portion and the tip end portion is formed of a silicide layer.

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