JPH043486A - Dielectric substrate for semiconductor device - Google Patents

Abstract

PURPOSE:To avoid the lowering of the thermal resistance of a semiconductor element by bubbles and thermal runaway by forming a groove for letting bubbles escape to the rear of a dielectric substrate and fixing the rear to a heat sink in the dielectric substrate for a semiconductor device mounted to the heat sink CONSTITUTION:Circuit elements such as semiconductor elements 10 are loaded on surface metallized patterns 2, and connected electrically to rear metallized layers 4 through through-holes 3. The rear metallized layers 4 are separated into four strip-shaped small regions by three parallel grooves 7 in the longitudinal direction. When the substrate is fixed to a heat sink by using solder. etc., bubbles intending to enter are let to escape by the sections of the grooves 7, thus resulting in no remaining of bubbles. When the rear is separated into four small regions by grooves 8 formed in both vertical direction and lateral direction and metallized layers 5 are formed on the whole small region surfaces, the grooves are complicate, but a bubble-mixing preventive effect is improved only by the complicated section.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a dielectric substrate for semiconductor devices, and particularly to a dielectric substrate on which semiconductor elements such as ICs and transistors are mounted and mounted on a heat sink.

[Conventional technology]

Conventionally, this type of dielectric substrate for semiconductor devices is shown in FIG.
) and (b). That is, the front and back surfaces of the dielectric substrate body 1 made of ceramic or the like are metalized with gold, silver, palladium, silver-platinum, etc., and in particular, the back surface shown in FIG. 3(a) is used as a ground plane. The entire surface is metallized 6, and through the through hole 3, as shown in Fig. 3 (
It is connected to the ground pattern on the surface shown in b). Note that on the front side, circuit elements such as semiconductor elements, capacitors, resistors, and inductors are mounted, and a metallized pattern 2 for configuring circuits such as an amplifier circuit and a switching circuit is formed, and the metallized pattern 6 on the back side is formed using solder, It is fixed to the heat sink using a brazing material such as gold or soot. Thus, the heat generated when the semiconductor element 10 mounted on the surface is operated is radiated to the heat sink through the substrate.

[Problem to be solved by the invention]

Since the back surface of this conventional dielectric substrate is entirely metallized, air bubbles enter between the substrate and the heat sink when the substrate is fixed to the heat sink. If these bubbles are located directly under the semiconductor element mounting area, the heat generated when the semiconductor element is operated will not be sufficiently transferred to the heat sink, leading to an increase in thermal resistance, which may lead to thermal runaway of the semiconductor element. was there.

[Means to solve the problem]

In order to solve the above problems, the dielectric substrate for semiconductor devices of the present invention has a metallized layer on the back surface of the substrate for fixing to a heat sink, which is divided into a plurality of small areas by grooves in one direction or in two directions, and is divided into a plurality of small areas. This prevents air bubbles from entering when forming and fixing to the heat sink.

〔Example〕

Next, the present invention will be explained by examples.

FIGS. 1(a) and 1(b) are plan views of the back and front surfaces of an embodiment of the present invention, respectively. In FIG. 1(b), a circuit element such as a semiconductor element 10 is mounted on the front metallized pattern 2, and is electrically connected to the back metallized layer 4 through a through hole 3. The back metallized layer 4 in FIG. 1(a) is separated into four small strip-shaped regions by three parallel grooves 7 in the vertical direction. When this substrate is fixed to a heat dissipation plate using solder or the like, any air bubbles that try to enter are allowed to escape through the grooves 7, so that no air bubbles remain.

Note that the groove 7 is designed so as not to be placed below the mounting portion of the semiconductor element ICI.

FIG. 2 is a plan view showing the back side of a second embodiment of the present invention. In FIG. 2, grooves 8 are provided in both vertical and horizontal directions on the back surface, and the grooves 8 separate the semiconductor device into four small regions, and a metallized layer 5 is formed over the surface of each of the small regions. Although the grooves in this example are more complex than those in the example shown in FIG. 1, the effect of preventing air bubbles from entering is correspondingly better.

〔Effect of the invention〕

As explained above, in the present invention, a groove for air bubble release is formed on the back surface of the dielectric substrate. degree) can be eliminated,
Therefore, it is possible to avoid deterioration of the thermal resistance of the semiconductor element and thermal runaway due to air bubbles.

[Brief explanation of drawings]

FIG. 1 shows one embodiment of the present invention, FIG. 1(a) is a plan view showing the back surface thereof, FIG. 1(b) is a plan view showing the front surface, and FIG. 2 is a plan view showing the back surface of another embodiment of the present invention. Figure 3(a). (b) is a plan view showing the back surface and front surface of a conventional dielectric substrate, respectively. 1... Board body, 2... Surface metallized pattern, 3... Through hole, 4.5.6
...Back surface metallized layer, 7, 8... Groove, 10... Semiconductor element. Agent: Patent Attorney Shinkyo Uchihara 3 times

Claims (1)

[Claims] The front side has a metallized pattern for mounting semiconductor elements such as transistors and ICs, passive circuit elements such as resistors and capacitors, etc., and the back side has a metallized layer connected to the ground pattern on the front side through through holes. A dielectric substrate for a semiconductor device having a dielectric substrate for a semiconductor device, wherein the metallized layer on the back surface is formed entirely on each surface separated into a plurality of regions by grooves in one direction or two directions vertically and horizontally. body substrate.