JPH04348560A - Production of semiconductor device - Google Patents

Abstract

PURPOSE:To provide highly accurate resistance for a semiconductor device. CONSTITUTION:An oxide film 4, a p-type diffused layer 5 as a resistance layer and an Si3N4 film 6 are formed on a p-type Si substrate 1, then, an independent polysilicon film pattern 12 is formed on the top of a p-type diffused layer 5 simultaneously with the polysilicon film patterns on the electrodes. Even when an Al wiring is formed on the resistance layer, since the distance between the resistance layer and an Al film is long enough, the resistance change caused by the potential of the Al wiring is suppressed and a highly accurate device is provided.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device with high precision.

0002

2. Description of the Related Art In recent years, as the degree of integration of analog ICs has increased, resistors with even higher precision have been required. FIG. 2 is an example of a cross-sectional view of the manufacturing process of a diffused resistor in which the base diffusion layer of an npn bipolar transistor is used as a resistance layer, and a barrier metal is used for the electrode portion to improve precision.

First, an n+ buried layer 2 and an n- epitaxial layer 3 are formed on a p-type Si substrate 1 using a well-known technique. Next, an oxide film 4 of about 50 nm is formed, and a p-type diffusion layer 5 is formed by implanting B+ at 30 kev and 1.5E13 cm -2 using a resist as a mask, for example. Next, after depositing the Si3N4 film 6 to a thickness of about 50 nm, the oxide film 4 and the Si3N4 film 6 are dry-etched using, for example, a resist as a mask to form an opening window that will become an electrode portion. Next, a polysilicon film 7 is formed to a thickness of about 300 nm, and the polysilicon film 7 is dry-etched using, for example, a resist as a mask to form a polysilicon film pattern 7 that will become an electrode. Next, for example, using a resist as a mask, apply B+ to the polysilicon film pattern 7 at 40keV to 2E16cm.
After implantation under conditions of -2, a heat treatment is performed at 900° C. for 60 minutes in an N2 atmosphere to form a p++ type diffusion layer 8 which will become a contact diffusion region (FIG. 2(a)).

Next, after depositing the CVDSiO2 film 9,
For example, the CVDSiO2 film 9 is dry-etched using a resist as a mask to form an opening window on the upper surface of the polysilicon film pattern 7. Next, for example, the thickness is about 100 nm/
After forming a barrier metal 10 made of TiN/Ti with a thickness of 5 nm, an Al film 11 with a thickness of about 800 nm is formed by sputter deposition. Thereafter, for example, using a resist as a mask, the barrier metal 10 and the Al film 11 are dry-etched to form a desired Al film pattern 11, and the polysilicon film 7 and the Al film 11 are electrically connected to form the semiconductor device. is completed (Fig. 2(b)).

[0005]

[Problems to be Solved by the Invention] However, in such conventional semiconductor device manufacturing methods, Al
When the wiring passes through, the resistance value fluctuates due to the influence of the potential of the Al wiring because the insulating film (oxide film and Si3N4 film) between the resistance layer and the Al film is thin (hereinafter referred to as the Al bias effect). ). In particular, in the case of a pair of resistors, if the Al wiring runs over only one of the resistor layers, the variation in the resistance value of the pair increases, which poses a major problem in improving the precision of the device.

In view of the above problems, the present invention suppresses the Al bias effect without increasing the number of steps.
It is an object of the present invention to provide a method for manufacturing a semiconductor device that allows a highly accurate semiconductor device to be obtained.

[0007]

[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention includes a step of forming a diffusion layer of an opposite conductivity type on one main surface of a semiconductor substrate of one conductivity type, and a step of forming a diffusion layer of an opposite conductivity type on one main surface of a semiconductor substrate of one conductivity type. forming a first insulating film; selectively removing the first insulating film and forming a first opening window at a predetermined position on the diffusion layer; forming independent first and second semiconductor film patterns on the diffusion layer; forming a second insulating film on the semiconductor substrate; and selectively forming the second insulating film. remove,
The method comprises at least a step of forming a second opening window on the first semiconductor film pattern, and a step of forming a metal film and electrically connecting the first semiconductor film pattern and the metal film. This is a method for manufacturing a semiconductor device.

[0008]

[Function] With the above structure, the present invention forms a polysilicon film not only on the electrode portion but also on the resistance layer, thereby reducing the distance between the resistance layer and the Al film compared to the conventional example. The thickness of the polysilicon film can be increased, and Al
Fluctuations in resistance value due to bias effects can be suppressed.

[0009]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is an example of a cross-sectional view of a manufacturing process of a diffused resistor in which the base diffusion layer of an npn bipolar transistor is a resistance layer, showing an embodiment of the present invention.

First, an n+ buried layer 2 and an n- epilayer 3 are formed on a p-type Si substrate 1 using a well-known technique. Next, an oxide film 4 of about 50 nm is formed, and a p-type diffusion layer 5 is formed by, for example, implanting B+ at 30 keV and 1.5E13 cm-2 using a resist as a mask. Next, after depositing the Si3N4 film 6 to a thickness of about 50 nm, the oxide film 4 and the Si3N4 film 6 are dry-etched using, for example, a resist as a mask to form an opening window that will become an electrode portion.

Next, a polysilicon film is formed to a thickness of approximately 300 nm, and the polysilicon film is dry-etched using, for example, a resist as a mask to form a polysilicon film pattern 7 on the electrode portion.
A polysilicon film pattern 12 is formed on the p-type diffusion layer 5 other than the electrode portion. Next, apply 4 B+ to the polysilicon film pattern 7 using, for example, a resist as a mask.
After injection under the conditions of 2E16cm-2 at 0keV, 90
By performing heat treatment at 0°C for 60 minutes in N2 atmosphere,
A p++ type diffusion layer 8 which will become a contact diffusion region is formed (FIG. 1(a)).

Next, the CVDSiO2 film 9 is coated with a thickness of about 400 nm.
accumulate. In this case, if the distance between the polysilicon film pattern 7 and the polysilicon film pattern 12 is narrow, for example, about 0.
．． When the thickness is 8 μm or less, the deposited CVDSiO2 is removed between polysilicon film pattern 7 and polysilicon film pattern 12.
This can be filled with the film 9, thereby reducing the step difference caused by the polysilicon film pattern.

Next, the CVDSiO2 film 9 is dry-etched using, for example, a resist as a mask to form a contact window on the polysilicon film pattern 7. Next, for example, after forming a barrier metal 10 made of TiN/Ti with a thickness of about 100 nm/5 nm, an Al film 11 with a thickness of about 800 nm is formed by sputter deposition. Thereafter, the barrier metal 10 and the Al film 11 are dry-etched using, for example, a resist as a mask to form a desired Al film pattern 11, and the polysilicon film 7 and the Al film 11 are electrically connected to form this semiconductor device. Completed (Figure 1(b)).

As described above, this embodiment is an example of forming a diffused resistor using the base diffusion layer of an npn bipolar transistor as a resistance layer, and the polysilicon film pattern 12 is formed on the top of the p-type diffusion layer 5. Therefore, even if the Al wiring passes over the resistive layer, the distance between the resistive layer and the Al wiring is limited to the polysilicon film pattern 12 (approximately 300 nm).
Since the thickness of A is larger than that of the conventional example,
It is possible to suppress fluctuations in resistance value due to l bias effect. In particular, in the case of a pair of resistors, even if the Al wiring runs over only one of the resistor layers, variations in the resistance value of the pair can be suppressed, and high precision of the device can be achieved.

[0016] In the above embodiment, the case of a p-type diffused resistor has been explained, but it goes without saying that the present invention can be applied to other diffused resistors such as an n-type diffused resistor.

[0017]

As is clear from the above embodiments, according to the present invention, in order to form a thick polysilicon film pattern on the resistance layer, the connection between the resistance layer and the Al film is improved compared to the conventional example. Since the distance is increased, fluctuations in resistance value due to the Al bias effect can be suppressed. In particular, in the case of a pair of resistors, even if the Al wiring runs over only one resistor layer, variations in the resistance values of the pair can be suppressed, and a highly accurate device can be provided.

Furthermore, by reducing the distance between the polysilicon film deposited on the electrode part and the polysilicon film deposited on the resistive layer other than the electrode part, when a CVD insulating film is formed on the polysilicon film, Another major effect is that it is possible to eliminate the step difference around the electrode portion of the device and provide a device with a structure that also has flatness.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of the manufacturing process of a diffused resistor in one embodiment of the present invention.

FIG. 2 is a sectional view of a manufacturing process for explaining a conventional example.

[Explanation of symbols]

1 p-type Si substrate 2 n+ buried layer 3 n-epi layer 4 Oxide film 5 p-type diffusion layer 6　Si3N4 film 7 Polysilicon film (electrode part) 8 p++ type diffusion layer 9 CVDSiO2 film 10 Barrier metal 11 Al film

Claims (2)

[Claims] 1. A step of forming a diffusion layer of an opposite conductivity type on one main surface of a semiconductor substrate of one conductivity type, a step of forming a first insulating film on the surface of the semiconductor substrate, and a step of forming the first insulating film on the surface of the semiconductor substrate. selectively removing and forming a first opening window at a predetermined position on the diffusion layer, and forming independent first and second semiconductors on the first opening window and the upper part of the diffusion layer, respectively. forming a film pattern; forming a second insulating film on the semiconductor substrate; selectively removing the second insulating film and forming a second opening on the first semiconductor film pattern; A method for manufacturing a semiconductor device, comprising at least the steps of forming a window, forming a metal film, and electrically connecting the first semiconductor film pattern and the metal film. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor film is a polysilicon film.