JPH0434351A - Manufacture of response element - Google Patents
Manufacture of response elementInfo
- Publication number
- JPH0434351A JPH0434351A JP13978790A JP13978790A JPH0434351A JP H0434351 A JPH0434351 A JP H0434351A JP 13978790 A JP13978790 A JP 13978790A JP 13978790 A JP13978790 A JP 13978790A JP H0434351 A JPH0434351 A JP H0434351A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- upper electrode
- film
- sensitive film
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 108091027981 Response element Proteins 0.000 title abstract 2
- 238000000034 method Methods 0.000 claims abstract description 12
- 238000001020 plasma etching Methods 0.000 claims abstract description 7
- 230000015572 biosynthetic process Effects 0.000 claims abstract 2
- 239000000758 substrate Substances 0.000 claims description 15
- 238000000605 extraction Methods 0.000 claims description 7
- 238000001514 detection method Methods 0.000 abstract description 5
- 239000010408 film Substances 0.000 description 54
- 229920001721 polyimide Polymers 0.000 description 9
- 239000010931 gold Substances 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000012528 membrane Substances 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229920002678 cellulose Polymers 0.000 description 1
- 239000001913 cellulose Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
（産業上の利用分野）
本発明は、感応素子およびその製造方法に係り、特にエ
アコン等空調機の制御に際して用いられる湿度センサ等
の感応素子に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a sensing element and a method for manufacturing the same, and particularly to a sensing element such as a humidity sensor used in controlling an air conditioner such as an air conditioner.
（従来の技術）
湿度センサとしては、多種多様のものが提案されている
が、その代表的なものは、次に示すように、
１、多孔質セラミックへの水分の吸着による導電率の変
化を利用したもの。(Prior art) A wide variety of humidity sensors have been proposed, but the typical ones are as follows: What you used.
２、高分子への水分子の吸着による導電率または誘電率
の変化を利用したもの。2. Utilizing changes in conductivity or dielectric constant due to adsorption of water molecules to polymers.
３、電解質のイオン電導率の変化を利用したもの。3. Utilizing changes in the ionic conductivity of electrolytes.
４、熱伝導率の変化を利用したもの。4. Utilizing changes in thermal conductivity.
等である。etc.
このような湿度センサは、雰囲気中の湿度変化に対して
その電気的特性が変化するのを利用し、湿度を電気信号
として取り出すようにしたものである。Such a humidity sensor utilizes the fact that its electrical characteristics change in response to changes in humidity in the atmosphere, and extracts humidity as an electrical signal.
その−例として、第２図に示すように、ＦＥＴを構成す
るセンサ基板２１のゲート絶縁膜３６上に、下部電極２
２、湿度変化に対応して電気的特性が変化する感応膜２
３、上部電極２４を順次積層してなるものが提案されて
いる。ここで、３１はソース、３２はゲート、３３はド
レインを構成している。As an example, as shown in FIG. 2, a lower electrode 2
2. Sensitive membrane 2 whose electrical characteristics change in response to changes in humidity
3. A structure in which upper electrodes 24 are sequentially laminated has been proposed. Here, 31 constitutes a source, 32 constitutes a gate, and 33 constitutes a drain.
このセンサでは、外部回路との接続のために上部電極２
４はセンサ基板２１上まで伸長し、センサ基板２１上に
形成されたポンディングパッド２６に接続されている。In this sensor, the upper electrode 2 is used for connection with an external circuit.
4 extends above the sensor board 21 and is connected to a bonding pad 26 formed on the sensor board 21.
ところで、このようなセンサでは、感応膜２３は、上部
電極２４を通して雰囲気の湿度変化を感知するものであ
り、上部電極は、湿気を透過し易いように薄く形成され
ているが、感応膜は、十分な静電容量を得て湿度関知能
力を得るために数千オングストローム乃至数μｍ程度の
厚さを有している。このため、上部電極２４は、高い段
差を越えてポンディングパッド２６まで到達する必要が
ある。By the way, in such a sensor, the sensitive film 23 senses the humidity change in the atmosphere through the upper electrode 24, and the upper electrode is formed thin so as to easily transmit moisture. In order to obtain sufficient capacitance and humidity sensing ability, the thickness is approximately several thousand angstroms to several micrometers. Therefore, the upper electrode 24 needs to reach the bonding pad 26 over a high step.
従って、この上部電極は薄いと感応膜の端部でクラック
（段切れ）を生じ易く、この段切れによる接続不良が発
生しやすいという問題があった。Therefore, if the upper electrode is thin, cracks (step breaks) are likely to occur at the ends of the sensitive film, and connection failures due to the step breaks are likely to occur.
そこで、第３図に示すように、上部電極は十分に薄く形
成し、この上部電極上からセンサ基板１上に、蒸着法な
どによって十分に厚く形成された引き下ろし電極２５を
形成したものも提案されている。Therefore, as shown in FIG. 3, it has also been proposed that the upper electrode is formed sufficiently thin, and a sufficiently thick pull-down electrode 25 is formed from the upper electrode onto the sensor substrate 1 by vapor deposition or the like. ing.
この構造では、前述したような段切れは防止される。With this structure, the breakage as described above is prevented.
しかしながら、この感応膜は、熱により感湿特性に劣化
を生しる場合が多く、この引き下ろし電極２５は、感応
膜と同等かそれ以上の厚さを有するように形成しなけれ
ばならないため、長時間にわたる高温工程により、感応
膜の特性が劣化したり、また、引き下ろし電極が熱を通
さないことによる感度の低下、など特性に変動をきたす
ことがあった。However, the moisture sensitivity of this sensitive film often deteriorates due to heat, and the pull-down electrode 25 must be formed to have a thickness equal to or greater than that of the sensitive film, so it has to be long. The long-term high-temperature process sometimes causes changes in the characteristics, such as deterioration of the characteristics of the sensitive film or a decrease in sensitivity due to the pull-down electrode not allowing heat to pass through.
また、この他、第４図に示すように、センサ基板１上に
形成された２個の独立した下部電極２７゜２８上に感応
膜２９を形成し、この感応膜上に上部電極３０を形成し
た構造も提案されている。In addition, as shown in FIG. 4, a sensitive film 29 is formed on two independent lower electrodes 27 and 28 formed on the sensor substrate 1, and an upper electrode 30 is formed on this sensitive film. A similar structure has also been proposed.
この構造では、上下電極間（下部電極２７と上部電極３
０との間、下部電極２８と上部電極３０との間）で構成
される２個のコンデンサの直列接続体として容量変化を
取り出すようになっており、引き下ろし電極を形成する
必要はないが、第２図および第３図に示した構造と比較
すると、同一面積の感応膜に対して検出効率は１／４以
下となる。In this structure, between the upper and lower electrodes (lower electrode 27 and upper electrode 3
0 and between the lower electrode 28 and the upper electrode 30), the capacitance change is taken out as a series connection of two capacitors, and there is no need to form a pull-down electrode. Compared to the structures shown in FIGS. 2 and 3, the detection efficiency is 1/4 or less for a sensitive film of the same area.
（発明が解決しようとする課Ｉり
このように、従来例の構造では、検出効率を高く維持し
かつ、引き下ろし電極の段切れを防止し、信頼性の高い
感応素子を提供することができないという問題があった
。(Issues to be Solved by the Invention) The conventional structure cannot maintain high detection efficiency, prevent breakage of the pull-down electrode, and provide a highly reliable sensing element. There was a problem.
本発明は、前記実情に鑑みてなされたもので、検知能力
が高く、信頼性の高い感応素子を提供することを目的と
する。The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a sensing element with high detection ability and high reliability.
（課題を解決するための手段）
そこで本発明の方法では、感応膜の形成に先立ち上部電
極とりたしのための電極を形成しておき、感応膜を形成
し、この感応膜をまず該上部電極とりたしのための電極
とやや離間するようにバターニングし、さらに再びこの
上層に感応膜を形成し、これを反応性イオンエツチング
により、エッチバックし、この上部電極とりたしのため
の電極と感応膜との空間を完全に埋めるようにしている
。(Means for Solving the Problem) Therefore, in the method of the present invention, an electrode for removing the upper electrode is formed prior to forming the sensitive film, a sensitive film is formed, and this sensitive film is first attached to the upper part of the sensitive film. Buttering is performed so that it is slightly separated from the electrode for removing the electrode, and a sensitive film is again formed on this upper layer, and this is etched back by reactive ion etching. The space between the electrode and the sensitive membrane is completely filled.
（作用）
上記構成によれば、感応膜の形成に先立ち、引き下ろし
電極を形成するようにしているため、引き下ろし電極形
成時に、長時間にわたる高温工程を経ることなく形成で
き、感応膜は良好に維持される。(Function) According to the above configuration, since the pull-down electrode is formed before forming the sensitive film, the pull-down electrode can be formed without going through a long high-temperature process, and the sensitive film is maintained well. be done.
また、上部電極取り出し電極上に感応膜が残留して、凹
凸が大きくなったり、上部電極取り出し電極と感応膜と
の間に空間ができ、上部電極と下部電極との短絡が生じ
たりすることな°く、容易に信頼性よく、平坦な表面を
得ることができる。In addition, the sensitive film will not remain on the upper electrode lead-out electrode, causing unevenness to become large, or a space will be created between the upper electrode lead-out electrode and the sensitive film, causing a short circuit between the upper electrode and the lower electrode. A flat surface can be obtained easily and reliably.
（実施例）
以下、本発明の実施例について図面を参照しつつ詳細に
説明する。(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.
第１図（１ｋ）乃至第１図（ｇ）は本発明実施例の半導
体感湿センサの製造工程を示す工程図である。FIG. 1(1k) to FIG. 1(g) are process diagrams showing the manufacturing process of a semiconductor humidity sensor according to an embodiment of the present invention.
先ず、第１図（ａ）に示すように、予めトランジスタＴ
や抵抗Ｒなどの周辺回路（第５図はこの等価回路である
）を集積化して形成したシリコン基板１上に酸化シリコ
ン膜８を形成した後、所定の位置にコンタクトホールを
形成し、配線層９を形成した後さらにパッシベーション
膜としての窒化シリコン膜２を形成する。（第５図中、
１０は静電容量感応部、１１は参照コンデンサ、１２は
発信回路、１３．１５はオペアンプ、１４はダイオード
である。）
続いて、第１図（ｂ）に示すように、この窒化シリコン
膜２の所定の位置にコンタクトホールを形成し、膜厚０
．３〜１μ■のチタン（Ｔｉ）膜３および金（Ａｕ）膜
４をスパッタリング法で成膜し、フォトリソ法によって
バターニングし、−端がシリコン基板内に形成された周
辺回路の所定のパッドに接続するように下部電極３，４
を形成する。First, as shown in FIG. 1(a), the transistor T
After forming a silicon oxide film 8 on a silicon substrate 1 formed by integrating peripheral circuits such as and a resistor R (FIG. 5 is an equivalent circuit of this), contact holes are formed at predetermined positions, and a wiring layer is formed. After forming the silicon nitride film 9, a silicon nitride film 2 is further formed as a passivation film. (In Figure 5,
10 is a capacitance sensitive section, 11 is a reference capacitor, 12 is an oscillation circuit, 13.15 is an operational amplifier, and 14 is a diode. ) Subsequently, as shown in FIG. 1(b), contact holes are formed at predetermined positions in this silicon nitride film 2, and the film thickness is 0.
．． A titanium (Ti) film 3 and a gold (Au) film 4 with a thickness of 3 to 1μ are formed by sputtering, buttered by photolithography, and the negative end is placed on a predetermined pad of a peripheral circuit formed in a silicon substrate. Lower electrodes 3, 4 to connect
form.
この後、第１図（Ｃ）に示すように、メタルマスクを用
いてＴｉ膜およびＡｕ膜をスパッタリング法で成膜し、
一端がシリコン基板内に形成された周辺回路の所定のパ
ッドに接続するように上部電極取り出し電極７を形成す
る。このとき、膜厚が、次の工程で形成される感応膜と
同程度の厚さとなるようにする。After that, as shown in FIG. 1(C), a Ti film and an Au film are formed by sputtering using a metal mask.
An upper electrode extraction electrode 7 is formed so that one end thereof is connected to a predetermined pad of a peripheral circuit formed in the silicon substrate. At this time, the film thickness is made to be approximately the same as that of the sensitive film formed in the next step.
そして、第１図（ｄ）に示すように、スピンコード法に
より膜厚１〜５μ麿のポリイミド膜５を塗布し、１５０
〜３００℃で、３０分間程度キュアした後、フォトリソ
法および反応性ドライエツチングにより、上部電極取り
出し電極７の一端から０．５〜２μ■程度離間するよう
にバターニングする。ここでポリイミド膜５の膜厚は、
検知対象物が十分に膜全体に拡散し、かつ感応膜上面に
下部電極の段差がなだらかに出る厚みと同程度とする。Then, as shown in FIG. 1(d), a polyimide film 5 with a thickness of 1 to 5 μm is coated by a spin code method.
After curing at ~300 DEG C. for about 30 minutes, it is patterned by photolithography and reactive dry etching so as to be spaced from one end of the upper electrode extraction electrode 7 by about 0.5 to 2 μm. Here, the film thickness of the polyimide film 5 is
The thickness should be the same as that at which the object to be detected is sufficiently diffused throughout the membrane and the step of the lower electrode gently appears on the upper surface of the sensitive membrane.
さらに、第１図（ｅ）に示すように、スピンコード法に
より再びこの上層に膜厚１〜２μ−のポリイミド膜５を
塗布し、先に塗布したポリイミド膜５と上部電極取り出
し電極７との凹凸がでないように、約１μｍ程度の膜厚
になるようにする。Furthermore, as shown in FIG. 1(e), a polyimide film 5 with a film thickness of 1 to 2 μ- is coated on this upper layer again by the spin code method, and the polyimide film 5 coated previously and the upper electrode lead-out electrode 7 are bonded together. The film thickness should be about 1 μm to avoid unevenness.
そして、第１図（ｆ）に示すように、１５０〜３００℃
で、３０分間程度キュアした後、反応性イオンエツチン
グ（ＲＩ Ｅ）法により、ポリイミド膜表面を均一にエ
ツチングし先の上部電極取り出し電極７表面を露呈せし
め、ポリイミド膜５と上部電極取り出し電極７との表面
が平坦につながるようにする。ここで、表面に残留物が
ある場合は、さらにウェットエツチングを組み合わせる
ようにしてもよい。Then, as shown in Figure 1(f), 150 to 300°C
After curing for about 30 minutes, the surface of the polyimide film is uniformly etched by reactive ion etching (RIE) to expose the surface of the upper electrode lead-out electrode 7, and the polyimide film 5 and the upper electrode lead-out electrode 7 are separated. Make sure the surfaces are flat and connected. Here, if there is any residue on the surface, wet etching may be further combined.
そして最後に、第１図（ｇ）に示すように、３００〜４
００℃で、１時間程度キュアした後、スパッタリング法
あるいは蒸着法により数百１８程度の通気性のある金薄
膜を形成し、フォトリソ法によりこれをバターニングし
、上部電極６を形成する。Finally, as shown in Figure 1 (g), 300 to 4
After curing at 00° C. for about 1 hour, an air-permeable thin film of about 180 cm is formed by sputtering or vapor deposition, and then patterned by photolithography to form the upper electrode 6.
このようにして、上部電極取り出し電極７上になめらか
に上部電極が伸長し、段切れもなく、電極の取りだしを
おこなうことができるため、厚い引き下ろし電極は不要
となり、引き下ろし電極形成時に、長時間にわたる高温
工程を経ることなく形成でき、感応膜は良好に維持され
る。In this way, the upper electrode can be smoothly extended onto the upper electrode extraction electrode 7, and the electrode can be extracted without any break in the step. Therefore, there is no need for a thick pull-down electrode, and it takes a long time to form the pull-down electrode. It can be formed without going through a high-temperature process, and the sensitive film is maintained well.
ところで、このポリイミド膜は、フォトリソ工程による
パターンの位置決めがわずかでもずれ、上部電極取り出
し電極７上にかかると、表面は凹凸が大きくなってしま
い、また逆に空間があくと、上部電極がこの空間を介し
て下部電極（ここではシリコン基板）と短絡してしまう
。By the way, if this polyimide film is misaligned even slightly in the positioning of the pattern in the photolithography process and covers the upper electrode lead-out electrode 7, the surface will become uneven, and conversely, if there is a space, the upper electrode will not fit into this space. This results in a short circuit with the lower electrode (here, the silicon substrate) via the .
これに対し、上記方法では、あらかじめ上部電極取り出
し電極７とやや離間するようにバターニングしたのち、
再びこの上層にポリイミド膜を形成し、これを反応性イ
オンエツチングにより、エッチバックし、この空間を完
全に埋めるようにしているため、上部電極取り出し電極
７に並んでポリイミド膜を上部電極取り出し電極７と同
一の高さになるように形成することができ、容易に信頼
性よく、平坦な表面を得ることができる。On the other hand, in the above method, after buttering is performed in advance so that it is slightly spaced from the upper electrode extraction electrode 7,
A polyimide film is again formed on this upper layer and etched back by reactive ion etching to completely fill this space. It can be formed to have the same height as the surface, making it easy to reliably obtain a flat surface.
なお、前記実施例において、基板は必ずしもｎ型である
必要はなく、ｐ型であってもよいが、下部電極用パッド
部の金属としてはオーミックコンタクトがとれるような
材料を選択する必要がある。In the above embodiments, the substrate does not necessarily have to be of n-type, but may be of p-type, but it is necessary to select a material that allows ohmic contact as the metal of the lower electrode pad portion.
また、感湿膜の材料としても、ポリイミド膜に限定され
るものではなく、セルロース系材料や光硬化型材料等地
の材料を用いてもよい。Furthermore, the material for the moisture-sensitive film is not limited to the polyimide film, and other materials such as cellulose-based materials and photocurable materials may also be used.
なお、前記実施例においては、ガラス基板を用いたが、
必ずしもガラス基板を用いる必要はなく他の絶縁性基板
を用いるようにしてもよい。Although a glass substrate was used in the above example,
It is not always necessary to use a glass substrate, and other insulating substrates may be used.
更にまた、前記実施例において、基板と感湿膜等各層間
の密着性を高めるための工夫をしてもよい。例えば、基
板表面に形成された酸化シリコン膜上に金薄膜を形成す
る際、金薄膜の形成に先立ち、アンカーとしてのチタン
薄膜を形成したが、金膜のみでもよくあるいはクロム薄
膜を形成したり、何等かのの前処理を施すようにしても
よい。Furthermore, in the embodiments described above, measures may be taken to improve the adhesion between each layer such as the substrate and the moisture-sensitive film. For example, when forming a gold thin film on a silicon oxide film formed on the surface of a substrate, a titanium thin film was formed as an anchor before forming the gold thin film, but it is also possible to form a gold film alone or a chromium thin film. Some kind of pre-treatment may be performed.
以上説明してきたように、本発明によれば、まず、半導
体基板上に上部電極取り出し用金属膜を形成したのち、
感応膜の形成をまず該上部電極取り出し用金属膜とやや
離間するようにパターニングする第１の工程と、さらに
再びこの上層に感応膜を形成し、これを反応性イオンエ
ツチングにより、エッチバックし、この絶縁膜と感応膜
との空間を完全に埋める第２の工程との２工程で構成し
、さらにこの金属膜上に伸長するように上部電極を形成
するようにしているため、金属膜上に感応膜が残留して
、凹凸が大きくなったり、金属膜と感応膜との間に空間
ができ、上部電極と下部電極との短絡が生じたりするこ
となく、感応膜が良好で、検出効率が高く、安定した特
性を得ることができ量産性の高い感応素子を得ることが
できる。As explained above, according to the present invention, first, a metal film for taking out an upper electrode is formed on a semiconductor substrate, and then,
The first step of forming a sensitive film is to pattern it so that it is slightly spaced from the metal film for taking out the upper electrode, and then again to form a sensitive film on this upper layer and etch it back by reactive ion etching. It consists of two steps: a second step that completely fills the space between the insulating film and the sensitive film, and an upper electrode is formed extending over the metal film. The sensitive film is good and the detection efficiency is high, without the sensitive film remaining, increasing the unevenness, creating a space between the metal film and the sensitive film, and causing a short circuit between the upper and lower electrodes. It is possible to obtain a sensing element that has high and stable characteristics and is highly mass-producible.
第１図（ａ）乃至第１図（ｇ）は本発明実施例の湿度セ
ンサの製造工程図、第２図乃至第４図は従来例の湿度セ
ンサを示す図、第５図は周辺回路の等価回路図である。
１・・・センサ基板、２・・・窒化シリコン膜、３．４
・・・下部電極、４・・・上部電極、５・・・感応膜、
６・・・上部電極、７・・・上部電極引き下ろし電極、
８・・・酸化シリコン膜、９・・・配線、１０・・・静
電容量感応部、１１・・・参照コンデンサ、１２・・・
発信回路、１３゜１５・・・オペアンプ、１４・・・ダ
イオード、２１・・・センサ基板、２２・・・下部電極
、２３・・・感応膜、２４、・・上部電極、２５・・・
引き下ろし電極、２６−・・ポンディングパッド、２７
．２８・・・下部電極、２９・・・感応膜、３０−・・
上部電極、３１・・・ソース、３２・・・ゲート、３３
・・・ドレイン、３６・・・ゲート絶縁膜。
概２図
バ
代理人弁理士・・・・・・三 好 秀 和１１！３図
第４図1(a) to 1(g) are manufacturing process diagrams of a humidity sensor according to an embodiment of the present invention, FIGS. 2 to 4 are diagrams showing a conventional humidity sensor, and FIG. 5 is a diagram of a peripheral circuit. It is an equivalent circuit diagram. 1... Sensor substrate, 2... Silicon nitride film, 3.4
... lower electrode, 4 ... upper electrode, 5 ... sensitive film,
6... Upper electrode, 7... Upper electrode pull-down electrode,
8... Silicon oxide film, 9... Wiring, 10... Capacitance sensitive part, 11... Reference capacitor, 12...
Transmission circuit, 13° 15... Operational amplifier, 14... Diode, 21... Sensor board, 22... Lower electrode, 23... Sensitive film, 24... Upper electrode, 25...
Pull-down electrode, 26--Ponding pad, 27
．． 28... Lower electrode, 29... Sensitive film, 30-...
Upper electrode, 31... Source, 32... Gate, 33
...Drain, 36...Gate insulating film. Approximately Figure 2B Representative Patent Attorney・・・Hide Miyoshi Kazu 11!3 Figure 4
Claims (1)
パッド形成領域に上部電極取り出し用電極を形成する取
り出し電極形成工程と、 前記上部電極取り出し用電極とやや離間するように感応
膜パターンを形成する感応膜形成第１工程と、 さらに再びこの上層に感応膜を形成し、これを反応性イ
オンエッチングにより、エッチバックし、前記上部電極
取り出し用電極と前記感応膜パターンとの空間を完全に
埋める感応膜形成第２工程と、 前記上部電極取り出し用電極上に伸長するように上部電
極を形成する上部電極形成工程とを含むようにしたこと
を特徴とする感応素子の製造方法。[Scope of Claims] An extraction electrode forming step of forming an upper electrode extraction electrode in an upper electrode extraction pad formation area on the surface of the substrate on which the lower electrode is formed; A first step of forming a sensitive film in which a film pattern is formed, and a sensitive film is formed again on this upper layer, and this is etched back by reactive ion etching to form a space between the electrode for taking out the upper electrode and the sensitive film pattern. A method for manufacturing a sensing element, comprising: a second step of forming a sensitive film to completely fill the area; and an upper electrode forming step of forming an upper electrode so as to extend over the electrode for taking out the upper electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13978790A JPH0434351A (en) | 1990-05-31 | 1990-05-31 | Manufacture of response element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13978790A JPH0434351A (en) | 1990-05-31 | 1990-05-31 | Manufacture of response element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0434351A true JPH0434351A (en) | 1992-02-05 |
Family
ID=15253419
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13978790A Pending JPH0434351A (en) | 1990-05-31 | 1990-05-31 | Manufacture of response element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0434351A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006194853A (en) * | 2005-01-10 | 2006-07-27 | Univ Of Warwick | Gas-sensing semiconductor device |
-
1990
- 1990-05-31 JP JP13978790A patent/JPH0434351A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006194853A (en) * | 2005-01-10 | 2006-07-27 | Univ Of Warwick | Gas-sensing semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101093612B1 (en) | The capacitance type humidity sensor and fabrication method thereof | |
| US6861276B2 (en) | Method for fabricating a single chip multiple range pressure transducer device | |
| US5600071A (en) | Vertically integrated sensor structure and method | |
| JP2003004683A (en) | Capacitance-type humidity sensor | |
| US20070275495A1 (en) | Method for fabricating a pressure sensor using SOI wafers | |
| JP2002243689A (en) | Capacity-type humidity sensor and method for manufacturing the same | |
| US5471723A (en) | Methods of manufacturing thin-film absolute pressure sensors | |
| JPS5882155A (en) | Field-effect device and its manufacture | |
| JPS60239657A (en) | Moisture-sensitive element and manufacture thereof | |
| JPH02150754A (en) | Production of sensitive element | |
| KR102035089B1 (en) | Humidity Sensor Equipped with Heater and Manufacturing Method Thereof | |
| WO2021109999A1 (en) | Humidity sensor and manufacturing method therefor | |
| JPH0434351A (en) | Manufacture of response element | |
| US7319581B2 (en) | Capacitive pressure sensor | |
| JP2850558B2 (en) | Semiconductor pressure sensor and method of manufacturing the same | |
| US10132712B1 (en) | Micro hermetic sensor | |
| JP3033143B2 (en) | Gas sensor manufacturing method | |
| JP2002365256A (en) | Humidity sensor | |
| JPH0679009B2 (en) | Chemical sensor | |
| JPH02150753A (en) | Sensitive element | |
| JP2756748B2 (en) | Humidity detecting element and manufacturing method thereof | |
| JPH01163648A (en) | Humidity sensing element and its manufacture | |
| JPH0221622A (en) | Semiconductor device | |
| JPH10221144A (en) | Micro heater and its manufacture | |
| JPH0590553A (en) | Infrared ray detector and manufacturing method thereof |