JPH0434332B2 - - Google Patents

Info

Publication number
JPH0434332B2
JPH0434332B2 JP57157009A JP15700982A JPH0434332B2 JP H0434332 B2 JPH0434332 B2 JP H0434332B2 JP 57157009 A JP57157009 A JP 57157009A JP 15700982 A JP15700982 A JP 15700982A JP H0434332 B2 JPH0434332 B2 JP H0434332B2
Authority
JP
Japan
Prior art keywords
fet
mos
logic
conductivity type
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57157009A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5945721A (ja
Inventor
Hideji Koike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57157009A priority Critical patent/JPS5945721A/ja
Publication of JPS5945721A publication Critical patent/JPS5945721A/ja
Publication of JPH0434332B2 publication Critical patent/JPH0434332B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type

Landscapes

  • Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
JP57157009A 1982-09-09 1982-09-09 Ｃｍｏｓ論理回路 Granted JPS5945721A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57157009A JPS5945721A (ja) 1982-09-09 1982-09-09 Ｃｍｏｓ論理回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57157009A JPS5945721A (ja) 1982-09-09 1982-09-09 Ｃｍｏｓ論理回路

Publications (2)

Publication Number Publication Date
JPS5945721A JPS5945721A (ja) 1984-03-14
JPH0434332B2 true JPH0434332B2 (enEXAMPLES) 1992-06-05

Family

ID=15640180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57157009A Granted JPS5945721A (ja) 1982-09-09 1982-09-09 Ｃｍｏｓ論理回路

Country Status (1)

Country Link
JP (1) JPS5945721A (enEXAMPLES)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8500337A (nl) * 1985-02-07 1986-09-01 Philips Nv Ladingsgekoppelde beeldopneeminrichting.

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56198Y2 (enEXAMPLES) * 1976-09-16 1981-01-07

Also Published As

Publication number Publication date
JPS5945721A (ja) 1984-03-14

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