JPH0432978A - Image processor - Google Patents

Abstract

PURPOSE:To shorten the time from the instruction of an original image read to its display by storing image data in one memory block when the image data is read by a specific amount, reading the image data out of the block and displaying the image data. CONSTITUTION:The image data is inputted to a serial port 10 in series through an input/output interface(I/F) 12 with a picture element clock signal CLK and a timing signal generator 11 counts the image clock signal CLK simultaneously with the image input; and a serial port 10 stops data transfer from a original reader 17 temporarily and information on a free flag set is written in the tail word on a buffer memory. The data stored in the serial port 10 is sent to the block 21 and the tail one word is rewritten from '1' to '0'. Then the input image data can be displayed on a CRT 3 in order even during the read of the image. Consequently, the time up to the display of the read image is shortened.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to an image processing device and an image processing device that reads and displays image information.

[Conventional technology]

Conventionally, in this type of apparatus, when reading a document image and displaying it, the read image is once stored in a memory and then the image is displayed.

[Problem to be solved by the invention]

In the conventional example described above, the display operation is performed after the entire image has been completely read, so a disadvantage is that it takes a considerable amount of time from the time the reading operation is specified until the image is displayed on the display device ('CRT, etc.). there were. The present invention has been made in view of this problem, and it is an object of the present invention to provide an image processing device that makes it possible to shorten the time from an instruction to read a document image to its display.

[Means to solve the problem]

In order to solve this problem, the image processing device of the present invention has the configuration shown below. That is, a reading means for reading an original image, a group of memory blocks divided and managed according to a predetermined capacity, and when a predetermined amount of image data is read by the reading means, the image data is stored in one of the memory blocks. and display means for reading and displaying image data from a memory block stored in the storage means.

[Effect]

In the configuration of the present invention, each time the image data reaches a predetermined amount while being read by the reading means, one of the memory blocks is
On the other hand, the image data is read from the memory block in which the image data has already been stored and displayed.

[Examples] Examples according to the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 shows a block diagram of an image processing apparatus in an embodiment. In the figure, 1 is a control unit that controls the output of image data for creating, editing, and printing documents and images, and 2 is a recording medium (image data) according to the image data sent from the control unit 1.
17 is a document reader that photoelectrically reads image information and converts it into electrical image data; 3 is a CR7 that displays documents, image data, etc.; This is the display section. In the control unit 1, 5 is a CPU that controls the entire device. 6 is a ROM that stores programs to be executed by the CPU 5, and 7 is a RAM that the CPU 5 uses as a work area. This RAM 7 temporarily stores document data (character code data, image data read by a scanner (not shown), etc.) before being developed for printing or display. A floppy disk (FD) 8 stores various documents and image files as an external storage device. A keyboard (KBD) 4 provides various control commands in addition to creating and editing document data. 13 is a CRT interface (CRT I/F), which controls the CR7 display section 3; 15 is a video RAM (VRAM);
Stores image data for CRT display. 14 is a system bus. Furthermore, 16 is an image memory section, in which input/output I
/F12 to store image information read by the document reader 17. Then, the CPU 5 cuts out a part of the read image information and performs image processing such as combining it with other characters and figures. Further, when desired image data is created, the image is developed again in the image memory section 16 and is formatted in the image printer 2 via the input/output I/F 12. The image memory unit 16 of this embodiment is composed of a dual port memory, and includes a random access port (RAP) that allows word data to be randomly accessed from the CPU 5 side.
9 and a serial access port (SA
P) Equipped with 10. Further, 11 is a timing signal generator, which counts the number of words input/output via the serial access port 10 by counting the image clock signal, and depending on the count, the serial access port 10 and the random access port 9 Gives the start timing of the batch transfer operation between FIG. 2 is a diagram illustrating the image data input operation in the image memory section 16 of the embodiment. In the figure, the memory of the random access port 9 has each predetermined size (5 in the embodiment).
12 words) are divided into blocks 21 to 25, etc. Image data is stored in 511 words from the beginning of each block, and a flag indicating whether or not the block is vacant is stored in the last 1 word (shaded area in the figure). Although not shown, a buffer memory of 512 words is provided within the serial access port 10. With this configuration, when receiving a document reading instruction from the keyboard or the like, the CPU 5 first sets the empty flags of all memory blocks in the RAP 9 to a set state (an empty state, for example, "1"). Next, the CPU 5 sends an instruction to the document reader 17 to start reading the image. Thereby, the image data output from the image reader 17 is serially input to the serial port 10 via the input/output I/F 12 using the pixel clock signal CLK. On the other hand, timing signal generator 1
1 counts the image clock signal CLK at the same time as the image is input to the serial port 10. When the transfer of 511 words is completed, a control signal 18 to that effect is output. When the serial board 10 receives this signal, it temporarily stops data transfer from the document reader 17 through the input/output interface 12, and stores the empty flag set information in the last word (512th word) of its own buffer memory. (For example, “0”) If you write this empty flag reset information, the serial port 1
The data in 0 (512 words) is transferred to block 21. At this point, the last word of block 21 is rewritten from "l" to "0". Thereafter, operations similar to those described above are repeated, and block 22.
Block 23. At the same time as the image data is written, the empty flag is rewritten from "1" to "0". On the other hand, after the CPU 5 activates the document reader 17, By reading only the last word of each block, it is possible to determine whether or not the data transfer from the document reader 17 has been completed. Expansion processing is performed on the VRAM 15. As described above, in the original reader 17, even during image reading, the input image data is sequentially CR
Display on T3 becomes possible. FIG. 3 is a flowchart showing the operation procedure of each element near the serial access port 10 in the embodiment. First, in step S1, an instruction to start reading is given to the document reader 17, and in the next step S2, reading images are started to be captured in the buffer memory in the serial access port (SAP) 10. Then, in step S3, images are sequentially captured until it is determined that capture of 511 words has been completed. In this way, when the image data for 511 words has been captured, in the next step s4, 51 words of image data in 5AP10 are read.
The second word is set to "On", that is, data indicating that it is not in an empty state. After this, the process advances to step S5, and the 512 words are stored in an empty memory block in the random access port (RAP) 9. This batch transfer is performed by the timing signal generator 1.
What is done by the signal generated from 1 has already been explained. From now on, step 82 continues until it is determined in step S6 that the transfer of all Yuotori images has been completed.
Repeat the following process. Next, the actual operation processing of the CPU 5 of the embodiment will be explained according to the flowchart shown in FIG. Note that the processing based on this flowchart is executed when an instruction to read a document is received from the operator, and is stored in the ROM 4 as a subroutine program. First, in step Sll, the 512th word of all blocks in the random access port (RAP) 9 is set to 1" and a read instruction signal is given to the document reader 17. After this, the CPU 5 reads the 512th word of each block in the RAP 9. Wait until the presence of a block containing image data is detected by checking the eyes. When the presence of a block containing image data is detected, the data of 511 words in that block is transferred to the VRAM 15. Although the explanation is complicated, if the reading resolution of the document reader 17 is higher than the display resolution of the CR7 display section 3, thinning processing or the like may be performed to display the entire image.Now, 511 words worth of data may be displayed. When the transfer is completed, the CP
U5 sets the 512th word of the next block to “1”
and make it possible to store the scanned image again. Incidentally, if the memory capacity of the RAP 9 has a storage capacity for one document, this process is unnecessary. In this manner, the process from step S12 onward is repeated until it is determined in step S15 that the transfer of one screen's worth of original images has been completed. [Other Embodiments] In the above embodiments, a dual port memory was used as the image memory. This is because it is easy to transfer data between the random port and the serial port, and it is easy to write transfer end data (empty flag) to the serial port. However, the present invention is not limited to the embodiments described above. For example, even if you use normal single-board memory,
It is possible to configure an image memory section that achieves similar effects. In this case, the position where the empty flag is written is set every fixed length in the pixel memory. Then, the image data transferred from the document reader 17 is counted, and when the empty flag is reached, the transfer operation is temporarily stopped, and information indicating that the data transfer has been completed is written there. As described above, according to this practical example, since the partial images that have been read are sequentially displayed, it is possible to confirm the image that is actually being read.

【Effect of the invention】

As described above, according to the present invention, it is possible to shorten the time from the start of document reading to the display of the read image.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram of an image processing apparatus according to an embodiment, FIG. 2 is a diagram showing a configuration of an image memory section according to an embodiment, and FIG. 3 is a flowchart showing a control procedure for capturing image data according to an embodiment. FIG. 4 is a flowchart showing the operational processing contents of the CPU in the embodiment from document reading to display. In the figure, 1...control unit, 2...image printer, 3...
・CRT, 4...Keyboard, 5...CPU, 6.
...ROM, 7...RAM, 8...floppy disk, 9...random access board, 10...serial access board, 11...timing signal generator, 12...input/output 1/ F, 13...CRTI/F
, 14... system bus, 15... VRAM. Figure 3

Claims (1)

[Scope of Claims] Reading means for reading a document image; a group of memory blocks divided and managed according to a predetermined capacity; and when a predetermined amount of image data is read by the reading means, a corresponding one of the memory blocks is read. An image processing apparatus comprising: storage means for storing image data; and display means for reading and displaying image data from a memory block stored in the storage means.