JPH04326755A - Resin-sealed semiconductor device and manufacture thereof - Google Patents
Resin-sealed semiconductor device and manufacture thereofInfo
- Publication number
- JPH04326755A JPH04326755A JP3096628A JP9662891A JPH04326755A JP H04326755 A JPH04326755 A JP H04326755A JP 3096628 A JP3096628 A JP 3096628A JP 9662891 A JP9662891 A JP 9662891A JP H04326755 A JPH04326755 A JP H04326755A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- sealed semiconductor
- solder
- tip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 46
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 229910000679 solder Inorganic materials 0.000 claims abstract description 27
- 238000000034 method Methods 0.000 claims abstract description 15
- 238000007747 plating Methods 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 12
- 229920005989 resin Polymers 0.000 claims description 12
- 238000007789 sealing Methods 0.000 claims description 8
- 238000005476 soldering Methods 0.000 abstract description 7
- 238000011179 visual inspection Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は樹脂封止型半導体装置お
よびその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device and a method for manufacturing the same.
【0002】0002
【従来の技術】近年、電子機器の小型化、軽量化が著し
く、より高密度な実装技術が求められている。なかでも
面実装技術は比較的容易に高密度実装が得られる手段と
して広く使われている。半導体装置においても、表面実
装型パッケージの小型化、薄型化が著しく、リードピン
のリード幅やリードピッチの狭小化がますます進んでい
る。それに伴い、半導体装置を外部プリント基板にはん
だ付けした後のはんだ付け外観検査が目視では不可能と
なってきており、自動化が進んでいる。自動はんだ付け
外観検査の方法では樹脂封止型半導体装置のリードピン
の先端部のはんだ濡れ状態ではんだ付けの良否を検査し
ており、リードピンの先端部にはんだが付くことが不可
欠となっている。2. Description of the Related Art In recent years, electronic devices have become significantly smaller and lighter, and higher-density packaging technology is required. Among these, surface mounting technology is widely used as a means of relatively easily achieving high-density mounting. In semiconductor devices as well, surface mount packages are becoming significantly smaller and thinner, and the lead width and lead pitch of lead pins are becoming increasingly narrower. Along with this, it has become impossible to visually inspect the appearance of soldering after a semiconductor device is soldered to an external printed circuit board, and automation is progressing. In the automatic soldering appearance inspection method, the quality of soldering is inspected by checking the solder wet state of the tip of the lead pin of a resin-sealed semiconductor device, and it is essential that the tip of the lead pin be coated with solder.
【0003】以下に従来の樹脂封止型半導体装置および
その製造方法について説明する。図5は従来の樹脂封止
型半導体装置をプリント基板にはんだ実装した実装体の
要部断面図である。図5において、1は半導体チップ(
図示せず)とリードフレームの一部を封止した封止樹脂
、2は半導体チップの上に形成された電子回路素子(図
示せず)と外部回路との電気的導通をとるためのリード
ピン、2aはリードピン2の先端部、3ははんだ実装時
にリードピン2にはんだをなじみ易くするためのはんだ
めっき膜、4はリードピン2とプリント基板6の上の回
路端子5とを接続するためのはんだである。図5に示す
ように、リードピン2の先端部2aにはんだめっき膜3
が残っていないため、はんだ4が付いていない。A conventional resin-sealed semiconductor device and its manufacturing method will be explained below. FIG. 5 is a sectional view of a main part of a package in which a conventional resin-sealed semiconductor device is soldered onto a printed circuit board. In FIG. 5, 1 is a semiconductor chip (
(not shown) and a sealing resin that seals a part of the lead frame; 2 is a lead pin for establishing electrical continuity between an electronic circuit element (not shown) formed on the semiconductor chip and an external circuit; 2a is the tip of the lead pin 2, 3 is a solder plating film for making the solder easily fit onto the lead pin 2 during solder mounting, and 4 is a solder for connecting the lead pin 2 and the circuit terminal 5 on the printed circuit board 6. . As shown in FIG. 5, a solder plating film 3 is formed on the tip 2a of the lead pin 2.
There is no solder 4 left, so solder 4 is not attached.
【0004】図6(a)はリードフレーム加工前の従来
の樹脂封止型半導体装置の要部平面図、図6(b)は同
樹脂封止型半導体装置の要部断面図である。これらの図
に示すように、リードピン2はリードフレームの連結部
2bで固定されている。なお7は樹脂封止工程において
樹脂の流れを抑えるダムバーである。FIG. 6A is a plan view of a main part of a conventional resin-sealed semiconductor device before lead frame processing, and FIG. 6B is a sectional view of a main part of the same resin-sealed semiconductor device. As shown in these figures, the lead pin 2 is fixed by a connecting portion 2b of the lead frame. Note that 7 is a dam bar that suppresses the flow of resin during the resin sealing process.
【0005】図7(a)は樹脂封止型半導体装置の製造
方法を説明するための要部平面図、図7(b)は同樹脂
封止型半導体装置の製造方法を説明するための要部断面
図である。これらの図において、8はリードを曲げて成
形する上金型、9は同様にリードを成形する下金型、1
0はリード先端部を切断する切断器である。 従来の樹
脂封止型半導体装置の組立工程におけるリード成形方法
では、半導体チップとリードフレームの一部を樹脂封止
した後、封止樹脂1から露出したリードピン2にはんだ
めっきし、その後ダムバー7を切断し、上金型8と下金
型9でリードピン2を固定し、切断器10をAで示す方
向に動かしてリードフレームの連結部2bを切断してい
た。FIG. 7(a) is a plan view of the main parts for explaining the method for manufacturing a resin-sealed semiconductor device, and FIG. 7(b) is a plan view for explaining the method for manufacturing the resin-sealed semiconductor device. FIG. In these figures, 8 is an upper mold for bending and molding the lead, 9 is a lower mold for molding the lead in the same way, and 1
0 is a cutter that cuts the tip of the lead. In the conventional lead forming method used in the assembly process of resin-sealed semiconductor devices, after the semiconductor chip and part of the lead frame are sealed with resin, the lead pins 2 exposed from the sealing resin 1 are plated with solder, and then the dam bar 7 is plated with solder. After cutting, the lead pin 2 was fixed with the upper mold 8 and the lower mold 9, and the cutter 10 was moved in the direction indicated by A to cut the connecting portion 2b of the lead frame.
【0006】[0006]
【発明が解決しようとする課題】しかしながら上記の従
来の構成では、プリント基板6にはんだ実装した時にリ
ードピン2の先端部2aにはんだ4が付きにくいという
課題を有していた。However, the conventional structure described above has a problem in that the solder 4 is difficult to adhere to the tip portion 2a of the lead pin 2 when it is mounted on the printed circuit board 6 by solder.
【0007】本発明は上記従来の課題を解決するもので
、プリント基板に実装した樹脂封止型半導体装置の自動
はんだ付け外観検査における誤認識の割合を大幅に削減
できる樹脂封止型半導体装置およびその製造方法を提供
することを目的とする。The present invention solves the above-mentioned conventional problems, and provides a resin-encapsulated semiconductor device and a resin-encapsulated semiconductor device that can significantly reduce the rate of misrecognition during automatic soldering visual inspection of resin-encapsulated semiconductor devices mounted on printed circuit boards. The purpose is to provide a manufacturing method thereof.
【0008】[0008]
【課題を解決するための手段】この目的を達成するため
の本発明の樹脂封止型半導体装置は、封止樹脂から突出
したリードピンの先端部にめっき膜を残した構成を有し
ており、またその製造方法は、少なくとも先端部が解放
端になっているリードピンを固定するためのサイドバー
を除くリードピンを櫛型の上金型と下金型で挟んで固定
し、上金型と下金型の隙間に嵌合する切断器を用いてダ
ムバーとサイドバーを切断する工程を有している。[Means for Solving the Problems] A resin-sealed semiconductor device of the present invention to achieve this object has a structure in which a plating film is left on the tip of a lead pin protruding from the sealing resin, In addition, the manufacturing method is such that the lead pin, excluding the side bar for fixing the lead pin whose tip is at least an open end, is sandwiched and fixed between a comb-shaped upper mold and a lower mold. The method includes the step of cutting the dam bar and the side bar using a cutter that fits into the gap between the molds.
【0009】[0009]
【作用】この構成によって、リードピンの先端部にめっ
き膜を残すことができ、プリント基板への実装時にリー
ドピンの先端部にはんだが付きやすくなり、自動はんだ
付け外観検査装置の誤認識の割合を大きく削減すること
ができる。[Effect] This configuration allows a plating film to remain on the tip of the lead pin, making it easier for solder to adhere to the tip of the lead pin when mounted on a printed circuit board, and increasing the rate of misrecognition by automatic soldering visual inspection equipment. can be reduced.
【0010】0010
【実施例】以下本発明の一実施例について図面を参照し
ながら説明する。図1は本発明の一実施例における樹脂
封止型半導体装置をプリント基板にはんだ実装した実装
体の要部断面図である。なお図5に示す従来例と同一箇
所には同一符号を付し、詳細説明を省略した。本実施例
が従来例と異なる点は、リードピン2の先端部2aには
んだ4aが付いている点である。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a main part of a package in which a resin-sealed semiconductor device according to an embodiment of the present invention is soldered onto a printed circuit board. Note that the same parts as in the conventional example shown in FIG. 5 are given the same reference numerals, and detailed explanations are omitted. This embodiment differs from the conventional example in that a solder 4a is attached to the tip 2a of the lead pin 2.
【0011】図2(a)は本発明の一実施例におけるリ
ードフレーム加工前の樹脂封止型半導体装置の要部平面
図、図2(b)は同樹脂封止型半導体装置の要部断面図
である。封止樹脂1から突出したリードピン2には、樹
脂封止工程での樹脂の流れを防止するダムバー7とリー
ドピン2を固定するためのサイドバー11が設けられて
いる。このような構成のリードピン2では、先端部2a
にまではんだめっき膜3が形成されているため、樹脂封
止型半導体装置を外部プリント基板6にはんだ実装した
場合、先端部2aにはんだ4aが付きやすくなる。FIG. 2(a) is a plan view of the main parts of a resin-sealed semiconductor device before lead frame processing according to an embodiment of the present invention, and FIG. 2(b) is a cross-sectional view of the main parts of the same resin-sealed semiconductor device. It is a diagram. The lead pin 2 protruding from the sealing resin 1 is provided with a dam bar 7 for preventing resin from flowing during the resin sealing process and a side bar 11 for fixing the lead pin 2. In the lead pin 2 having such a configuration, the tip portion 2a
Since the solder plating film 3 is formed to the extent that the resin-sealed semiconductor device is soldered to the external printed circuit board 6, the solder 4a easily adheres to the tip portion 2a.
【0012】図3(a)は本発明の一実施例における樹
脂封止型半導体装置の製造方法を説明するための要部平
面図、図3(b)は同樹脂封止型半導体装置の製造方法
を説明するための要部断面図である。これらの図におい
て、8はリードを曲げて成形する上金型、9は同様にリ
ードを成形する下金型、10は切断器である。上金型8
、下金型9および切断器10にはいずれも凹凸が設けら
れており、上金型8と下金型9の凹凸は一致しており、
その凹部に切断器10の凸部が嵌合するようになってい
る。本実施例の製造方法では、まずリードフレームの所
定領域に半導体チップ(図示せず)を搭載し、半導体チ
ップの電極とリードピン2とを接続した後、半導体チッ
プとリードピン2の一部を樹脂封止する。次に封止樹脂
1から露出したリードピン2にはんだめっきした後、ダ
ムバー7を切断する。次に凹凸を設けた上金型8と下金
型9および切断器10によってリードピン2のサイドバ
ー11を切断する。なお切断方向はAで示す上方から下
方へ切断器10を移動させても良いし、下方から上方へ
切断しても良い。なおはんだめっきはダムバー7をカッ
トした後でサイドバー11のカット前に行っても良い。
このように本実施例によれば、リードピン2の平坦性を
確保しながら成形でき、同時に樹脂封止型半導体装置の
リードピン2の先端部2a全面にはんだめっき膜を残す
ことができる。 なおサイドバー11の位置や形状を
図4(a)〜(e)に示すように変えても同様の効果が
得られる。図4(a)はサイドバー11をリードピン2
の先端近くに位置させた場合、図4(b)はサイドバー
11をリードピン2の上半分に位置させた場合、図4(
c)はサイドバー11をリードピン2の下半分に位置さ
せた場合、図4(d)はサイドバー11の厚みを薄く、
中央に位置させた場合、図4(e)はサイドバー11を
縦長の形状にした場合である。FIG. 3(a) is a plan view of a main part for explaining a method of manufacturing a resin-sealed semiconductor device according to an embodiment of the present invention, and FIG. 3(b) is a plan view of the manufacturing method of the same resin-sealed semiconductor device. FIG. 3 is a sectional view of a main part for explaining the method. In these figures, 8 is an upper mold for bending and shaping the leads, 9 is a lower mold for molding the leads, and 10 is a cutter. Upper mold 8
, the lower die 9 and the cutter 10 are both provided with unevenness, and the unevenness of the upper die 8 and the lower die 9 match,
The convex portion of the cutter 10 is adapted to fit into the concave portion. In the manufacturing method of this embodiment, first, a semiconductor chip (not shown) is mounted on a predetermined area of a lead frame, and after connecting the electrodes of the semiconductor chip and lead pins 2, a part of the semiconductor chip and lead pins 2 are sealed with resin. Stop. Next, the lead pins 2 exposed from the sealing resin 1 are plated with solder, and then the dam bar 7 is cut. Next, the side bars 11 of the lead pins 2 are cut using the upper mold 8 and the lower mold 9 provided with projections and depressions, and the cutter 10. Note that the cutting direction may be such that the cutter 10 is moved from above to below as indicated by A, or may be cut from below to above. Note that solder plating may be performed after cutting the dam bar 7 and before cutting the side bar 11. As described above, according to this embodiment, the lead pin 2 can be molded while ensuring its flatness, and at the same time, the solder plating film can be left on the entire surface of the tip 2a of the lead pin 2 of the resin-sealed semiconductor device. Note that the same effect can be obtained even if the position and shape of the side bar 11 are changed as shown in FIGS. 4(a) to 4(e). In Fig. 4(a), the side bar 11 is connected to the lead pin 2.
When the side bar 11 is positioned near the tip of the lead pin 2, FIG.
c) shows the case where the side bar 11 is located in the lower half of the lead pin 2, and Fig. 4 (d) shows the case where the side bar 11 is made thinner.
When positioned at the center, FIG. 4(e) shows a case where the side bar 11 is in a vertically elongated shape.
【0013】[0013]
【発明の効果】以上のように本発明は、リードピンの先
端部にめっき膜を残すことによりその先端部にはんだが
付きやすくなり、自動はんだ付け外観検査時の誤認識の
割合を大幅に削減できる優れた樹脂封止型半導体装置を
実現できるものである。[Effects of the Invention] As described above, the present invention leaves a plating film on the tip of the lead pin, making it easier for solder to adhere to the tip, and greatly reducing the rate of misrecognition during automatic soldering visual inspection. This makes it possible to realize an excellent resin-sealed semiconductor device.
【図1】本発明の一実施例における樹脂封止型半導体装
置をプリント基板にはんだ実装した実装体の要部断面図
FIG. 1 is a cross-sectional view of a main part of a package in which a resin-sealed semiconductor device is soldered onto a printed circuit board according to an embodiment of the present invention.
【図2】(a)は本発明の一実施例におけるリードフレ
ーム加工前の樹脂封止型半導体装置の要部平面図、(b
)は同樹脂封止型半導体装置の要部断面図FIG. 2(a) is a plan view of the main parts of a resin-sealed semiconductor device before lead frame processing according to an embodiment of the present invention; FIG.
) is a cross-sectional view of the main parts of the same resin-sealed semiconductor device.
【図3】(a
)は本発明の一実施例における樹脂封止型半導体装置の
製造方法を説明するための要部平面図(b)は同樹脂封
止型半導体装置の製造方法を説明するための要部断面図[Figure 3] (a
) is a plan view of a main part for explaining a method for manufacturing a resin-sealed semiconductor device according to an embodiment of the present invention; (b) is a cross-sectional view of a main part for explaining a method for manufacturing a resin-sealed semiconductor device.
【図4】(a)〜(e)はそれぞれサイドバーの位置と
形状を示す図[Figure 4] (a) to (e) are diagrams showing the position and shape of the sidebar, respectively.
【図5】従来の樹脂封止型半導体装置をプリント基板に
はんだ実装した実装体の要部断面図[Figure 5] A cross-sectional view of the main parts of a packaged body in which a conventional resin-sealed semiconductor device is soldered onto a printed circuit board.
【図6】(a)はリードフレーム加工前の従来の樹脂封
止型半導体装置の要部平面図
(b)は同樹脂封止型半導体装置の要部断面図FIG. 6 (a) is a plan view of the main parts of a conventional resin-sealed semiconductor device before lead frame processing; (b) is a cross-sectional view of the main parts of the same resin-sealed semiconductor device;
【図7】
(a)は樹脂封止型半導体装置の製造方法を説明するた
めの要部平面図
(b)は同樹脂封止型半導体装置の製造方法を説明する
ための要部断面図[Figure 7]
(a) is a plan view of the main parts for explaining the manufacturing method of the resin-sealed semiconductor device; (b) is a cross-sectional view of the main parts for explaining the manufacturing method of the resin-sealed semiconductor device.
2 リードピン 2a 先端部 3 はんだめっき膜(めっき膜) 4 はんだ 4a はんだ 2 Lead pin 2a Tip 3 Solder plating film (plating film) 4 Solder 4a Solder
Claims (2)
素子と外部の回路配線とを電気的に導通させるためのリ
ードピンの先端部にはんだとなじみの良いめっき膜を設
けた樹脂封止型半導体装置。1. A resin-sealed semiconductor device in which a plating film that is compatible with solder is provided at the tip of a lead pin for electrically connecting an electronic circuit element formed on a semiconductor chip and external circuit wiring. .
端部が解放端になっており、前記先端部にはんだとなじ
みの良いめっき膜を有し、かつ前記先端部近傍にリード
ピンを固定するためのサイドバーを設けたリードフレー
ムの、少なくとも前記サイドバーを除く領域を櫛型の上
金型と下金型で挟んで固定し、前記上金型と下金型の隙
間に嵌合する切断器を用いて前記サイドバーを切断する
工程を有する樹脂封止型半導体装置の製造方法。2. The tip of the lead pin protruding from the sealing resin is an open end, the tip has a plating film that is compatible with solder, and the lead pin is fixed near the tip. A lead frame provided with a side bar, at least an area excluding the side bar, is sandwiched and fixed between a comb-shaped upper mold and a lower mold, and a cutter is fitted into the gap between the upper mold and the lower mold. 1. A method for manufacturing a resin-sealed semiconductor device, the method comprising the step of cutting the side bar using a resin-sealed semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3096628A JPH04326755A (en) | 1991-04-26 | 1991-04-26 | Resin-sealed semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3096628A JPH04326755A (en) | 1991-04-26 | 1991-04-26 | Resin-sealed semiconductor device and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04326755A true JPH04326755A (en) | 1992-11-16 |
Family
ID=14170103
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3096628A Pending JPH04326755A (en) | 1991-04-26 | 1991-04-26 | Resin-sealed semiconductor device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04326755A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007103643A (en) * | 2005-10-04 | 2007-04-19 | Denso Corp | Method of manufacturing semiconductor device |
JP2008034830A (en) * | 2006-06-27 | 2008-02-14 | Seiko Instruments Inc | Semiconductor device, and lead frame and its manufacturing method |
KR101494011B1 (en) * | 2007-06-27 | 2015-02-16 | 세이코 인스트루 가부시키가이샤 | Semiconductor device, lead frame, and manufacturing method for the lead frame |
-
1991
- 1991-04-26 JP JP3096628A patent/JPH04326755A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007103643A (en) * | 2005-10-04 | 2007-04-19 | Denso Corp | Method of manufacturing semiconductor device |
JP2008034830A (en) * | 2006-06-27 | 2008-02-14 | Seiko Instruments Inc | Semiconductor device, and lead frame and its manufacturing method |
KR101494011B1 (en) * | 2007-06-27 | 2015-02-16 | 세이코 인스트루 가부시키가이샤 | Semiconductor device, lead frame, and manufacturing method for the lead frame |
TWI492352B (en) * | 2007-06-27 | 2015-07-11 | Seiko Instr Inc | Semiconductor device, lead frame, and manufacturing method for the lead frame |
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