JPH04324779A - Picture encoder - Google Patents

Abstract

PURPOSE:To attain high speed encoding by storing an orthogonal conversion picture data into a memory and using a conversion coefficient stored in the memory in the 2nd and succeeding encoding processing. CONSTITUTION:A block data is read from a memory 3 in which a digital picture data from an A/D converter 1 is stored and the data is subjected to orthogonal conversion by a DCT/IDCT circuit 4 and the result is stored in a memory 5. The conversion coefficient read from the memory 5 is quantized by a quantization circuit 6 and a DC conversion coefficient is given to a DPCM circuit 7 and a coding/decoding circuit 9, in which a prediction error is subjected to variable length coding. Moreover, an AC conversion coefficient is given to a zigzag scanning circuit and an encoding/decoding circuit 10, in which the coefficient is subject to zigzag scanning processing and variable length encoding. A control circuit 16 calculates a code quantity and rewrites the content of quantity table 13 when the quantity does not reach a desired value, and encoding processing is implemented again. In this case, in the 2nd and succeeding coding processing, no DCT processing is implemented and the conversion coefficient recorded in the memory 5 is read and encoding processing is implemented.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image encoding apparatus, and more particularly to an image encoding apparatus that performs variable length encoding processing.

0002

[Prior Art] For example, in an electronic still camera,
An image of a subject formed through an optical system is converted into an electrical signal (digital signal) by an image sensor such as a CCD and recorded as image data on a recording medium such as an IC memory card, and the image is read out from the recording medium during playback. read the data,
A reproduced image is obtained by performing reproduction processing. When recording image data, the image data is usually subjected to orthogonal transformation processing and then subjected to encoding processing including predetermined quantization and encoding to compress information before recording.

FIG. 3 shows the configuration of a signal processing system of a conventional electronic still camera of this type. The image signal obtained through the optical system and the image sensor is converted into a digital signal by an A/D converter (ADC), and one screen worth of image data is recorded in the frame (buffer) memory 31. The DCT/IDCT circuit (discrete cosine transform/inverse discrete cosine transform circuit) 4 is a circuit that performs orthogonal transform/inverse orthogonal transform processing, and orthogonally transforms the block data read from the frame memory 31. Block data is data about each block when data for one screen is divided into a plurality of blocks. The transformation (orthogonal) coefficient data obtained by orthogonal transformation in the DCT/IDCT circuit 4 is quantized in the quantization/inverse quantization circuit 6, and then the transformation coefficients are separated into DC component coefficients and AC component coefficients. , respectively D
The signal is supplied to the PCM circuit 7 and the zigzag scanning circuit 8. DPC
The M circuit 7 receives the DC conversion coefficients from the quantization/inverse quantization circuit 6, and calculates the difference from the predicted value, that is, the prediction error.
The data is sent to an encoding/decoding (CODEC) circuit 9. The encoding/decoding circuit 9 performs variable length encoding processing on this prediction error. Further, the zigzag circuit 8 performs so-called zigzag scanning processing on the AC conversion coefficients in order from low-order coefficients. FIG. 4 shows an example of the arrangement of transform coefficients for each block (8×8) image, where the DC transform coefficient corresponds to the position (0,0), and the AC transform coefficient corresponds to the position (0,0) as shown in the figure. , scanned in a zigzag manner. The AC transform coefficients scanned in a zigzag manner in this manner are variable-length encoded by an encoding/decoding (CODEC) circuit 10. encoding/decoding circuit 9,
The encoded data obtained in step 10 is recorded on a recording medium 15 via a combining/dividing circuit 14. Here, the quantization process in the quantization/inverse quantization circuit 6 is performed using the quantization table 1
3, and the encoding/decoding processes in encoding/decoding circuits 9 and 10 are also variable length encoding based on the contents stored in code tables 11 and 12, respectively. It is done as a process. The control circuit 30 controls each component as a whole and rewrites the contents of the quantization table 13 and code tables 11 and 12. In the decoding process during image reproduction, the contents of the quantization table and code table used during the encoding process are loaded and written into each table, and the decoding process is performed based on these.

The control circuit 30 calculates the prediction error of the DC conversion coefficient encoded as described above and the code amount of the AC conversion coefficient, and if the calculated code amount does not match the desired value, the quantization table 13 By changing the contents of, the above orthogonal transformation,
The quantization and encoding process is executed again, the code amount is calculated, and this process is repeated until the code amount reaches the desired value. When the code amount reaches a desired value, the contents of the quantization table 13 and code tables 11 and 12 are first recorded on the recording medium 15, and then the encoded image data is recorded.

[0005] At the time of image reproduction, processing opposite to the above-mentioned image data recording processing is performed. That is, first, the contents of the quantization table and code table used during encoding are loaded, and the quantization table 13, code table 11, 12
Write each. Then, the prediction error of the variable-length encoded DC transform coefficient and the AC transform coefficient are decoded by encoding/decoding circuits 9 and 10, respectively. Regarding the DC conversion coefficient, the prediction error decoded by the DPCM circuit 7 is added to the predicted value to obtain the original DC conversion coefficient. The decoded AC transform coefficients are subjected to reverse scanning processing in a zigzag scanning circuit 8 to return them to the original block data order. The quantization circuit 6 inversely quantizes the transform coefficients obtained as described above and returns them to the original block, and the DCT/IDCT circuit 4 inversely transforms them and writes them into the frame memory 31. Image data read out from the frame memory 31 by raster readout is converted into an analog signal by a D/A converter (DAC) 2 and output.

[0006]

[Problems to be Solved by the Invention] As mentioned above, in conventional image encoding devices, in order to keep the amount of code (amount of information) constant, a series of processes such as adjusting the quantization step are repeatedly performed. There is a problem that processing time is required. In other words, since encoding requires repeating a series of processes such as orthogonal transformation, quantization, and encoding, the cumulative amount of time required for each process is required to reach the final code amount.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an image encoding device that enables encoding processing that stabilizes the amount of code in a short time.

[0008]

[Means for Solving the Problems] In order to solve the above-mentioned problems, an image encoding device according to the present invention orthogonally transforms image data, performs encoding processing such as quantization and encoding, and performs the encoding processing. In an image encoding device that repeatedly performs the encoding process in order to adjust the amount of code obtained by It is configured to perform the conversion using the conversion coefficients recorded in .

[0009]

[Operation] In the present invention, when adjusting the amount of code obtained by the encoding process by repeatedly performing the encoding process of quantizing and encoding the orthogonally transformed image data,
Orthogonal transform image data (transform coefficients) are recorded in memory, and the transform coefficients recorded in memory are used in the second and subsequent encoding processes. As a result, the time required for orthogonal transformation processing can be eliminated, making high-speed encoding possible. The memory may also have a frame memory function for temporarily storing decoded data when decoding encoded image data.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a configuration block diagram showing an embodiment of an image encoding device according to the present invention. Components in the figure that are denoted by the same reference numerals as those in FIG. 3 have the same functions, so detailed explanations thereof will be omitted. Digital image data from the A/D converter 1 is recorded in a buffer memory 3, and block data is read out from the buffer memory 3 and supplied to a DCT/IDCT circuit 4. Since this buffer memory 3 is for dividing image data into blocks, it does not require as much capacity as the frame memory 31 shown in FIG. Can be configured with memory. DCT/
Transform coefficient data subjected to orthogonal transformation by the IDCT circuit 4 is recorded in a buffer memory 5. The buffer memory 5 at this time has a capacity capable of recording conversion coefficients for one screen. The conversion coefficients read from the buffer memory 5 are quantized by a quantization circuit 6, and the DC conversion coefficients are quantized by a DPC.
The prediction error is variable-length encoded in the M circuit 7 and the encoding/decoding circuit 9, and the AC transform coefficients are subjected to zigzag scanning processing in the zigzag scanning circuit 8 and the encoding/decoding circuit 10, and then variable-length encoded. be done. The control circuit 16 calculates the code amount, and when the code amount does not reach the desired value, rewrites the contents of the quantization table 13 and performs the encoding process again. In this embodiment, in the second and subsequent encoding processes, the DCT process is not performed, but the conversion coefficients recorded in the buffer memory 5 are read out and the above-mentioned encoding process is performed. As a result, the time required for DCT processing can be reduced, resulting in a significant reduction in calculation time. In FIG. 1, if the DCT/IDCT circuit 4 cannot operate at the speed of the data output from the A/D converter 1, the buffer memory 3 can be replaced with the frame memory 31 of FIG.

Regarding the decoding processing during image reproduction, the processing up to the quantization/inverse quantization circuit 6 is the same as that of the conventional device shown in FIG. The transform coefficients dequantized by the quantization/inverse quantization circuit 6 are recorded in the buffer memory 5, and the transform coefficients read out from the buffer memory 5 are inversely orthogonally transformed in the DCT/IDCT circuit 4 and stored in the buffer memory. Recorded in 3. One screen worth of image data is read out from the buffer memory 3, converted into an analog signal by the D/A converter 2, and outputted as a reproduced analog signal.

FIG. 2 shows a block diagram of another embodiment of the image encoding apparatus according to the present invention. This embodiment is an example in which the buffer memory 5 in the embodiment of FIG. 1 is used as a frame memory during decoding processing. Image data converted into a digital signal by the A/D converter 1 is recorded in a buffer memory 3. The blocked image data read from the buffer memory 3 is processed by the DCT/I
The DCT circuit 21 performs orthogonal transformation processing, and the obtained transformation coefficients are recorded in the buffer memory 22. Again, 2
DCT processing is not performed in subsequent encoding processing,
The conversion coefficients recorded in the buffer memory 22 are read out and the above encoding process is performed. The conversion coefficient data read from the buffer memory 22 is quantized by a quantization/inverse quantization circuit 23, and among the quantized conversion coefficients, DC conversion coefficients and AC conversion coefficients are sent to a DPCM circuit 7 and a zigzag scanning circuit. 8 and subjected to the aforementioned encoding process via encoding/decoding circuits 9 and 10 under the control of a control circuit 20. When decoding image data, quantization/
The transform coefficients dequantized by the dequantization circuit 23 are directly converted to D
The signal is supplied to the CT/IDCT circuit 21, subjected to inverse orthogonal transformation, and recorded in the buffer memory 22. Buffer memory 22
From then on, one screen data read out in the order adapted to the D/A converter 2 is converted into an analog signal by the D/A converter 2, and an analog image signal is obtained and used as memory. When outputting an image signal, the operation of the DCT/IDCT circuit 21 can be stopped, reducing power consumption and the influence of noise on peripheral circuits.

[0013]

As explained above, the image encoding device according to the present invention includes a buffer memory for recording transform coefficient data obtained by orthogonal transformation, and performs quantization and encoding processing to adjust the amount of code. When repeatedly performing the process, the transform coefficient data recorded in the buffer memory is used as is in the second and subsequent processes, so the time required for orthogonal transform processing can be reduced and high-speed encoding processing becomes possible.

[Brief explanation of drawings]

FIG. 1 is a configuration block diagram showing an embodiment of an image encoding device according to the present invention.

FIG. 2 is a configuration block diagram showing another embodiment of an image encoding device according to the present invention.

FIG. 3 is a configuration block diagram of a conventional image encoding device.

FIG. 4 is a diagram showing the arrangement of transform coefficients obtained by orthogonal transform.
FIG. 3 is a diagram showing how AC conversion coefficients are zigzag scanned.

[Explanation of symbols]

1 A/D converter
2 D/A converter 3, 5, 22, 31 Buffer memory 4
,21 DCT/
IDCT circuit 6, 23
Quantization/inverse quantization circuit 7 DPC
M circuit 8 Zigzag scanning circuit 9, 10 Encoding/decoding circuit 11, 12 Code table
13 Quantization table 14 Combining/dividing circuit
15 Recording medium

Claims (2)

[Claims] 1. An image encoding device that orthogonally transforms image data, performs encoding processing such as quantization and encoding, and repeatedly performs the encoding processing to adjust the amount of code obtained by the encoding processing. , an image encoding device comprising: a memory for recording transform coefficients obtained by the orthogonal transform; and second and subsequent encoding processes are performed using the transform coefficients recorded in the memory. 2. The memory has a frame memory function for temporarily storing decoded data during decoding of the encoded image data and reading out the data in a predetermined sequence during playback. image encoding device.