JPH0379182A - Image encoding control system - Google Patents

Abstract

PURPOSE:To contract a circuit scale by setting the number of signals at every processing block less than a constant number when variable length encoding is performed by performing orthogonal transform coding at every processing block in which one picture of an input image signal is divided into plural numbers. CONSTITUTION:The discrete cosine transformation of the input image signal is performed at every processing block at a discrete cosine transformation part 11, and a difference between the transform coefficient of a preceding frame is found with a subtractor 12, and is added on a quantizer 13. And a quantized difference is added on a variable encoder part 15 at every processing block via a code control part 14, and its output signal is accumulated once in a buffer memory 16, and is sent to a transmission line, etc. At this time, at the control part 14, the number of signals to be added on the encoder part 15 at every processing block is controlled less than the constant number, and the constant number is set as the maximum number of processing signals at the encoder part 15.

Description

[Detailed Description of the Invention] [Summary] Regarding an image encoding control method that encodes an input image signal with high efficiency and outputs it, it is possible to perform high efficiency encoding and reduce the circuit scale without deteriorating the encoding characteristics. For the purpose of An image encoding control method for highly efficient encoding of the input image signal, comprising: a variable length encoding unit that encodes a variable length encoder; and a buffer memory that adds a variable length encoded output signal of the variable length encoder; a code control unit that adds an output signal of the orthogonal transform coding unit;
The code control unit controls the number of signals for each processing block that is applied from the orthogonal transform encoding unit to the variable length encoding unit to be equal to or less than a certain number.

[Industrial application field]

The present invention relates to an image encoding control method for highly efficient encoding of input image signals.

In order to reduce the bit rate of an image signal for a moving image or the like, a method is known in which one screen is divided into a plurality of blocks and each processing block is subjected to orthogonal transform coding for high-efficiency coding.

In such a high-efficiency encoding method, the circuit size can be reduced (
It is requested to do so.

[Conventional technology]

FIG. 6 is a block diagram of main parts of a conventional example, in which an image signal for a moving image or the like is applied to an orthogonal transform encoding section 31. This orthogonal transform encoding unit 31 performs Fourier transform (Fourier transform).
er Transform), Hadamard (Had
amard ) transform, discrete cosine (D 1scret
This can be configured using eCosine ) transform (DCT) or the like, or can be configured in combination with predictive encoding such as interframe encoding.

Recently, a configuration using discrete cosine transform (DCT) has been put into practical use. In addition, the size of the processing block that performs orthogonal transform encoding is, for example, about 8 to 16 pixels in the case of − dimension,
In the case of two dimensions, the pixels are approximately 8×8 pixels to 16×16 pixels.

The image signal is orthogonally transformed encoded for each processing block in the orthogonal transform encoder 31, and is applied to the variable length encoder 32, where it is converted into a variable length code that assigns a short code to a signal with a high probability of occurrence. , are added to the buffer memory 33.

The variable length code signal read out from the buffer memory 33 at a constant speed is sent to a transmission path or the like.

On the receiving side of the variable-length code signal, a variable-length decoding section converts it into a fixed-length code signal, and an orthogonal transform decoding section reproduces the image signal by performing a process opposite to that of the orthogonal transform encoding section 31. In addition to the display device, etc., three images will be displayed.

[Problem to be solved by the invention]

In the conventional image encoding method described above, for example, n
Perform orthogonal transform encoding using Xm pixels as a processing block,
The variable length encoder 3 converts all effective coefficients whose transform coefficients are not O.
2, it is converted into a variable length code, and therefore,
The variable length encoding unit 32 needs to have the ability to variable length encode a maximum of nxm signals. Therefore, the circuit scale becomes large.

In addition, orthogonal transformation tends to cause the transform coefficients on the high frequency component side to become 0. Therefore, it is possible to reduce the circuit scale by processing only the transform coefficients on the low frequency component side, but it is difficult to process the high frequency components. There is no possibility (because
Playback quality may deteriorate.

An object of the present invention is to perform highly efficient encoding without deteriorating encoding characteristics, and to enable reduction in circuit scale.

[Means to solve the problem]

The image encoding control method of the present invention limits the number of variable length encoded signals to a certain number or less, and will be explained with reference to FIG.

An orthogonal transform coding unit 1 performs orthogonal transform coding for each processing block obtained by dividing one screen of an input image signal into a plurality of blocks, and a variable length coding unit performs variable length coding of the output signal of this orthogonal transform coding unit l. 2 and a buffer memory 3 to which the variable-length code output signal of the variable-length coder 2 is added. A code control unit 4 is provided, and the code control unit 4 controls the number of signals added to each processing block from the orthogonal transform coding unit 1 to the variable length coding unit 2 to be equal to or less than a certain number. .

[Effect]

The effective coefficients for each block processed by the orthogonal transform encoding unit 1 are several in convergence, and the code control unit 4 controls the effective coefficients so that they are equal to or less than a predetermined constant number. This is added to the variable length encoder 2, and the variable length encoder 2 can be reduced in size compared to the conventional example, since the variable length encoder 2 can be controlled by the code controller 4 and has a circuit size of a certain number or less. I can do it. Furthermore, even if the orthogonal transform encoding has a small number of effective coefficients on the low frequency component side and a large number of effective coefficients on the high frequency component side, it is possible to process the high frequency component side, thereby suppressing deterioration of reproduced image quality.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram of one embodiment of the present invention, 11
is a discrete cosine transform unit (DCT), 12 is a subtracter, 13
1 is a quantizer, 14 is a code control unit, 15 is a variable length encoder, 16 is a buffer memory, 17 is an inverse quantizer, 18 is an adder, 19 is a frame memory, and 20 is a quantization control unit. This embodiment is based on the orthogonal transform encoding unit l in FIG.
, a discrete cosine transform unit 11, and a subtracter 12 that performs interframe coding. Quantizer 13. Inverse quantizer 17° adder 18. A case is shown in which the frame memory 19 and the like are used.

The input image signal is subjected to discrete cosine transform for each processing block in the discrete cosine transform unit 11, and the difference from the transform coefficient of the previous frame is determined in the subtracter 12.
3, and the difference is quantized and added to the code control section 14. This code control section 14 controls the number of signals added to the variable length encoding section 15 for each processing block to a fixed number or less. Therefore, the variable length encoding section 15
The maximum number of signals to be processed does not correspond to the number of pixels of the processing block (in other words, the maximum number of signals to be processed may be a constant number controlled by the code control unit 14).

Further, the variable length code output signal of the variable length encoder 15 is temporarily stored in the buffer memory 16, read out at a constant speed by a configuration not shown, and sent to a transmission path or the like. The quantization control unit 20 also monitors the occupancy of the buffer memory 16 and controls the quantization steps of the quantizer 13 and inverse quantizer 17 so that overflow or underflow does not occur. Control information for the quantization step is transmitted to the receiving side together with the variable length code output signal.

Further, the difference between the transform coefficients dequantized by the dequantizer 17 is added to the contents of the previous frame in the adder 18, added to the frame memory 19, and read out in the next frame. .

When the processing block in the discrete cosine transform unit 11 is, for example, 8×8 pixels, the quantized output signal for the processing block shown in FIG. The coefficients and are obtained as shown on the right. That is, the effective coefficient 5 of the upper left DC component is 0 for zero run, so it is expressed as (0, 5), and the effective coefficient 7 for the next zigzag scan is 10 for zero run, so it is expressed as (10, 7), and similarly, (3,2), (0,5), (3,2
), (7, 15), (10, 7), and since all the high frequency components after this are O, they are not processed as effective coefficients.

The variable length codes for these zero runs and significant coefficients are shown on the right. Further, the variable length code output signal for this processing block is shown as an output code.

When performing discrete cosine transformation on such 8x8 pixels, it is statistically determined that there is little deterioration in the reproduced image quality even if six effective coefficients including the DC component are used. In the section 14, the variable length encoding section 1
The number of signals added to 5 is controlled to 6 or less. In that case, the third
The effective coefficients and output codes for the processing block shown in the figure are as shown in FIG. In this case, the variable length encoding unit 15 only needs to be configured to perform variable length encoding processing on a maximum of six signals for each processing block.

Furthermore, the code control section 14 can be implemented with a simple configuration that counts the effective coefficients added to the variable length encoding section 15 for each processing block and closes the gate when the count reaches a - constant.

It is also possible to perform orthogonal transform coding and interframe coding using a digital signal processor, etc. In that case, count the effective coefficients for each processing block, and when a certain number is reached, It is also possible to adopt a configuration in which the variable length encoding unit 15 is controlled to move to the processing of the next processing block and add the effective coefficient of that processing block.

FIG. 5 is a block diagram of main parts of another embodiment of the present invention,
The same reference numerals as those in FIG.
2, the inter-frame difference is obtained, orthogonal transform coding is performed for each processing block in the discrete cosine transform unit 11, and the transform coefficients are quantized by the quantizer 13 and sent to the code control unit 14. The code controller 14 controls the number of signals per processing block to be added to a variable length encoder (not shown) to a fixed number or less.

Further, in this embodiment, in order to form a loop including orthogonal transformation, an inverse discrete cosine transform section 11' which adds the output signal of the inverse quantizer 17 is provided, and the orthogonal transform code by the discrete cosine transform section 11 is The configuration is such that the data is returned to its original state and added to the adder 18.

The present invention is not limited to the above-described embodiments, and the orthogonal transform encoding unit 1 can be configured only by various orthogonal transform means such as Fourier transformation or Hadamard transform, or can be configured using only field It is also possible to have a configuration in combination with various predictive encoding means such as inter-coding.

Further, the fixed number in the code control section can be selected depending on the size of the processing block, the type of orthogonal transformation means, etc.

〔Effect of the invention〕

As explained above, the image encoding control method of the present invention is
The number of signals for each processing block added from the orthogonal transform encoding unit to the variable length encoding unit 2 is controlled by the code control unit 4 to a certain number or less, so that the variable length encoding unit 2 From the circuit scale equivalent to the block size,
There is an advantage that the circuit scale can be reduced to a certain number controlled by the code control section 4.

Also, since processing is not omitted depending on the frequency components due to orthogonal transformation, there is a possibility that high frequency components may be processed depending on the nature of the image. Therefore, it is possible to reduce the deterioration of the reproduced image quality and reduce the circuit scale. can.

[Brief explanation of drawings]

FIG. 1 is a diagram explaining the principle of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, FIG. 3 is a diagram explaining variable length code output, and FIG.
FIG. 5 is a block diagram of a main part of another embodiment of the present invention, and FIG. 6 is a block diagram of a main part of a conventional example. 1 is an orthogonal transform encoding section, 2 is a variable length encoding section, 3 is a buffer memory, and 4 is a code control section. The real investigation! Figure 1

Claims (1)

[Scope of Claims] An orthogonal transform encoding unit (1) that performs orthogonal transform encoding for each processing block obtained by dividing one screen of an input image signal into a plurality of blocks;
A variable length encoder (2) that variable length encodes the output signal of the orthogonal transform encoder (1), and a buffer memory (3) that adds the variable length encoded output signal of the variable length encoder (2). ), the image encoding control method performs high-efficiency encoding of the input image signal, further comprising: a code control unit (4) that adds an output signal of the orthogonal transform encoding unit (1); A code control unit (4) controls the number of signals for each processing block added from the orthogonal transform encoding unit (1) to the variable length encoding unit (2) so that the number is equal to or less than a certain number. Image encoding control method.