JPH04324626A - Manufacture of hetero epitaxial substrate - Google Patents

Abstract

PURPOSE:To easily control carrier density even in a low-carrier-density region of a main compound semiconductor layer by changing the thickness of a buffer layer. CONSTITUTION:The following are provided; a preliminary growth process wherein compound semiconductor is stuck on an Si substrate 12 at a low temperature incapable of obtaining single crystal, and a buffer layer 14 is formed, and a main growth process wherein compound semiconductor is crystal-grown on the buffer layer 14 at a high temperature capable of crystal-growing single crystal, and a main compound semiconductor layer 16 is formed. When a hetero epitaxial substrate 10 is manufactured in the above manner, the carrier density in the main compound semiconductor layer 16 is controlled by changing the thickness of the buffer layer 14. For example, the buffer layer 14 is formed on the Si substrate 12 at 450 deg.C by using an MOCVD equipment, and a GaAs layer 16 of 4mum in thickness is crystal-grown at 700 deg.C on the buffer layer 14. In this case, the carrier density of the GaAs layer 16 changes as shown by a graph in figure, when the film thickness of the buffer layer 14 is set as 9nm, 18nm and 27nm.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a heteroepitaxial substrate in which compound semiconductor crystals are grown on a Si substrate.

0002

[Prior Art] Light-emitting devices, high-sensitivity light-receiving devices, high-speed electronic devices, etc. are fabricated using compound semiconductors, and it is desirable to use substrates made of the same compound semiconductors; however, such compound semiconductor substrates are generally It has drawbacks such as being expensive, having a small area, being brittle, and having a large specific gravity. For this reason, a heteroepitaxial substrate is used in which a compound semiconductor is grown as a crystal on a Si substrate, which can be made large in area, lightweight, has high strength, and is inexpensive. Such a heteroepitaxial substrate usually requires (a) a preliminary growth step in which a buffer layer is formed by depositing a compound semiconductor on a Si substrate at a temperature too low to obtain a single crystal, and (b) a crystal growth step in which the single crystal is grown. A main compound semiconductor layer is formed by crystal-growing a compound semiconductor on the buffer layer at a high temperature that can be applied to the silicon substrate. It makes crystal growth possible.

On the other hand, one of the characteristics of a substrate is the carrier concentration, and it is necessary to change its value depending on the type and performance of elements to be fabricated on the substrate. This is done by controlling the concentration and flow rate of a doping gas when doping an n-type dopant such as Si or Se during crystal growth of the main compound semiconductor.

0004

[Problems to be Solved by the Invention] However, in the heteroepitaxial substrate in which a compound semiconductor is crystal-grown on a Si substrate as described above, Si is auto-doped into the main compound semiconductor layer during the crystal growth, and in particular, the dopant is 1015-1018 (cm-3) without doping
) exhibits an n-type property of about 1015 to 1017 (cm
-3) It has been extremely difficult to adjust the carrier concentration as low as that by controlling the concentration and flow rate of the doping gas. Although it is possible to control the amount of Si doping, that is, the carrier concentration, by controlling the crystal growth temperature of the main compound semiconductor layer, this is not preferable because the crystal growth temperature has a large effect on the crystallinity of the compound semiconductor.

The present invention has been made against the background of the above circumstances, and its object is to provide a method for manufacturing a heteroepitaxial substrate that can easily control even a low carrier concentration region.

[0006]

[Means for Solving the Problems] In order to achieve the above object, various experiments and studies have been conducted, and it has been found that the carrier concentration of the main compound semiconductor layer changes depending on the thickness of the buffer layer formed in the preliminary growth step. I found out. The present invention has been made based on this knowledge, and is based on the above-mentioned (a).
A method for manufacturing a heteroepitaxial substrate comprising a preliminary growth step and (b) a main growth step, characterized in that the carrier concentration in the main compound semiconductor layer is controlled by changing the thickness of the buffer layer. .

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

FIG. 2 is a diagram illustrating the structure of a heteroepitaxial substrate 10 (hereinafter simply referred to as substrate 10) manufactured by applying the method of the present invention.
A buffer layer 14 is formed using a VD (organic metal chemical vapor deposition) device, and G is deposited on the buffer layer 14.
The aAs layer 16 is grown by crystal growth. The GaAs layer 16 corresponds to the main compound semiconductor layer and has a thickness of 4 μm. Further, the buffer layer 14 is made of GaAs single crystal in the state of the substrate 10, and the GaAs layer 16 is made of GaAs single crystal.
It cannot be distinguished from the GaAs layer 16, and its thickness is sufficiently thinner than that of the GaAs layer 16. In this embodiment, this buffer layer 1
Three types of substrates 10 were fabricated, each having a film thickness of 9 nm, 18 nm, and 27 nm.

The method for manufacturing the substrate 10 will be described below.
This will be explained in detail with reference to the time chart in FIG. First, a Si substrate 12 with a diameter of 2 inches was ultrasonically cleaned with an organic solvent, rinsed with ultrapure water, and the oxide film on the surface was etched away with an aqueous hydrofluoric acid solution. Rinse this again with ultrapure water,
It was dried with nitrogen and charged into the reactor of the MOCVD apparatus. Note that the surface of the Si substrate 12, that is, the GaAs layer 16
The plane orientation of the plane where is formed is from (100) to [110]
It is turned off by 2 degrees in the direction.

Next, the Si substrate 12 charged into the reactor
100 in a hydrogen atmosphere as shown in Figure 1(a).
Heat treatment was performed at 0°C for 15 minutes, and then the temperature was lowered to 450°C as shown in Figure 1(b), and trimethylgallium (TM
G) and arsine (AsH3) were introduced into the reactor to form the buffer layer 14. At 450° C., a GaAs single crystal cannot be obtained, and the buffer layer 14 at this stage is in a polycrystalline or amorphous state. Further, the growth time t (see FIG. 1) of the buffer layer 14, that is, the introduction time of the raw material gas, is proportional to the film thickness of the buffer layer 14, and in this example, when the film thickness is 9 nm, it is 1 minute, and when the film thickness is 18 nm. In the case of 27 nm, it is 2 minutes, and in the case of 27 nm, it is 3 minutes. The process of forming the buffer layer 14 in a polycrystalline or amorphous state in this manner is a preliminary growth process.

Thereafter, as shown in FIG. 1(c), 70
The temperature was raised to 0°C, and trimethylgallium (T
MG) and arsine (AsH3) were introduced into the reactor, and GaAs crystals were grown by 1 μm. The buffer layer 14 becomes a single crystal in the process of increasing the temperature to 700°C, and becomes a G
The aAs crystal is grown using the GaAs single crystal of the buffer layer 14 as a seed crystal. Next, in order to reduce the crystal defects in the 1 μm GaAs formed in this way, a thermal cycle of 200°C to 900°C was performed as shown in Figure 1(d), and then the GaAs with fewer crystal defects was 1μm
As shown in Figure 1(e), an additional 70
GaAs crystals were grown to a thickness of 3 μm at 0°C. As a result, a 4 μm thick GaAs layer 16 was formed on the Si substrate 12. The broken line in FIG. 2 represents the position where the above thermal cycle was performed, that is, a position at a depth of 3 μm from the surface of the substrate 10. The step of forming the 4 μm thick GaAs layer 16 on the buffer layer 14 in this way is the main growth step.

[0012] Then, by repeating surface etching and capacitance-voltage characteristic measurement for the three types of substrates 10 having buffer layers 14 of 9 nm, 18 nm, and 27 nm in thickness, each of the substrates 10 was fabricated in this manner. We investigated changes in carrier concentration in the depth direction from the surface. FIG. 3 shows the measurement results, and the solid line, one-dot chain line, and two-dot chain line indicate that the thickness of the buffer layer 14 is 9 nm and 1 nm, respectively.
This is the case of 8 nm and 27 nm. As is clear from FIG. 3, near the interface with the Si substrate 12, that is, the depth is around 4 μm, and at the thermal cycle insertion point, that is, the depth is around 3 μm, carriers are thought to be due to diffusion of Si. Although there is a high concentration region, it can be seen that above this, that is, in a region with a depth of 3 μm or less, the carrier concentration changes with an inverse correlation to the thickness of the buffer layer 14. Therefore, even in a low carrier concentration region of about 1015 to 1017 (cm-3), the carrier concentration of the GaAs layer 16 can be easily adjusted by controlling the thickness of the buffer layer 14, that is, the growth time t. be.

In the above example, GaAs is formed on the Si substrate 12.
Although the case where the layer 16 is provided has been described, GaP, In
The present invention can be similarly applied to cases where crystals of III-V group compound semiconductors such as P and other compound semiconductors are grown on Si substrates.

Further, in the above embodiment, the thickness of the buffer layer 14 is controlled by the growth time t, but the thickness of the buffer layer 14 can also be controlled by the concentration or flow rate of the source gas.

Further, in the above embodiment, a thermal cycle is inserted during the crystal growth of the GaAs layer 16, but this thermal cycle can also be omitted. In that case, an increase in carrier concentration due to thermal cycling is avoided.

Further, in the above embodiment, G is formed on the Si substrate 12.
Although the method for manufacturing the substrate 10 on which the aAs layer 16 is formed has been described, it is also possible to use the GaAs layer 16 as part of an element and continuously grow crystals of a compound semiconductor thereon. In other words, when producing a multilayer film for a device by one crystal growth, the carrier concentration in the buffer region and base region can be controlled according to the method of the present invention.

[0017]Although the above embodiment describes the case where compound semiconductor crystals are grown by metal-organic chemical vapor deposition using an MOCVD apparatus, other epitaxial growth apparatus such as one using molecular beam epitaxy may also be used. can. The temperature conditions and the like during crystal growth of the compound semiconductor can also be changed as appropriate.

Although no other examples are given, the present invention can be implemented with various modifications and improvements based on the knowledge of those skilled in the art.

[0019]

Effects of the Invention As detailed above, according to the method for manufacturing a heteroepitaxial substrate of the present invention, by changing the thickness of the buffer layer formed in the preliminary growth step,
The carrier concentration of the main compound semiconductor layer is 1017 (cm-3)
), it can be easily controlled even in a low carrier concentration region below .

[Brief explanation of drawings]

FIG. 1 is a time chart showing the temperature history when manufacturing the heteroepitaxial substrate of FIG. 2 according to the method of the present invention.

FIG. 2 is a structural diagram of a heteroepitaxial substrate manufactured according to the method of the present invention.

FIG. 3 is a diagram showing changes in carrier concentration in the depth direction from the surface of three types of heteroepitaxial substrates with different buffer layer thicknesses.

[Explanation of symbols]

10: Heteroepitaxial substrate 12:Si substrate 14: Buffer layer

Claims (1)

[Claims] 1. A preliminary growth step in which a buffer layer is formed by depositing a compound semiconductor on a Si substrate at a temperature so low that a single crystal cannot be obtained, and a pre-growth step in which a buffer layer is formed at a high temperature at which a single crystal can be grown. A method for manufacturing a heteroepitaxial substrate comprising a main growth step of crystal-growing a compound semiconductor on the layer to form a main compound semiconductor layer, wherein the carrier concentration in the main compound semiconductor layer is adjusted by changing the thickness of the buffer layer. 1. A method for manufacturing a heteroepitaxial substrate, characterized in that the method of manufacturing a heteroepitaxial substrate is controlled.