JPH04324550A - Memory content protective device - Google Patents

Abstract

PURPOSE:To prevent the occurrence of a power supply error when power supply is made next time to a memory provided with a backup power source even when the equipment power source of the memory is turned off while data are written in the memory. CONSTITUTION:A main memory 2a and copy memory 2b are provided in a memory 2 backed up with a battery power source 4 and, at the time of writing data, a central processing unit 1 writes the main part of the data and an error check code in both memories 2a and 2b. At the time of making power supply, the unit 1 checks the error check code of the memory 2a and, when the memory 2a is erroneous, checks the error check code of the memory 2b. The unit 1 initializes the memory 2b when the memory 2b is erroneous and copies the content of the memory 2b in the memory 2b when the memory 2b is not erroneous. When the memory 2a is not erroneous, the unit 1 checks the error check code of the memory 2b and, when the memory 2b is erroneous, copies the content of the memory 2a in the memory 2b.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory content protection device used in information equipment including audio equipment.

0002

2. Description of the Related Art FIG. 3 shows the configuration of a conventional memory content protection device. In FIG. 3, 32 is a memory;
Control signals are input from a central processing unit (hereinafter referred to as CPU) 31. 33 is memory 32
This is a power supply switching means connected between the battery 34 and the internal power supply 35.

Next, the operation of the above conventional example will be explained. In FIG. 3, when the device is powered on, the power source 35 in the device is supplied to the memory 33 by the power source switching means 33, and when the device is powered off, the power source switching device 33 detects a voltage drop in the device's power source. Then, the power source of the memory 32 is switched to the battery power source 34.

[0004] In this way, even with the conventional memory content protection device described above, the memory content can be protected even when the power of the device is turned off.

[0005]

However, in the conventional memory content protection device described above, the CPU 31
If the power is turned off while data is being written to the device, only part of the data will be rewritten and an error will occur the next time the power is turned on, if the data is valid for multiple sources.

The present invention solves these conventional problems and provides an excellent memory content protection device that can protect memory contents even if the power is turned off while the central processing unit is writing data. It is to be.

[0007]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a main memory and a copy memory in a memory backed up by a battery power supply, and when writing data, data is stored in both the main memory and the copy memory. Write the error check code to the main unit, and when turning on the power, first check the error check code in the main memory, if there is an error, then check the error check code in the copy memory, and if there is an error, initialize the memory, If there is no error, the contents of the copy memory are copied to the main memory, and if there is no error in the main memory, the error check code of the copy memory is checked, and if there is an error, the contents of the main memory are copied to the copy memory. It is something.

[0008]

[Operation] Therefore, according to the present invention, even if the power of the device is turned off while data is being written, the memory contents will be restored by the copy memory the next time the power is turned on, so the data will be valid for multiple copies. However, it has the effect of not causing an error the next time the power is turned on.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the structure of a first embodiment of the present invention. In FIG. 1, 2 is a memory such as a static RAM, and a control signal is input from the CPU 1. This memory 2 has a main memory 2a and a copy memory 2b, into which data bodies and error check codes are written respectively.

Further, reference numeral 3 denotes a power supply switching means connected between the memory 2, the battery power source 4, and the internal power source 5 for switching the connection between the internal power source 5 and the battery power source 4.

Next, the operation of the first embodiment will be explained. In FIG. 1, when the device is powered on, the power source 5 in the device is supplied to the memory 3 by the power source switching means 3, and when the device is powered off, the power source switching device 3 detects a voltage drop in the device's power source. , the power source of the memory 2 is switched to the battery power source 4.

When writing data to the memory 2 with the power already turned on, the CPU 1 first writes the corresponding data to the main memory 2a in step 6, processes it, and
In step 7, an error code composed of the added data and the like is calculated, and in step 8, the calculated error code is written into the error code area in the main memory 2a.

Furthermore, in step 9, the corresponding data is written in the copy memory 2b, and finally in step 10, the already calculated error code is written in the copy error code area. After completing the data writing process to the memory 2, the process returns to normal processing.

FIG. 2 shows a flowchart of the power-on processing. In FIG. 2, when the power-on process is started,
First, in step 21, the error check code in the main memory 2a is checked, and if the result of the check is an error, the process moves from the NG side in step 21 to step 22.
Next, the error check code in the copy memory 2b is checked.

If the result of this check is an error, the process proceeds from the NG side of step 22 to step 23, in which an error display is generated, the memory is initialized in step 24, and the process is exited from the power-on process. , step 28
It becomes operational.

[0016] Furthermore, in the process of step 22,
If there is no error in the copy memory 2b, the process moves from the OK side of step 22 to step 27, and this step 2
At step 7, the contents of the copy memory 2b are copied to the main memory 2a, the process exits from the power-on process, and at step 28, the memory 2 enters an operational state.

Further, in the process of step 21, if there is no error in the main memory 2a, the process of step 21 is OK.
The process moves to step 25 from the side, and the error check code of the copy memory 2a is checked. If the result of this check is an error, the process moves from step 25 to step 26, and the contents of the main memory 2a are copied to the copy memory 2b. After that, the system leaves the power-on process and enters the operating state in step 28.

As described above, according to the first embodiment,
Even if you turn off the power to the device while data is being written, the contents of memory 2 will be copied to memory 2 the next time the power is turned on.
Since the restoration is performed using the copy memory or the copy memory, there is an advantage that even if a plurality of pieces of data are valid, an error will not occur the next time the power is turned on.

[0019]

Effects of the Invention As is clear from the above embodiments, the present invention provides a main memory and a copy memory in the memory, writes the data main body and an error check code in both the main memory and the copy memory when writing data, and If there is an error in the main memory error check code at startup, then check the copy memory error check code, and if there is an error, initialize the memory,
If there is no error, copy the contents of the copy memory to the main memory, and if there is no error in the main memory and the error check code of the copy memory is an error,
Since the contents of the main memory are copied to the copy memory, even if the device is turned off while data is being written, the memory contents will be restored to the copy memory or copy memory the next time the power is turned on. Even if a plurality of pieces of data are valid, there is an effect that an error will not occur when the power is turned on next time.

[Brief explanation of drawings]

FIG. 1 is a schematic block diagram of a memory protection device in a first embodiment of the present invention.

[Figure 2] Flowchart showing the flow of processing when the device is powered on

[Figure 3] Schematic block diagram of a conventional memory content protection device

[Explanation of symbols]

1 CPU 2 Memory 3 Power switching means 4 Battery power supply 5　Device internal power supply

Claims (1)

[Claims] 1. A memory that is backed up by a battery power source and has a main memory and a copy memory; when the device internal power is turned on, the device internal power is supplied to the memory; and when the device internal power is turned off, the battery power is supplied to the memory. A power supply switching means that is connected to the memory for backup, and a data body and an error check code are written in both the main memory and copy memory, and when the power is turned on, the error check code in the main memory is checked first, and if there is an error, the error check code is checked. , Next, check the error check code of the above copy memory, and if there is an error, initialize the memory, and if there is no error, copy the contents of the copy memory to the above main memory, and if there is no error in the above main memory, execute the above copy. A memory content protection device comprising: a central processing unit that copies the contents of the main memory to the copy memory if an error is found as a result of checking a memory error check code.