JPH04320070A - Light emitting element - Google Patents

Light emitting element

Info

Publication number
JPH04320070A
JPH04320070A JP3086980A JP8698091A JPH04320070A JP H04320070 A JPH04320070 A JP H04320070A JP 3086980 A JP3086980 A JP 3086980A JP 8698091 A JP8698091 A JP 8698091A JP H04320070 A JPH04320070 A JP H04320070A
Authority
JP
Japan
Prior art keywords
light emitting
layer
substrate
light
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3086980A
Other languages
Japanese (ja)
Other versions
JP2938607B2 (en
Inventor
Shiro Sakai
士郎 酒井
Naoki Wada
直樹 和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8698091A priority Critical patent/JP2938607B2/en
Publication of JPH04320070A publication Critical patent/JPH04320070A/en
Application granted granted Critical
Publication of JP2938607B2 publication Critical patent/JP2938607B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To obtain a light emitting element having excellent characteristics such as high emitting efficiency of a light, etc., by forming semiconductor layers having different lattice constants and thermal expansion coefficients on a semiconductor substrate, and reducing a dislocation for disturbing an operation of the element and a strain stress for increasing and propagating the dislocation when the element such as a light emitting diode, etc., is manufactured. CONSTITUTION:A GaAs/AlGaAs-based double hetero structure is formed on an n-type Si substrate 1 through a selectively etched layer 3. Then, an etching groove 9 from an SiO2 layer 8 to the layer 3 is formed, only part of the layer 3 is removed by etching by using the groove 9, and a light emitting region is so formed as to oppose in a state separated from the substrate. Thereafter, the double hetero layer is thermally annealed. Eventually, a p-type AuZn 10 is formed only on the periphery of the element by using a mask of the SiO2, an n-type Au-Sb ohmic electrode 11 is formed on a rear surface of the substrate, and the element is separated to form a light emitting diode.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、発光ダイオード,レー
ザダイオード,光ICなどの半導体発光素子に関するも
のであり、特に半導体基板上に、その半導体基板と格子
定数及び熱膨張係数が異なる半導体層をヘテロエピタキ
シャル成長により形成し発光素子を作製した場合におけ
る、前記格子定数及び熱膨張係数の際に基づく種々の欠
陥及び歪応力を軽減除去し良好な特性を有する発光素子
の構造に特徴を有する。
[Industrial Field of Application] The present invention relates to semiconductor light emitting devices such as light emitting diodes, laser diodes, and optical ICs. In particular, the present invention relates to semiconductor light emitting devices such as light emitting diodes, laser diodes, and optical ICs. When a light emitting device is formed by heteroepitaxial growth, various defects and strain stress based on the lattice constant and thermal expansion coefficient are reduced and eliminated, and the structure of the light emitting device has good characteristics.

【0002】0002

【従来の技術】近年、例えばGaAs半導体素子を形成
する際に、安価でより大きな結晶が容易に得られるSi
基板上に、ヘテロエピタキシャル成長法によりGaAs
半導体結晶層を形成する方法が試みられ、またこの方法
により得られたGaAs半導体結晶層を用いて発光ダイ
オードなどの作製が試みられている。
[Prior Art] In recent years, for example, when forming GaAs semiconductor devices, Si
GaAs is grown on the substrate by heteroepitaxial growth.
A method of forming a semiconductor crystal layer has been attempted, and attempts have also been made to fabricate light emitting diodes and the like using the GaAs semiconductor crystal layer obtained by this method.

【0003】0003

【発明が解決しようとする課題】しかしながら、上述の
方法で得られた発光ダイオードの寿命は短くかつ発光強
度も弱い。
However, the life of the light emitting diode obtained by the above method is short and the luminous intensity is low.

【0004】その原因の主たるものは、GaAs半導体
結晶とSi半導体結晶基板の格子定数および熱膨張係数
の差異により、GaAs半導体結晶層内に発生した多数
の転位、およびその転位を素子の動作中に活性層に伝搬
・増殖させうる歪応力である。
The main reason for this is that a large number of dislocations occur in the GaAs semiconductor crystal layer due to the difference in lattice constant and thermal expansion coefficient between the GaAs semiconductor crystal and the Si semiconductor crystal substrate, and the dislocations occur during the operation of the device. This is strain stress that can propagate and multiply in the active layer.

【0005】本発明は、このエピタキシャル成長層の転
位密度および歪応力をより減少させ、さらに上部方向へ
の発光の取り出し効率も良好な特性の発光素子を得るた
めのものである。
The present invention aims to further reduce the dislocation density and strain stress of this epitaxially grown layer, and to obtain a light-emitting element with good characteristics in which the efficiency of extracting light in the upward direction is improved.

【0006】[0006]

【課題を解決するための手段】上記の課題を解決するた
めの本発明の発光素子は、半導体基板上に形成されたそ
の半導体基板の格子定数及び熱膨張係数と異なる格子定
数及び熱膨張係数を有する半導体層からなる発光素子に
おいて、その発光素子の発光領域に当たる部分を、前記
半導体基板面より離間した状態で対向するように形成し
、また発光素子の上部オーミック電極は、その電極下近
傍の発光領域が半導体基板に対して離間した状態で対向
するように発光素子の周囲部のみとし、中心部のみでそ
の発光素子と半導体基板が接合されているようにしたも
のである。
[Means for Solving the Problems] A light emitting device of the present invention for solving the above problems is formed on a semiconductor substrate and has a lattice constant and a coefficient of thermal expansion that are different from those of the semiconductor substrate. In a light-emitting element made of a semiconductor layer, the light-emitting region of the light-emitting element is formed so as to face the light-emitting region at a distance from the semiconductor substrate surface, and the upper ohmic electrode of the light-emitting element has a light-emitting region near the bottom of the light-emitting element. Only the peripheral portion of the light emitting element is provided so that the region faces the semiconductor substrate in a spaced manner, and the light emitting element and the semiconductor substrate are bonded only at the center portion.

【0007】[0007]

【作用】上述の本発明によれば、格子定数の差異により
境界面付近に多数存在する転位部分は除去され、境界面
付近からの転位の増殖を受けることなく発光領域内の転
位を減少させることができる。さらに熱膨張係数の差異
に基づく歪応力も緩和されるため、歪応力によりこの転
位部分が発光領域内に増殖・伝搬されることも軽減され
、素子の動作を妨げる転位や歪応力の少ない良好な特性
の発光素子が得られる。さらに上部方向への発光を考慮
した場合、電流が周囲部から中心部に向かって流れるた
め発光領域が電極直下から中心部に広がり電極により遮
光される割合が減少し、また発光領域下部がSi基板に
接していないので下部方向に放射された光が基板に吸収
されることなく半導体層−空気界面により効果的に上部
に反射され発光の取り出し効率も良好となる。
[Operation] According to the present invention described above, many dislocation portions existing near the interface due to the difference in lattice constant are removed, and dislocations in the light emitting region are reduced without multiplication of dislocations from near the interface. Can be done. Furthermore, since the strain stress caused by the difference in thermal expansion coefficients is alleviated, the propagation and propagation of these dislocations into the light emitting region due to strain stress is also reduced, resulting in a good structure with few dislocations and strain stress that impede the operation of the device. A light emitting element with characteristics can be obtained. Furthermore, when considering light emission in the upward direction, the current flows from the periphery to the center, so the light emitting area spreads from directly under the electrode to the center, and the proportion of light shielded by the electrode decreases. Since the substrate is not in contact with the semiconductor layer, the light emitted downward is effectively reflected upward by the semiconductor layer-air interface without being absorbed by the substrate, resulting in good emission efficiency.

【0008】[0008]

【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0009】まず図2に示すように250μm厚さのn
形Si基板1上に、従来公知の2段階成長法を用いて0
.2μm厚さのn形GaAs層2を形成する。その上に
、GaAsとの間においてエピタキシャル成長が可能で
あり、かつGaAsに対して選択エッチングが可能な、
例えばn形Al0.7Ga0.3Asの選択エッチング
層3を0.5μm形成する。その選択エッチング層3の
上に、従来公知のGaAs/AlGaAs系ダブルヘテ
ロ構造半導体結晶層(厚さ1.5μmのn形Al0.3
Ga0.7As層4、厚さ0.2μmのn形GaAs層
5、厚さ1.5μmのp形Al0.3Ga0.7As層
6からなる。)をエピタキシャル成長させる。さらにそ
の上に厚さ0.2μmのp形GaAs層7とSiO2層
8を形成する。
First, as shown in FIG. 2, a 250 μm thick n
0 on a Si substrate 1 using a conventionally known two-step growth method.
.. An n-type GaAs layer 2 having a thickness of 2 μm is formed. Furthermore, epitaxial growth is possible with GaAs, and selective etching is possible with respect to GaAs.
For example, a selective etching layer 3 of n-type Al0.7Ga0.3As is formed to a thickness of 0.5 μm. On the selective etching layer 3, a conventionally known GaAs/AlGaAs double heterostructure semiconductor crystal layer (1.5 μm thick n-type Al0.3
It consists of a Ga0.7As layer 4, an n-type GaAs layer 5 with a thickness of 0.2 μm, and a p-type Al0.3Ga0.7As layer 6 with a thickness of 1.5 μm. ) is epitaxially grown. Furthermore, a p-type GaAs layer 7 and a SiO2 layer 8 having a thickness of 0.2 μm are formed thereon.

【0010】次に、SiO2層表面より選択エッチング
層3に達する切溝9をエッチングにより環状に形成する
。しかる後に、その切溝9を利用し、AlGaAs系選
択エッチング液、例えばフッ化水素溶液を用いてAl0
.7Ga0.3As選択エッチング層3のみ、一部エッ
チングにより除去し、図3に平面図、図1に図3のA−
A′線における断面図を示すような、中央部のみSi基
板1と接合され、周囲が前記Si基板1より部分的に離
間した発光領域部を得る。この状態で公知の熱サイクル
アニールを行い離間された活性層内の転位を減少させる
。このような形状で部分的に離間されたGaAs発光領
域内付近の歪を計算機シミュレーションおよびフォトル
ミネッセンス測定により評価した結果、離間させる以前
と比べ半分以下に緩和されていることがわかった。また
転位については溶融KOHによるエッチピットを調べた
ところ数が減少しており特にエッジ近傍ではほとんど観
察されない領域が存在していることがわかった。
Next, an annular groove 9 is formed by etching that reaches the selective etching layer 3 from the surface of the SiO2 layer. After that, using the cut groove 9, Al0
.. Only the 7Ga0.3As selective etching layer 3 was partially removed by etching, and FIG. 3 is a plan view, and FIG.
As shown in the cross-sectional view taken along line A', a light-emitting region portion is obtained in which only the central portion is joined to the Si substrate 1 and the periphery is partially separated from the Si substrate 1. In this state, known thermal cycle annealing is performed to reduce dislocations in the separated active layers. As a result of evaluating the strain in the vicinity of the GaAs light emitting regions partially separated in such a shape by computer simulation and photoluminescence measurement, it was found that the strain was relaxed to less than half of that before the separation. Regarding dislocations, an examination of etch pits caused by molten KOH revealed that the number of dislocations had decreased, and that there were regions in which almost no dislocations were observed, especially near the edges.

【0011】最後にオーミック電極として、SiO2層
8の上面外周部にAu−Zn電極10を、そしてSi基
板1の下面にはAu−Sb電極11を蒸着しアロイを施
す。図3に示したように上面のオーミック電極は素子の
周囲部に形成され、それ以外のバット部等はSiO2に
よってオーミックが阻止されている。その後へき開等を
用いて素子分離を行い発光ダイオードを完成する。アニ
ールは電極形成後、オーミック電極に悪影響を与えない
範囲で行ってもよい。
Finally, as ohmic electrodes, an Au--Zn electrode 10 is deposited on the outer periphery of the upper surface of the SiO2 layer 8, and an Au--Sb electrode 11 is deposited on the lower surface of the Si substrate 1 to form an alloy. As shown in FIG. 3, the ohmic electrode on the top surface is formed around the periphery of the element, and the other butt parts and the like are blocked by SiO2. Thereafter, elements are separated using cleavage or the like to complete the light emitting diode. Annealing may be performed after electrode formation within a range that does not adversely affect the ohmic electrode.

【0012】0012

【発明の効果】本発明によれば、半導体基板上に、格子
定数および熱膨張係数が異なる半導体層を形成し発光素
子を作製する場合においても、転位密度が低くかつ歪応
力が少ない発光領域を有し、さらに発光の取り出し効率
が高い等の良好な特性の発光素子が得られるものである
According to the present invention, even when manufacturing a light emitting device by forming semiconductor layers having different lattice constants and coefficients of thermal expansion on a semiconductor substrate, a light emitting region with low dislocation density and low strain stress can be created. Furthermore, a light-emitting element with good characteristics such as high emission efficiency can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の実施例の発光素子の断面図FIG. 1 is a cross-sectional view of a light emitting device according to an embodiment of the present invention.

【図2】同
実施例の一製造工程における断面図
[Figure 2] Cross-sectional view of one manufacturing process of the same example

【図3】同実施例の
一製造工程における平面図
[Figure 3] Plan view of one manufacturing process of the same example

【符号の説明】[Explanation of symbols]

1    n形Si基板 2    n形GaAs層 3    n形Al0.7Ga0.3As選択エッチン
グ層4    n形Al0.3Ga0.7Asクラッド
層5    n形GaAs活性層 6    p形Al0.3Ga0.7Asクラッド層7
    p形GaAs層 8    SiO2層 9    エッチング溝部 10  Au−Zn電極 11  Au−Sb電極
1 n-type Si substrate 2 n-type GaAs layer 3 n-type Al0.7Ga0.3As selective etching layer 4 n-type Al0.3Ga0.7As cladding layer 5 n-type GaAs active layer 6 p-type Al0.3Ga0.7As cladding layer 7
P-type GaAs layer 8 SiO2 layer 9 Etching groove 10 Au-Zn electrode 11 Au-Sb electrode

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半導体基板上に形成されたその半導体基板
の格子定数及び熱膨張係数と異なる格子定数及び熱膨張
係数を有する半導体層に形成された発光素子であって、
前記半導体層と半導体基板の境界面を周囲より削除し、
上部オーミック電極は表面の周囲部のみとし、その電極
下近傍の発光領域となる部分が半導体基板より離間した
状態で対向するように形成されており、中心部のみ半導
体基板と接合されていることを特徴とする発光素子。
1. A light emitting element formed on a semiconductor layer formed on a semiconductor substrate and having a lattice constant and thermal expansion coefficient different from those of the semiconductor substrate, comprising:
removing the interface between the semiconductor layer and the semiconductor substrate from the surroundings;
The upper ohmic electrode has only the peripheral part of the surface, and the part near the bottom of the electrode that becomes the light emitting area is formed so as to face away from the semiconductor substrate, and only the center part is bonded to the semiconductor substrate. Characteristic light-emitting elements.
JP8698091A 1991-04-18 1991-04-18 Light emitting element Expired - Lifetime JP2938607B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8698091A JP2938607B2 (en) 1991-04-18 1991-04-18 Light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8698091A JP2938607B2 (en) 1991-04-18 1991-04-18 Light emitting element

Publications (2)

Publication Number Publication Date
JPH04320070A true JPH04320070A (en) 1992-11-10
JP2938607B2 JP2938607B2 (en) 1999-08-23

Family

ID=13902023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8698091A Expired - Lifetime JP2938607B2 (en) 1991-04-18 1991-04-18 Light emitting element

Country Status (1)

Country Link
JP (1) JP2938607B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000091632A (en) * 1998-09-14 2000-03-31 Hewlett Packard Co <Hp> Method for forming laminate structure with relaxed stress
JP2002076436A (en) * 2000-08-29 2002-03-15 Kyocera Corp Led array
KR100404416B1 (en) * 2001-07-06 2003-11-05 주식회사 옵토웨이퍼테크 LED and method of fabricating thereof
JP2009105451A (en) * 2009-02-09 2009-05-14 Oki Data Corp Laminate and method of manufacturing semiconductor device
US8716749B2 (en) 2009-08-17 2014-05-06 Samsung Electronics Co., Ltd. Substrate structures and methods of manufacturing the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000091632A (en) * 1998-09-14 2000-03-31 Hewlett Packard Co <Hp> Method for forming laminate structure with relaxed stress
JP2002076436A (en) * 2000-08-29 2002-03-15 Kyocera Corp Led array
KR100404416B1 (en) * 2001-07-06 2003-11-05 주식회사 옵토웨이퍼테크 LED and method of fabricating thereof
JP2009105451A (en) * 2009-02-09 2009-05-14 Oki Data Corp Laminate and method of manufacturing semiconductor device
US8716749B2 (en) 2009-08-17 2014-05-06 Samsung Electronics Co., Ltd. Substrate structures and methods of manufacturing the same

Also Published As

Publication number Publication date
JP2938607B2 (en) 1999-08-23

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