JPH04320044A - Semiconductor device, and method and apparatus for testing semiconductor device - Google Patents

Abstract

PURPOSE:To enable a simultaneous test of a plurality of chips on a semiconductor wafer to be conducted with fewer probes by using common lines for supplying source potential, ground potential, and drive signal to different chips. CONSTITUTION:Probes 36-40 of a probe card 31 of a tester are brought into contact with input pads 6-10 of one semiconductor chip 2 on a wafer 1. Source potential, ground potential, and drive signal supplied to the chip are also given to input pads 6-10 of other chips 3-5 on the wafer through nodes 45-49 and common lines 12-16. Test results are obtained at probes 41-43 in contact with the output pads 11 of chips 2-5.

Description

[Detailed description of the invention]

0001

[Field of Industrial Application] The present invention relates to a semiconductor device, a testing method thereof, and a testing device thereof, and in particular, a structure of a semiconductor device that can simultaneously test a plurality of semiconductor devices formed on the same wafer, and a testing method thereof. and probe cards for test equipment.

0002

2. Description of the Related Art Generally, in the manufacturing process of semiconductor integrated circuits (ICs), electrical characteristics of semiconductor devices formed on a semiconductor wafer are measured using a testing device called a wafer prober for IC testing. Figure 3 is an exploded perspective view of a conventional wafer prober in order to make it easier to understand. In particular, figure (a) shows the test head, figure (b) shows the probe card, and figure 3 (b) shows the test head. c) shows a part of the wafer. Further, FIG. 4 is a perspective view of the probe card seen from below, and FIG. 5 is a partially enlarged perspective view showing a state in which elongated conductive needles (hereinafter referred to as probe needles) are in contact with electrode pads on a wafer. It is a diagram. Further, FIG. 6 is a cross-sectional view showing a state in which a conventional wafer prober is used.

Next, the structure of a conventional wafer prober will be described with reference to FIGS. 3 to 6. In Figure 3, 5
Reference numeral 3 denotes a semiconductor wafer, which is divided into a semiconductor chip region 83 in which a large number of predetermined circuit elements are formed by scribe lines 82 provided vertically and horizontally on its surface 81, and a dicing section 85 located around this semiconductor chip region 83. The scribe line 8 located in the dicing section 85
By cutting 2, semiconductor chips can be cut out from the semiconductor wafer 53. Each semiconductor chip area 83 includes an LSI (Large Scale In
Electrode pads 8 for power supply, grounding, and signal input/output surround the circuit elements that make up the semiconductor device.
4 are provided in large numbers.

In the example shown in the figure, in order to test two semiconductor chips as a unit, the probe card 52 has a large number of probes facing each electrode pad 84 on two adjacent semiconductor chip areas 83. long and thin probe needle 71
is provided. This probe needle 71 is made of tungsten, chromium, tungsten-chromium alloy, etc.
As shown in FIG. 4, a probe card 5 made of an insulating material
2 with a ring member 72 made of resin,
Further, it is electrically connected to metal pattern wiring 73 provided on the front side of the probe card 52 by solder 74 or the like.

Here, the surface area of the electrode pad 84 that the probe needle 71 contacts is approximately 50 to 100 μmφ.
The outer diameter of the probe needle 71 connected to the probe card 52 side is approximately 200 to 300 μmφ. The metal pattern wiring 73 formed on the probe card 52 includes a metal pattern wiring 76 formed on the surface opposite to the surface to which the probe needle 71 is connected via the through hole 75.
electrically connected to. This metal pattern wiring 76
is electrically connected to a metal film 77 provided on the opposite surface and having a relatively large planar area.

FIG. 3B shows four through holes 75, four metal pattern wirings 76, and four metal films 77, and it is assumed that these are provided for each probe needle 71. Note that the probe card 52 is provided with an opening 78 for visually confirming that the probe needle 71 is in contact with the electrode pad 84.

The test head 51 shown in FIG. 3(a) is
The quality of LSIs is determined through functional operation tests that test whether logic circuits made of LSIs etc. operate normally, and DC tests that test whether a normal output voltage is maintained when a specified load is applied. This is the head of a test device (hereinafter referred to as an IC tester) for making a determination. Pogo pins 62 are provided around the opening 61 of the test head 51 so as to face each metal film 77 of the probe card 52.
In the figure, only a few pogo pins 62 are shown for simplicity. The pogo pin 62 is used to provide a test signal to the LSI and to receive a test result output signal from the LSI.

In FIG. 6, a wafer 53 is placed and fixed on a wafer chuck 54. As shown in FIG. Wafer chuck 5
4 is movable in three mutually orthogonal directions by a moving mechanism 55. The probe card 52 is fixed to the substrate fixing part 56 of the wafer prober, and the pogo pins 6 of the test head 51 are attached to the metal film 77 of the probe card 52.
2 are in crimp contact.

Next, a procedure for testing the electrical characteristics of a semiconductor device in a wafer state using the above-described wafer prober will be described. The wafer 84 is moved using the moving mechanism 55 to move each electrode pad 84 of any two semiconductor chip areas 83 in the wafer 53 fixed on the wafer chuck 54 and each probe needle fixed on the probe card 52. 71 are aligned so that they face each other and are in contact with each other. The probe needle 71 is moved to the electrode pad 8 by moving the wafer chuck 54 in the direction A shown in FIG.
Contact on the surface of 4.

A signal waveform applied to the LSI is formed by the test head 51 and outputted by the pogo pin 62. Since the pogo pin 62 is in pressure contact with the metal film 77 of the probe card 52, the signal from the test head 51 is passed through the metal pattern wiring 76 extending from the metal film 77, the through hole 75, and the metal pattern wiring 73, and soldered. The semiconductor chip area 8 is transmitted from the electrode pad 84 that is in pressure contact with the probe needle 71 to the attached probe needle 71 .
It is supplied to LSI in 3. The output signal from the LSI is applied to the test head 51 through a reverse path to that described above, and from the test head 51 to an IC tester (not shown). In this way, the electrical characteristics test of the LSI is performed.

[0011]

[Problem to be Solved by the Invention] Since the conventional semiconductor device, its testing method, and its testing apparatus are configured as described above, in order to simultaneously measure a large number of semiconductor chips, it is necessary to
Since it is necessary to increase the number of probe needles connected to the probe card according to the number of semiconductor chips, it is necessary to input signals from the test equipment to all semiconductor chips on the wafer, or to connect all the semiconductor chips on the wafer. There is a problem in that it becomes difficult to output from the chip to the test equipment, and the number of semiconductor chips that can be tested at the same time is limited to a few.

The present invention was made in order to solve the above-mentioned problems, and provides a semiconductor device, a test method therefor, and a test apparatus that can simultaneously test a larger number of semiconductor devices formed on the same wafer. The purpose is to obtain.

[0013]

[Means for Solving the Problems] A semiconductor device according to the present invention includes a semiconductor substrate having a predetermined circuit element formed on the surface thereof, and a semiconductor device formed on the surface of the semiconductor substrate that supplies a power supply potential and a ground potential as well as a signal. A plurality of pads for input and output, and a plurality of pads provided on the surface of the semiconductor substrate corresponding to these pads, electrically connected to the corresponding pads, and electrically disconnected during normal use. It is equipped with the following wiring.

[0014] Furthermore, in the semiconductor device testing method according to the present invention, a predetermined circuit element is formed on the surface, and a plurality of pads for supplying a power supply potential and a ground potential and for inputting and outputting signals are formed on the surface. In a semiconductor wafer having a plurality of semiconductor substrates, pads for supplying corresponding power supply potential and ground potential and pads for inputting signals formed on at least two or more semiconductor substrates are electrically connected to each other. , supplies a power supply potential and a ground potential to each of the electrically connected pads on one semiconductor substrate among the plurality of semiconductor substrates whose corresponding pads are electrically connected to each other, and drives the test drive. A test result is detected from each output pad of a plurality of semiconductor substrates in which a signal is supplied and corresponding pads are electrically connected to each other.

Further, in the semiconductor device testing apparatus according to the present invention, a predetermined circuit element is formed on the surface, and a plurality of pads are formed on the surface for supplying a power supply potential and a ground potential, and for inputting and outputting signals. A semiconductor wafer having a plurality of semiconductor substrates formed on at least two or more semiconductor substrates and having corresponding pads for supplying power supply potential and ground potential and pads for inputting signals electrically connected to each other. Supplying a power supply potential and a ground potential to each of the electrically connected pads on one semiconductor substrate of the plurality of semiconductor substrates in which corresponding pads are electrically connected, and driving for testing. Equipped with a plurality of probe needles for supplying signals and a plurality of probe needles for detecting test results from each output pad of a plurality of semiconductor substrates in which corresponding pads are electrically connected to each other. It is something.

[0016]

[Operation] Since the semiconductor device according to the present invention has the above structure, the power supply potential, ground potential, drive signal, etc. can be shared between the plurality of semiconductor devices formed on the same wafer through the above wiring, and the plurality of semiconductor devices can be tested all at once on semiconductor wafers in a short time.

Furthermore, since the semiconductor device testing method according to the present invention has the above configuration, one of the plurality of semiconductor substrates is
By simply supplying a power supply potential and a ground potential as well as drive signals to multiple electrically connected pads on one semiconductor substrate, the remaining semiconductor devices are similarly supplied, and the test results are transmitted. By detecting from each output pad of a plurality of semiconductor substrates, a plurality of semiconductor devices can be collectively tested in a short time in the state of a semiconductor wafer before being cut into individual semiconductor chips.

Further, since the semiconductor device testing apparatus according to the present invention has the above configuration, one of the plurality of semiconductor substrates is
For multiple pads formed on one semiconductor substrate,
The individual A plurality of semiconductor devices can be tested at once in the state of a semiconductor wafer before being cut into semiconductor chips.

[0019]

[Embodiment] FIG. 1(a) is a diagram for explaining a semiconductor device according to an embodiment of the present invention. In the figure, 1 is a semiconductor wafer, and a plurality of element regions 2a to 5a on the semiconductor wafer are provided with a plurality of elements. and input and output pads 6 to 11 are formed. Since it has a test circuit that inputs drive signals to these input pads 6 to 10 to self-test the elements formed within its own area and outputs the test results to the output pad 11, it is possible to check the state of the semiconductor wafer. It is now possible to test the elements within each element area. 2 to 5 are these element regions 2
This is a semiconductor device formed by cutting into individual semiconductor chips a to 5a and a dicing section 30 located around the element regions 2a to 5a cut by the scribe line. In this embodiment, the semiconductor wafer 1 has a plurality of common wiring lines 12 to 16 that interconnect input pads 6 to 10 that receive the same input signal for a plurality of element regions 2a to 5a thereon. . The input and output pads 6 to 6 of each element region 2a to 5a on the semiconductor wafer 1 having such a structure
11 and a probe needle of a probe card of a test device are brought into contact and electrically connected, thereby testing a semiconductor device.

[0020] This will be explained in detail below. Semiconductor devices 2 to 5
are all the same semiconductor devices and are formed on the same semiconductor wafer 1. There are input pads 6 to 10 on each semiconductor device.
are provided so that the common wirings 12, 7 and 13, 8 and 14, 9 and 15, and 10 and 16 formed in the input pad 6 and the dicing part 30 correspond to each other via the connecting parts 45 to 49, respectively. It is connected to the. In addition, input pads represented by the same reference numerals and corresponding to each other in each semiconductor device are commonly connected to each other via each common wiring, so that each semiconductor device 2 to 5
The power supply potential, ground potential, and drive signal are shared between them. In each of the semiconductor devices 2 to 5 having such a configuration, when the probe needle of the probe card of the test device is brought into contact with the input pads 6 to 10 of any semiconductor device 2 to input the power supply potential, ground potential, drive signal, etc. Connecting parts 45 to 49 of each wiring line to other semiconductor devices 3 via wiring lines 12 to 16.
-5 are also input, and the test results are detected as outputs from the respective output pads 11.

FIG. 2 is a diagram showing a semiconductor device according to an embodiment of the present invention, and is an enlarged view of an arbitrary semiconductor device 2 in FIG. 1(a). When exposing such a pattern on the semiconductor wafer 1, by using a stepper to expose the pattern in an array in the X and Y directions, it is possible to form the same signal line in common among each semiconductor device. Can be done. In the figure, input pads 6 to 10 corresponding to wirings 12 to 16
Links 18 to 22 are installed in the connecting parts 45 to 49 between the two, respectively, so that they can be separated by laser fusing. After dicing, by fusing the links 18 to 22 with a laser, the wirings 12 to 16 of each individual semiconductor device are separated from other conductors on the semiconductor wafer 1, thereby preventing malfunction of the semiconductor device. be able to.

FIG. 1(b) shows a probe card for collectively testing semiconductor devices fabricated on the semiconductor wafer 1 shown in FIG. 1(a). In the figure, a probe card 31 is compatible with a prober, and must be large enough to set probe needles for testing all the semiconductor devices formed on the semiconductor wafer 1 at once. Moreover, the dotted line portion 50 is the semiconductor wafer 1 shown in FIG.
The holes 32 in the probe card 31 correspond to the element areas 2a on the semiconductor wafer 1 shown in FIG. Probe needles 36 to 40 corresponding to the input pads 6 to 10 of the semiconductor device 2 on the semiconductor wafer 1 and probe needles 41 corresponding to the output pad 11 are set in this hole 32,
Such probe needles 36 to 40 are connected to input pads 6 to 10.
By simply contacting the semiconductor device 2 with the power supply potential, ground potential, and drive signal, the connecting portion 4 shown in FIG.
The signal is transmitted to the wirings 12 to 16 via lines 5 to 49, and is similarly supplied to the other semiconductor devices 3 to 5. In addition, the probe needles 42 to 44 provided in other slots 33 to 35 in the probe card 31 corresponding to the output pad 11 portion of each semiconductor device 3 to 5 on the semiconductor wafer 1 and the probe needle 41 in the 32 portion is brought into contact with the output pads 11 of all the semiconductor devices on the semiconductor wafer 1, and the output of the test result is detected.

In this embodiment, as described above, the semiconductor device includes a semiconductor substrate on which circuit elements are formed, and input pads 6 to 1.
0 and output pad 11 and corresponding input pad 6~
Wiring 1 to which 10 is connected via connecting parts 45 to 49
2 to 16, so when a plurality of such semiconductor devices are formed on the semiconductor wafer 1, the corresponding input pads of each semiconductor device are commonly connected through the wirings 12 to 16, and the power supply potential and ground Since potentials, drive signals, etc. are shared, during testing, by inputting the power supply potential, ground potential, drive signals, etc. to the input pads 6 to 11 of any semiconductor device 2 among the plurality of semiconductor devices 2 to 5, other semiconductor devices can be used. Semiconductor device 3~
5 as well, it is possible to test a plurality of semiconductor devices at once in the state of a semiconductor wafer before it is cut into individual semiconductor chips. In addition, by cutting the links 18 to 22 installed at the connecting portions 45 to 49 between the wirings 12 to 16 and the corresponding input pads 6 to 10 with a laser, the wiring 12 of the semiconductor device that has become a single unit after dicing is removed. ~
16 can be separated from other conductors on the semiconductor wafer 1, and erroneous operations can be prevented during normal use. In addition,
Since the wirings 12 to 16 that commonly connect the corresponding input pads of each semiconductor device are formed in a portion outside the element area of each semiconductor device, such as on the dicing section 30,
The chip area of each semiconductor device does not increase.

Furthermore, testing of the semiconductor device having the above configuration is performed on a plurality of input pads on any semiconductor device 2 among the plurality of semiconductor devices 2 to 5 in which corresponding input pads are electrically connected to each other. , by supplying a power supply potential and a ground potential, as well as supplying a drive signal, and detecting the test results from each output pad 11 of each semiconductor device.
By simply inputting the power supply potential, ground potential, drive signal, etc. to 10, the same can be supplied to the remaining semiconductor devices through the wirings 12 to 16, and the test results can be detected simultaneously from the output pads 11 of each semiconductor device. Multiple semiconductor devices can be tested at once on a semiconductor wafer before it is cut into individual semiconductor chips. Therefore, the time required to test a plurality of semiconductor devices can be significantly reduced.

Further, in this embodiment, as described above, in a test device for testing a plurality of semiconductor devices formed on a semiconductor wafer 1 and having electrode pads commonly connected to each other, a probe card 31 of the test device is provided with a probe card 31 of the test device. was given,
Probe needles 36 to 40 for supplying power supply potential and ground potential as well as drive signals to input pads 6 to 10 on any semiconductor device 2, respectively, and probe needles 36 to 40 for supplying drive signals to input pads 6 to 10 on any semiconductor device 2, and probe needles 36 to 40 for supplying drive signals to input pads 6 to 10 on an arbitrary semiconductor device 2; The same number of probe needles 41 as the output pads for detecting test results, respectively.
44, the input probe needles 36 to 40 can be connected to input pads 6 to 10 on any semiconductor device 2 by simply contacting them and supplying the power supply potential, ground potential, and drive signal. It can be similarly supplied to all other semiconductor devices on the same wafer 1 whose corresponding input pads are commonly connected, and the test results are sent to the probe needles 41 to 44 via the output pad 11 of each semiconductor device. It is possible to detect a plurality of semiconductor devices on the same wafer 1 at once with a small number of probe needles.

Note that in this embodiment, any semiconductor device 2 out of a plurality of semiconductor devices formed on the same wafer is
The input pads 6 to 11 provided thereon are supplied with a power supply potential, a ground potential, and a drive signal, respectively. The common wires 12 to 16 that commonly connect the input pads to be connected to each other are drawn out, and a new input pad is provided that is commonly connected to each input pad, and the power supply potential, ground potential, and drive signal are supplied from there. Good too. As a result, the power supply potential, the ground potential, and the drive signal can be supplied to any semiconductor device 2 without contacting the input probe needles 36 to 40, so that the alignment between the semiconductor wafer 1 and the probe card 31 is facilitated. Further, the probe needles to be provided in the portion 50 corresponding to the semiconductor devices 2 to 5 of the probe card 31 may be used only for detecting test results.

Further, in this embodiment, the wiring connected to the electrode pad on each semiconductor device can be formed anywhere on the semiconductor wafer 1 as long as it is not electrically connected to the wiring in the element region of the semiconductor device. Alternatively, at least a portion thereof may be located on the dicing portion 30, and in FIG. 1(a), it is formed on the dicing portion 30 existing around the element region between each semiconductor device. Also, the connecting portion 4 between the wirings 12 to 16 and the input pads 6 to 10
Although the links 18 to 22 are respectively provided in the links 5 to 49, any material and size may be used as long as the parts can be separated by laser fusing. Further, as a method of separating the wirings 12 to 16 from other conductors on the semiconductor wafer 1, instead of link fusing using a laser, electrical cutting may be used using a program or the like.

Furthermore, in the above embodiment, the number of semiconductor devices formed on the semiconductor wafer 1 was four, but any number may be used. Although the number is six, any number may be used, and the same effect can be achieved in that case as well. Furthermore, Figure 1(b)
), the semiconductor device 2 is shown as an arbitrary semiconductor device that supplies the power supply potential, ground potential, and drive signal from the probe card 31, but any of the other semiconductor devices 3, 4, and 5 may be used, and the same applies in that case. It has the effect of

[0029]

As described above, according to the present invention, there is provided a semiconductor substrate having a predetermined circuit element formed on the surface thereof, and a semiconductor substrate formed on the surface of the semiconductor substrate for supplying power supply potential and ground potential, inputting signals, and A plurality of pads for output and a plurality of wiring lines provided on the surface of a semiconductor substrate corresponding to these pads, electrically connected to the corresponding pads, and electrically disconnected during normal use. Since we have
In a plurality of semiconductor devices formed on a semiconductor wafer, corresponding input pads are commonly connected by wiring, and if power supply potential, ground potential, drive signal, etc. are supplied to any semiconductor device,
The wiring is also supplied to all other semiconductor devices in the same way,
This has the effect of allowing multiple semiconductor devices to be tested at once on a semiconductor wafer before it is cut into individual semiconductor chips.

Further, according to the present invention, the power supply potential, ground potential,
Since the drive signal is supplied and the test results are detected from the output pads of all semiconductor devices, it is possible to test multiple semiconductor devices at once on a semiconductor wafer before cutting into individual semiconductor chips. .

Further, according to the present invention, the probe card of the test equipment has probe needles for supplying power supply potential, ground potential, and drive signals to input pads on any semiconductor device, and a plurality of outputs on the semiconductor wafer. Since the configuration has the same number of probe needles as the output pads for detecting the test results from the respective pads, it is possible to test multiple semiconductor devices on the same wafer at once with a small number of probe needles. There is an effect that can be done.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a semiconductor device on a semiconductor wafer and a probe card for testing the wafer according to an embodiment of the present invention.

FIG. 2 is a diagram showing electrode pads and wiring of a semiconductor device formed on a semiconductor wafer according to an embodiment of the present invention.

FIG. 3 is a diagram showing a conventional wafer prober and a semiconductor device under test.

FIG. 4 is a perspective view of a probe card of a conventional wafer prober seen from below.

FIG. 5 is a partially enlarged view showing a state in which a probe needle of a conventional wafer prober is in contact with an electrode pad on a wafer.

FIG. 6 is a cross-sectional view showing how a conventional wafer prober is used.

[Explanation of symbols]

1 Semiconductor wafers 2 to 5 Semiconductor devices 2a to 5a Element regions 6 to 10 on the semiconductor wafer
Input pad 11 Output pads 12-16 Wiring 18-22 Link 30 Dicing section 31 Probe card 32 Portion corresponding to element area in probe card 33-35 Portion corresponding to output pad of semiconductor device in probe card 36-44 Probe needle 45 ~49 Connecting part

Claims (3)

[Claims] 1. A semiconductor substrate on which a predetermined circuit element is formed; a plurality of pads formed on the surface of the semiconductor substrate for supplying a power supply potential and a ground potential, and for inputting and outputting signals; Provided on the surface of the semiconductor substrate in correspondence with pads for supplying the power supply potential and ground potential and inputting signals, and electrically connected to the corresponding pads and electrically disconnected during normal use. What is claimed is: 1. A semiconductor device comprising: a plurality of wiring lines; 2. A semiconductor wafer having a plurality of semiconductor substrates on which predetermined circuit elements are formed, and on which a plurality of pads are formed for supplying a power supply potential and a ground potential, and for inputting and outputting signals. At least two or more corresponding pads for supplying power supply potential and ground potential and pads for inputting signals formed on at least two of the semiconductor substrates are electrically connected to each other, and the corresponding pads are electrically connected to each other. A power supply potential and a ground potential are respectively supplied to a plurality of electrically connected pads on one semiconductor substrate among a plurality of connected semiconductor substrates, and a driving signal for testing is also supplied, and the corresponding pads are connected to each other. 1. A method for testing a semiconductor device, comprising detecting a test result from each output pad of a plurality of semiconductor substrates electrically connected to each other. 3. A semiconductor substrate having a plurality of semiconductor substrates each having a predetermined circuit element formed thereon and a plurality of pads formed thereon for supplying a power supply potential and a ground potential and for inputting and outputting signals, and at least Corresponding pads formed on two or more semiconductor substrates for supplying power supply potential and ground potential and pads for inputting signals are electrically connected to each other, and corresponding pads on a semiconductor wafer are electrically connected to each other. a plurality of probe needles for supplying a power supply potential and a ground potential, respectively, to a plurality of electrically connected pads on one of the plurality of semiconductor substrates, and supplying drive signals for testing; and a plurality of probe needles for detecting test results from each of the output pads of a plurality of semiconductor substrates whose corresponding pads are electrically connected to each other. .