JPH04318973A - Thin film transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To form a polycrystalline silicon with high performance on a low melting point glass by preferentially orienting a crystal azimuth of the silicon in a direction {110}. CONSTITUTION:A polycrystalline silicon is formed by a plasma chemical vapor growing method. The formed silicon is patterned in a shape of a channel region 103, and an SiO2 film 104 of a gate insulating film is formed thereon. Then, metal to become a gate electrode 105 is formed as a film by sputtering, etc., and patterned. Thereafter, an SiO2 film 106 of an interlayer insulating film is formed, a contact hole is opened, metal of a wiring electrode is eventually formed as a film, patterned to a source electrode 106 and a drain electrode 107, thereby completing a thin film transistor. The transistor is formed of a film in which a crystal azimuth of the silicon is preferentially oriented in a direction {110}. Thus, an electric field mobility can be increased.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing thin film transistors, particularly polycrystalline silicon thin film transistors.

0002

2. Description of the Related Art Attempts are being made to create thin film transistors (TFTs) using microcrystalline or polycrystalline silicon (poly-Si) as an element material on low-melting glass. In particular, the practical application of a process for producing TFTs with high mobility and a high ON/OFF ratio at a maximum process temperature of 450° C. using a low melting point glass substrate such as Corning's 7059 substrate as a substrate is eagerly awaited.

Conventionally, in order to form a poly-Si film on a glass substrate, a low pressure CVD method is used to lower the substrate temperature to 600°C.
A method of thermally decomposing monosilane gas at a certain level is known. In addition, conventional methods for creating high-performance poly-Si TFTs include forming TFTs by forming poly-Si in which amorphous Si (a-Si) is made large in size by solid-phase growth; There is a method of melting and recrystallizing -Si or poly-Si by laser annealing to create a TFT.

0004

[Problem to be solved by the invention] However, low pressure CVD
Poly-Si produced by the method cannot use low-melting point glass as a substrate due to film-forming temperature requirements. In addition, even in the method of obtaining large grain size poly-Si by solid phase growth method, 60
Annealing must be performed at a temperature of about 0° C. for a long time of 4 to 70 hours, and low melting point glass cannot be used for the substrate. Laser annealing has problems such as variations in device characteristics due to non-uniform characteristics of the laser beam and low throughput.

[0005] For this reason, Japanese Patent Application Laid-Open No. 63-175417, Japanese Patent Application Publication No. 2-177368, Japanese Patent Application Publication No. 2-202018, Ma
terialsResearch Society S
Imposia Proceedings, Vol.
ume 95, p. 225 (1987), etc., by plasma chemical vapor deposition (PCVD),
A method that can produce polycrystalline silicon at low temperatures by glow discharge decomposition of a mixed gas of silane gas and an etching gas such as fluorine or fluorosilane is attracting attention.

Poly-S obtained by these film-forming methods
Since the i-thin film contains a halogen gas such as fluorine gas and a halide such as fluorosilane and dichlorosilane as an etching gas, the obtained poly-Si contains halogen atoms such as fluorine and chlorine as impurities. pol
When manufacturing a y-Si TFT, these impurities pose a major problem because they cause crystal defects and increase leakage current of the TFT.

[0007] The present invention solves the above problems.
The purpose is to create high-performance poly on low-melting glass.
- An object of the present invention is to provide a SiTFT and a method for manufacturing the same.

[0008]

[Means for Solving the Problems] A thin film transistor of the present invention uses polycrystalline silicon formed on an amorphous substrate as its main part, wherein the polycrystalline silicon has a preferential crystal orientation of {110} orientation. It is characterized by being oriented.

The method for manufacturing a thin film transistor of the present invention includes:
In the method for forming a thin film transistor on the amorphous substrate, the polycrystalline silicon is formed by plasma chemical vapor deposition.

0010

EXAMPLES The manufacturing method of the present invention will be described in detail below. The substrate used may be a substrate other than single crystal Si, such as a low melting point glass, a ceramic substrate, or a quartz substrate. If single crystal Si is used for the substrate, an epitaxial Si film can be obtained instead of poly-Si. In this example, a 7059 substrate manufactured by Corning was used. The substrate is not limited to a 7059 substrate, but may be any substrate that can withstand process temperatures up to about 450° C., such as a quartz substrate. First, a PC is placed on the board 100.
A source region 101 and a drain region 102 are formed by VD method.
Doped poly-Si thin film with 2000 to 300
A film with a thickness of 0 Å is formed. The film-forming gas used is silane gas diluted with hydrogen gas to which doping gas is added. For example, in the case of n-type poly-Si, phosphine, arsine, etc. are used as the doping gas, and p-type poly-Si
In this case, use diborane etc. In this example, phosphine was used for n-type, and diborane was used for p-type. The gas flow ratio is n-type, SiH4:H2:PH3=1.800
:98.191:0.009, p-type SiH4:H2:
B2H6=1.800:98.164:0.036. The total gas flow rate is 200 SCCM for both n-type and p-type. Using this film-forming gas, the channel poly-
Doped poly-
A film of Si was formed. The resulting doped poly-Si had a sheet resistance of 300 Ω/□ for n-type and 500 Ω/□ for p-type at a thickness of 3000 Å with a thickness of 2000 Å. After doped poly-Si film formation, source region 101
and patterning in the shape of the drain region 102 (FIG. 2-
(a)).

[0011] Next, the channel po
A ly-Si film is formed to a thickness of 200 to 1500 Å. poly-
As a PCVD apparatus for forming Si, a PED-302 model manufactured by Anelva Corporation having parallel plate electrodes was used. Below, po
The method for forming a ly-Si film will be described in detail. FIG. 1 shows a schematic diagram of the PCVD apparatus used in the present invention. 1 is a reaction chamber, 2
is an exhaust pipe, 3 is a counter electrode, 4 is a gas blowing hole, 5 is a gas introduction part, 6 is a high frequency application electrode, 7 is a substrate heating heater,
8 is a substrate, and 9 is a high frequency power source. W in FIG. 1 represents the distance between electrodes. The film forming gas contains SiH4, Si2H6, Si
A mixed gas of 3H8 etc. and H2 is used. In this example, S
A mixed gas of iH4 and H2 was used.

The basic reaction mechanism follows Formula 1 shown below. In the reaction of Formula 1, R1 is a film forming reaction and R2 is an etching reaction.

[0013]

[Formula 1] (n is a dimensionless number) In formula 1, as the hydrogen concentration increases, the reaction of R2 becomes dominant, so the Si-H bond with weak bond energy is selectively broken by the etching reaction of R2. . Therefore, only Si-Si bonds remain, and under these conditions, poly-Si bonds remain on the substrate.
is deposited. On the other hand, when the silane gas concentration increases, the film formation reaction of R1 in Equation 1 becomes dominant, and amorphous silicon (a-Si) with a high hydrogen concentration is formed on the substrate. Such a competitive relationship between R1 and R2 can be easily adjusted by changing the ratio of the silane gas concentration to the hydrogen gas concentration. Therefore, in order to form a poly-Si thin film, it is necessary to dilute the silane gas with a large flow of hydrogen gas and to make the silane concentration/hydrogen concentration ratio at least 0.1 or less.

When actually forming a poly-Si film, the silane/hydrogen gas concentration ratio is the gas flow rate ratio, SiH4/H2=
0.5-5.0%, especially 1.0-3.0% is desirable. If it is less than 0.5%, the etching reaction due to hydrogen gas becomes too dominant, the deposit rate becomes extremely small, and only poly-Si with a small particle size is formed. When it exceeds 5.0%, the film forming reaction becomes dominant and only a-Si is formed.

[0015] The pressure inside the reaction chamber is 0.1 to 10.0 Torr.
r is particularly preferably 0.3 to 1.5 Torr. The high frequency power for generating plasma has a power density of 0.01 to 5.
0W/cm2, preferably 0.03-0.06W/cm
Set it to 2. If it is less than 0.01 W/cm2, the etching reaction becomes too weak, and if it exceeds 5 W/cm2, the thin film will suffer plasma damage, making it impossible to form a high quality film. The substrate temperature is 100-450°C. Preferably 200℃~400℃
℃. When the substrate temperature is lower than 100°C, a-Si is formed, and when the substrate temperature is higher than 450°C, the 70°C film used in this example is formed.
59 The heat-resistant temperature of the substrate was exceeded, so low-temperature film formation PCVD was performed.
You will not be able to take advantage of the advantages of

An important condition for forming a poly-Si film is the distance between opposing electrodes (hereinafter referred to as interelectrode distance; W in FIG. 1) of the parallel plate type PCVD apparatus. In order for the etching reaction to proceed, the distance between the electrodes must be sufficiently short and hydrogen must reach the substrate in an active state. When the distance between the electrodes is long, the etching reaction occurs in the gas phase, and amorphous silicon is deposited on the substrate. Therefore, the distance W between the electrodes is
Defined by high frequency power and pressure. High frequency power is 0
．． 03 W/cm2 and the pressure is 1.2 Torr, the distance W between the electrodes is less than 45 mm, preferably 27 mm.
Hereinafter, it is more preferably 20 mm or less. In this example, W=20 mm. 1×10− before film formation
SiH4:H2 is placed in a reaction chamber with a vacuum of 6 Torr or less.
= 1.8:98.2 mixed gas with a total flow rate of 200SCCM
The internal pressure was adjusted to 1.2 Torr. After setting the substrate temperature to 230℃, wait approximately 2 hours until the substrate temperature stabilizes.
The film forming gas was allowed to flow for 0 minutes. Next, using a 13.56 MHz high frequency power source, a discharge power of 0.03 W/cm2 was used for 44
Discharge for about 10 minutes and deposit a silicon thin film on the 7059 substrate.
It was grown to 0 Å. In addition, conventionally in the PCVD method, a-S
Particles are generated during the formation of films such as i, and this has been a major cause of lowering the yield of TFT devices. However, since the manufacturing method of the present invention generates almost no particles, it has a great effect on improving the yield of TFT devices.

In the film forming method using the PCVD method of the present invention,
X-ray diffraction measurements revealed that even though the poly-Si film thickness was relatively thin at 1000 Å, the poly-Si film had an average crystal grain size of about 1000 Å. In addition, X-ray diffraction peaks in the (111) and (220) crystal orientations have been observed, and in particular, poly-Si thin films in which the (220) orientation is preferentially oriented have been obtained. Note that the "preferred orientation of (hkl) orientation" referred to here means that in the crystal orientation factor O(hkl) defined by Equation 2, O(hkl)>0
．． This is a case where the value is 5.

[0018]

[Chemical formula 2] O(hkl)=I(hkl)/ΣhklI
(hkl)
(Formula 2) where I(hkl) is {hkl}
The X-ray diffraction intensity from the surface is normalized by the sample film thickness and the X-ray scattering angle. That is, if the X-ray diffraction intensity from the {hkl} plane is i(hkl) and 2θ is the scattering angle, I
hkl is given by Equation 3.

[0019]

[Chemical formula 3] I(hkl)=i(hkl)/(1-exp(
−2 μt/sin θ)) (Formula 3) where μ is the reciprocal of the absorption coefficient of CuKα rays of silicon, and t is the film thickness.

When a halogen-based gas is used as an etching gas, it is known that polycrystalization begins when the film thickness exceeds 2500 Å, making it difficult to reduce the film thickness.However, according to the manufacturing method of the present invention, Since it is possible to make the poly-Si film thinner, it has a great effect when applied to TFTs.

The poly-Si thus formed is patterned into the shape of the channel region 103 (see FIG. 2-(b)).
)). Subsequently, a gate insulating film of SiO2104 is formed thereon to a thickness of about 500 to 1500 Å (FIG. 2-(c)). The film forming method is the magnetron sputtering method in an Ar+O2 mixed gas atmosphere.
It is preferable because it can be obtained at a low temperature of about 0°C. The mixing ratio of Ar and O2 is preferably about O2/(Ar+O2)=0.3. High quality SiO2 can also be obtained at low temperatures using the electron cyclotron resonance plasma CVD method. Also, the gate insulating film is P
A silicon nitride film formed by CVD may also be used.

Next, the gate electrode 105 is made of Cr, Mo.
/Ta, Al, and other metals at a temperature of about room temperature to 300°C,
A film is formed and patterned by sputtering or the like (FIG. 2-(d)). The gate electrode is made of doped poly-Si by PCVD method.
But it's okay. Next, the interlayer insulating film of SiO2106 is deposited at about 50%
A film with a thickness of 00 to 8000 Å is formed (FIG. 2-(e)). A contact hole is made, and finally a metal (Al, etc.) for the wiring electrode is deposited to a thickness of approximately 7000 Å, and the source electrode 106 and drain electrode 107 are patterned to complete the TFT (Figure 2-
(f)).

The field effect mobility μ of the poly-Si TFT of the present invention was 40 cm 2 /Vs for n-channel and 20 cm 2 /Vs for p-channel. On the other hand, when the crystal orientation rate of {110} direction is less than 50% and the average crystal grain size is 1000
The μ of a conventional poly-Si TFT of approximately Å is 15 cm 2 /Vs for n-channel and 10 cm 2 /Vs for p-channel. By aligning the crystal orientation to {110} direction, T
The mobility of FT can be increased.

[0024]

Effects of the Invention When a TFT is fabricated using a film in which the crystal orientation of poly-Si is preferentially oriented in the {110} direction as in this embodiment, the field effect mobility of the TFT can be increased. Further, since the etching gas used in forming the poly-Si film is hydrogen, there is no fear that halogen atoms, which have a negative effect on TFT characteristics, will be mixed into the film. In addition, poly-Si obtained by conventional LPCVD methods, solid phase growth methods, laser annealing methods, etc. has the problem of deteriorating electrical properties due to dangling bonds at the grain boundaries. In order to do this, after forming a poly-Si film, it was necessary to passivate the dangling bonds using a method such as hydrogen plasma. However, since the poly-Si thin film formed by the method of the present invention is already exposed to hydrogen plasma during film formation, it has the advantage that it is not necessary to perform hydrogen passivation afterwards.

As described above, the present invention is applicable to liquid crystal panels that require large size and high definition, contact type image sensors with built-in drive circuits, load elements for highly integrated SRAMs of 4 Mbits or more,
It is highly effective for application to general semiconductor devices such as ICs, LSIs, and three-dimensional SOI devices.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram of the PCVD apparatus used in the present invention.

FIG. 2 is a process diagram showing the manufacturing process of the thin film transistor of the present invention.

[Explanation of symbols]

1……Reaction chamber 2...Exhaust pipe 3……Counter electrode 4...Gas blowout hole 5...Gas introduction part 6...High frequency application electrode 7...Substrate heater 8......Substrate 9……High frequency power supply 100……Substrate 101……Source area 102……Drain area 103……Channel area 104...Gate insulating film 105……Gate electrode 106……Interlayer insulation film 107... Source electrode 108...Drain electrode

Claims (5)

[Claims] 1. A thin film transistor using polycrystalline silicon formed on an amorphous substrate as its main part, characterized in that the polycrystalline silicon has a preferential crystal orientation of {110} orientation. Thin film transistor. 2. A method of manufacturing a thin film transistor on the amorphous substrate, wherein the polycrystalline silicon is formed by plasma chemical vapor deposition. 3. The method for manufacturing a thin film transistor according to claim 2, wherein the temperature in the entire process is 450° C. or lower. 4. The method of manufacturing a thin film transistor according to claim 2, wherein the channel region of the thin film transistor is formed by plasma chemical vapor deposition. 5. The method of manufacturing a thin film transistor according to claim 2, wherein the source and drain regions of the thin film transistor are formed by plasma chemical vapor deposition.