JPH04318595A - Liquid crystal panel driving device - Google Patents

Abstract

PURPOSE:To provide the liquid crystal panel driving device, which drives a liquid crystal panel for display operation (m) times on a time-division basis in one frame with the same image data by increasing a frame frequency by (m) times (m=2, 3...), to speedily follow up even an image which changes abruptly without spoiling the display quality by increasing the response speed of variation. CONSTITUTION:The liquid crystal panel driving device is equipped with two image memories 11 and 12 stored with display digital image data, frame by frame, alternately and data converting circuits 14 and 15 which change and output the contents of the same data at each of (m) times according to the variation of image data of one frame read out of those two image memories and the liquid crystal panel is driven for display according to the image data outputted by the data converting circuits 14 and 15 to make the rise or fall of the light transmittance of the liquid crystal panel corresponding to the variation of the image data steep.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal panel driving device for driving a liquid crystal panel used in, for example, a liquid crystal television.

0002

[Prior Art] Conventionally, as a liquid crystal panel driving device for driving a liquid crystal panel used in, for example, a liquid crystal television, the conventional method is as shown in FIG.
A circuit with the configuration shown in was used. In the figure, when a composite video signal with an intermediate frequency is input to the sync separation circuit 1, the sync separation circuit 1 sync-separates them to obtain a video signal, a horizontal sync signal, and a vertical sync signal, and converts the video signal into an A/ The D converter 3 outputs both synchronization signals to the controller 2, respectively. This controller 2 creates various timing signals from the horizontal synchronization signal and vertical synchronization signal, and outputs them to the A/D converter 3, display RAM 4, segment drive circuit 5, and common drive circuit 6.

The A/D converter 3 converts the video signal into several bits of digital data in synchronization with the sampling clock from the controller 2, and outputs it to the RAM 4. The RAM 4 is a dual-port memory that can store one frame worth of video (image) signals, and operates according to the memory address and write/read instructions given from the controller 2. The video signals are sequentially stored and output to the segment drive circuit 5. The segment drive circuit 5 reproduces grayscale signals according to data from the RAM 4, creates segment electrode drive signals based on the grayscale signals, and displays segment electrodes on a liquid crystal (LCD) panel 7 using a simple matrix drive method. drive Further, the common drive circuit 6 creates a common electrode drive signal according to the timing signal from the controller 2, and sequentially and selectively drives the common electrodes of the liquid crystal panel 7.

When the liquid crystal panel 7 is constructed of an STN (super twisted nematic) liquid crystal panel, contrast can be improved by using a time-division driving method that increases the frame frequency. The driving state in this case will be explained with reference to FIG. FIG. 6 shows a part of FIG. 5, in which the same data of the video signal stored in the RAM 4 is read out to the segment drive circuit 5 m times at a time by commands from the controller 2.

[0005]

[Problems to be Solved by the Invention] The liquid crystal panel 7 is driven in response to the input video signal as described above, but since the liquid crystal panel 7 operates based on the cumulative response effect, it does not respond well to changes in gradation. It has the property of being slow. Although it is possible to improve the contrast by driving the liquid crystal panel 7 by multiplying the frame frequency by m using the above-mentioned time-division driving, it is not possible to improve the response speed to gradation changes. The problem was that it could not handle moving images.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to reduce gradation changes when display driving a simple matrix liquid crystal panel by increasing the frame frequency by time-division driving. An object of the present invention is to provide a liquid crystal panel driving device that can also improve response speed.

[0007]

[Means and operations for solving the problems] That is, the present invention provides two image memories that store display image data in units of one frame, and one frame worth of images read from each of these two image memories. and a data conversion circuit that changes and outputs drive data m times (m=2, 3,...) for the same image data according to changes in data, and displays a liquid crystal display based on the image data output from this data conversion circuit. It is designed to drive the display of the panel.
It is possible to make the rise or fall of the light transmittance steeper in response to changes in image data, increase the response speed of changes, and quickly follow rapidly changing images without compromising display quality. can.

[0008] In the specification of this application, the term "frame" refers to a period during which all picture elements constituting one screen are scanned, and for example, picture elements constituting one screen are scanned for each field of a television signal. In a display device that performs display by scanning everything in one pass, one field of a television signal and one frame referred to in this application are considered to be equivalent, and do not necessarily correspond to a "frame" generally used in television signals.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows its circuit configuration, and the same parts as shown in FIG. 6 are given the same reference numerals and their explanation will be omitted. As shown in FIG. 1, digital image data obtained by the A/D converter 3 is output to a first RAM 11 and a second RAM 12. The first RAM 11 and the second
The RAMs 12 are dual-port memories each having a storage capacity of two frames, and operate according to memory addresses and write/read commands given from the controller 13.
Bit image data is sequentially and alternately stored for each frame. Then, these first RAM 11 and second RA
The image data written in the storage area on the side where the data of each M12 is not being written is simultaneously read out to the multiplexer 14 by a command from the controller 13 at a frequency that is m times the frame frequency (m=2, 3, . . . ). Ru.

The multiplexer 14 is connected to the controller 13
The first RAM 11 and the second
Of the two image data from the RAM 12 of , one of the two images written two frames ago is written to the "Old" side,
The other one written at the timing one frame before is “Ne”.
w'' side and output to the data conversion circuit 15. Details of this data conversion circuit 15 are shown in FIG. The broken line in the figure indicates the data conversion circuit 15, and the ROM 2 is inside.
2 and a latch 23. In the ROM22, "Old" side image data is stored in A0 to A2, and "Old" side image data is stored in A0 to A2.
The "New" side image data is inputted to A6 from the multiplexer 14, and the mode signal d is inputted from the controller 13 to A6. Further, the timing signal t is inputted to the latch 23 from the controller 13 .

Further, the ROM 22 is configured as shown in FIG. In other words, “Old
” side image data and “New” input in A3 to A5
Data to be output is stored for each mode corresponding to the side image data. (Blank columns are omitted.) When the data conversion circuit 15 receives image data on the "Old" side and image data on the "New" side from the multiplexer 14, it outputs the data based on the contents. The image data is determined according to the contents of the ROM 22 corresponding to a mode to be described later, and sent as D0 and D1 to the latch 23, and output to the segment drive circuit 5 in accordance with the timing signal t.

[0013] In the above configuration, for example, A/D
The image data output by the converter 3 is 3 bits indicating gradations from "0" to "7", and the liquid crystal panel 7 of the segment drive circuit 5
(not shown) is set to 2 bits from 0 to 3, the frame frequency is doubled (m=2), and the segment drive circuit 5 drives each segment electrode of the liquid crystal panel 7 during one frame. The data conversion contents of the data conversion circuit 15 when the display is driven twice will be described below with reference to the segment drive waveforms in FIG.

[0014] Now, the image data on the "Old" side is "0(
=000)", the image data on the "New" side is "4 (=0
10)", the conventional method of simply increasing the frame frequency by m to improve the contrast would be "O
"New" without considering the image data on the "ld" side at all.
The segment drive circuit 5 is activated only by the image data “4” on the side.
As data P (p1, p2) for two times, (2, 2
) was supplied as shown in FIG. 4(1).

[0015] Here, considering P=p1 +p2, the numerical value "2" corresponding to p1 and p2 does not directly indicate the display of image data "2" but displays image data "4". Therefore, the value for each time is "2"
This shows that.

However, in the present invention, the image data on the "Old" side is "0" and the image data on the "New" side is "4".
For example, the data conversion circuit 15 takes into account both Pa and Pa.
(mode 1) = (3, 3), Pb (mode 2) = (3,
Either data Pa or Pb as shown in 2) is supplied to the segment drive circuit 5, and the segments are driven as shown in FIGS. 4(2) and 4(3), respectively. In this case, the data Pa is “
It is determined that the image data content on the "Old" side and the "New" side is changing to a higher value, and the actual "New" image data is changed to make the rise of the light transmittance of the liquid crystal panel 7 more steep. A value larger than the side image data “4” “(
3+3=)6'' is supplied to the segment drive circuit 5. Similarly, the data Pb is the actual image data on the "New" side, so as to make the rise of the light transmittance of the liquid crystal panel 7 more steep, but not to deviate greatly from the original data and deteriorate the display quality. Section p starting from "4"
A value "(3+2=)5" in which only 1 is increased is supplied to the segment drive circuit 5.

Similarly, image data "5" on the "Old" side
, when the image data on the "New" side is "2", conventionally the data (1, 1) was supplied to the segment drive circuit 5 only by the image data "2" on the "New" side, but here Then, either data Pa or Pb such as Pa=(0,0) and Pb=(0,1) is supplied to the segment drive circuit 5. In this case, the data Pa determines that the data content is changing to a lower one depending on the content of the image data on the "Old" side and the "New" side, and makes the fall of the light transmittance of the liquid crystal panel 7 more steep. In order to make the actual “Ne”
The value smaller than the image data “2” on the “w” side is “(0+0=)
0'' to the segment drive circuit 5. In addition, the data Pb is set to the actual "N
The value ``(0+1=)1'', which is obtained by reducing only the first section p1 from the image data ``2'' on the ``ew'' side, is supplied to the segment drive circuit 5.

[0018] Furthermore, the above-mentioned mode is based on the surrounding environment,
For example, the controller 13 may issue an instruction to the data conversion circuit 15 using information from a temperature sensor (not shown), or the user may issue an instruction to the data conversion circuit 15 via the controller 13 using a switch (not shown). The optimal image can be displayed by giving instructions.

In this way, the multiplexer 14
After rearranging the image data on the ``d'' side and the ``New'' side, the data conversion circuit 15 divides the contents of the data to be time-divisionally driven on the liquid crystal panel 7 into 1 according to the direction and magnitude of the change in the contents.
The LCD panel 7 can be changed within the frame, and within a range that does not significantly deviate from the original data content and impair display quality.
to make the rise or fall of the light transmittance more steep,
It is possible to quickly respond to changes in gradation and display fast-moving images.

[0020]

As described in detail above, according to the present invention, there are two image memories that store display image data in units of one frame, and one frame worth of images read from each of these two image memories. and a data conversion circuit that changes and outputs drive data m times (m=2, 3,...) for the same image data according to changes in data, and displays a liquid crystal display based on the image data output from this data conversion circuit. Since the panel is driven for display, the rise or fall of its light transmittance becomes steeper in response to changes in image data, increasing the response speed of changes, allowing images to change rapidly without sacrificing display quality. It is possible to provide a liquid crystal panel driving device that can quickly follow the current conditions.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a circuit configuration of an embodiment of the present invention.

FIG. 2 is a diagram showing details of the data conversion circuit of FIG. 1;

FIG. 3 is a diagram showing details of the ROM in FIG. 2;

FIG. 4 is a diagram showing a comparison of segment waveforms between a conventional example and an embodiment of the present invention.

FIG. 5 is a block diagram showing the overall circuit configuration of a conventional liquid crystal panel driving device.

FIG. 6 is a block diagram showing a segment signal system processing circuit, which will be explained with a part of FIG. 5;

[Explanation of symbols]

1... Synchronous separation circuit, 2, 13... Controller, 3... A/
D converter, 4...RAM, 5...segment drive circuit, 6...
Common drive circuit, 7...Liquid crystal panel, 11...First RAM
, 12...Second RAM, 14...Multiplexer, 15
...Data conversion circuit.

Claims (1)

[Claims] 1. Two image memories that store display image data in units of one frame; and m times ( m=2,
3,...); and a driving means for driving a liquid crystal display panel for display based on the image data output from the data converting means. Panel drive device.