JPH04307964A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

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Publication number
JPH04307964A
JPH04307964A JP10035991A JP10035991A JPH04307964A JP H04307964 A JPH04307964 A JP H04307964A JP 10035991 A JP10035991 A JP 10035991A JP 10035991 A JP10035991 A JP 10035991A JP H04307964 A JPH04307964 A JP H04307964A
Authority
JP
Japan
Prior art keywords
circuit
temperature
circuits
voltage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10035991A
Other languages
Japanese (ja)
Inventor
Manabu Tsunosaki
角崎 学
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10035991A priority Critical patent/JPH04307964A/en
Publication of JPH04307964A publication Critical patent/JPH04307964A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To enable the design fully utilizing performance of an integrated circuit to improve the operation margin of a circuit for a wide range of temperature by selecting only one circuit from a plurality of reference voltage generating circuits depending on the signal from a temperature detecting circuit. CONSTITUTION:When ambient temperature is lower than the predetermined temperature T1, an output voltage of temperature detecting circuits 1a, 1b becomes lower than a threshold voltage of Schmitt trigger circuits 31a, 31b. As a result, only an output of an AND gate G1 becomes high level, a power supply voltage Vout which is equal to a voltage V1 generated by a reference voltage generating circuit 2a is supplied to a buffer circuit 4 and internal circuits 5 are driven by the lowest voltage. Meanwhile, when the ambient temperature is higher than the temperature T1 and is lower than the temperature T2, only output of gate G2 becomes high level and the circuit 5 is driven by an intermediate voltage. When the ambient temperature becomes higher than the temperature T2, only output of gate G3 becomes low level and the circuit 5 is driven by the highest voltage.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、半導体集積回路技術さ
らには回路特性の温度依存に対する対策に適用して特に
有効な技術に関し、例えば論理集積回路の電源電圧供給
方式に利用して有効な技術に関する。
[Industrial Application Field] The present invention relates to semiconductor integrated circuit technology and to technology that is particularly effective when applied to countermeasures against temperature dependence of circuit characteristics, such as technology that is effective when applied to power supply voltage supply systems for logic integrated circuits. Regarding.

【0002】0002

【従来の技術】半導体集積回路はその使用環境特に温度
によって特性が変化する。従来、半導体集積回路の特性
の温度依存性に関しては、低温側と高温側それぞれにつ
いて最悪条件を設定し、その条件の下でも正しく動作す
るように設計したり、リニア集積回路では温度補償回路
を設けることで対処していた(朝倉書店1981年6月
発行、「集積回路応用ハンドブック」第118頁;オー
ム社、1984年11月発行、電子通信学会編「LSI
ハンドブック」第611頁参照)。
2. Description of the Related Art The characteristics of semiconductor integrated circuits change depending on the environment in which they are used, particularly the temperature. Conventionally, regarding the temperature dependence of the characteristics of semiconductor integrated circuits, the worst-case conditions have been set for both the low-temperature side and the high-temperature side, and the design has been designed to operate correctly under those conditions, or a temperature compensation circuit has been provided for linear integrated circuits. (Asakura Shoten, June 1981, "Integrated Circuit Application Handbook," p. 118; Ohmsha, November 1984, edited by the Institute of Electronics and Communication Engineers, "LSI
(Refer to page 611 of ``Handbook.'')

【0003】0003

【発明が解決しようとする課題】従来、半導体論理集積
回路の設計においては、温度に対する信頼性の面での配
慮はなされているものの、性能面での配慮がなされてい
なかった。例えば、動作速度に関しては高温側のワース
ト条件を考慮した設計が行なわれており、完成品に対し
ては高温側での測定速度をスペックとして保証している
にすぎなかった。そのため、実際に使用される低温側で
はスペックとして保証される動作速度よりも速い速度で
の実動作が可能であるにもかかわらず、それよりも遅い
速度で動作するものとしてシステムの設計をなさざるを
得ないので、集積回路の性能を充分に活かした設計が行
なわれていなかった。また、使用環境の温度によって回
路の動作速度が変化するため、スペックぎりぎりでシス
テムを構成しておくと、温度が上昇したときに回路の動
作マージンが低下するという問題点があった。
Conventionally, in the design of semiconductor logic integrated circuits, consideration has been given to reliability against temperature, but no consideration has been given to performance. For example, with regard to operating speed, the design takes into consideration the worst conditions on the high temperature side, and for finished products, the measurement speed on the high temperature side is only guaranteed as a specification. Therefore, even though it is possible to actually operate at a faster speed than the specified operating speed guaranteed at the low temperatures where it is actually used, the system has to be designed to operate at a slower speed. As a result, designs that take full advantage of the performance of integrated circuits have not been carried out. Furthermore, since the operating speed of the circuit changes depending on the temperature of the environment in which it is used, there is a problem in that if the system is configured to the limit of the specifications, the operating margin of the circuit will decrease when the temperature rises.

【0004】本発明の目的は、集積回路の性能を充分に
活かした設計を可能にするとともに、幅広い温度に対し
て回路の動作マージンを向上させることにある。この発
明の前記ならびにそのほかの目的と新規な特徴について
は、本明細書の記述および添附図面から明らかになるで
あろう。
An object of the present invention is to enable a design that fully utilizes the performance of an integrated circuit, and to improve the operating margin of the circuit over a wide range of temperatures. The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

【0005】[0005]

【課題を解決するための手段】本願において開示される
発明のうち代表的なものの概要を説明すれば、下記のと
おりである。すなわち、例えば温度検出回路と、互いに
発生する電圧の異なる複数の基準電圧発生回路と、上記
温度検出回路からの信号に基づいて上記複数の基準電圧
発生回路のうち一つを選択する信号を形成する制御回路
とを設けるようにしたものである。
[Means for Solving the Problems] Representative inventions disclosed in this application will be summarized as follows. That is, for example, a temperature detection circuit, a plurality of reference voltage generation circuits generating different voltages from each other, and a signal for selecting one of the plurality of reference voltage generation circuits based on a signal from the temperature detection circuit are formed. A control circuit is also provided.

【0006】[0006]

【作用】上記した手段によれば、集積回路の使用環境の
温度に応じて自動的に最適な基準電圧回路が選択される
ため、集積回路の性能を充分に活かした設計が可能にな
るとともに、幅広い温度に対して回路の動作マージンを
向上させるという上記目的を達成することができる。
[Operation] According to the above-described means, since the optimum reference voltage circuit is automatically selected according to the temperature of the environment in which the integrated circuit is used, it is possible to design a circuit that fully utilizes the performance of the integrated circuit. The above objective of improving the operating margin of the circuit over a wide range of temperatures can be achieved.

【0007】[0007]

【実施例】図1には、本発明に係る半導体集積回路の一
実施例が示されている。図1において、1a,1bは温
度検出回路、2a,2b,2cはそれぞれ発生する電圧
が異なるように設計された基準電圧発生回路、3は上記
温度検出回路1a,1bからの信号に基づいて上記基準
電圧発生回路2a,2b,2cのうち一つの発生電圧を
選択するための制御回路、4は上記基準電圧発生回路2
a,2b,2cのうちのいずれかの発生電圧を受けて同
一の電圧を内部回路5に低インピーダンスで供給する例
えばボルテージフォロワもしくは電源電圧発生回路から
なるバッファ回路である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of a semiconductor integrated circuit according to the present invention. In FIG. 1, 1a and 1b are temperature detection circuits, 2a, 2b, and 2c are reference voltage generation circuits designed to generate different voltages, and 3 is a reference voltage generation circuit designed to generate different voltages. A control circuit for selecting one of the generated voltages among the reference voltage generation circuits 2a, 2b, and 2c; 4 is the reference voltage generation circuit 2;
The buffer circuit is, for example, a voltage follower or a power supply voltage generation circuit, which receives the generated voltage from one of the voltages a, 2b, and 2c and supplies the same voltage to the internal circuit 5 at low impedance.

【0008】上記基準電圧発生回路2a,2b,2cの
発生電圧V1,V2,V3は、上記制御回路3によって
オン、オフ制御されるスイッチS1,S2,S3を介し
ていずれか一つがバッファ回路4に供給されるように構
成されている。上記温度検出回路1a,1bは、互いに
逆向きに並列接続された一対のダイオードD1,D2と
、このダイオードD1,D2と直列に接続された抵抗R
1またはR2とからなり、両者の接続ノードを出力ノー
ドN1,N2とする温度センサで、R1>R2となるよ
うに設定される。これによって、同一大きさの貫通電流
が流されたときに出力ノードN1,N2の電位V1,V
2が、V1>V2となるように構成されている。
The voltages V1, V2, V3 generated by the reference voltage generating circuits 2a, 2b, 2c are connected to the buffer circuit 4 via switches S1, S2, S3 which are controlled on and off by the control circuit 3. is configured to be supplied to The temperature detection circuits 1a and 1b include a pair of diodes D1 and D2 connected in parallel in opposite directions, and a resistor R connected in series with the diodes D1 and D2.
1 or R2, and the connection nodes between the two are output nodes N1 and N2, and are set so that R1>R2. As a result, when the same magnitude of through current is caused to flow, the potentials V1 and V of the output nodes N1 and N2 are
2 is configured such that V1>V2.

【0009】上記制御回路3は、シュミットトリガ回路
のようなヒステリシス回路31a,31bと、その出力
信号を受けるインバータ33a,33bと、ヒステリシ
ス回路31a,31bおよびインバータ33a,33b
の出力信号を入力信号とし、スイッチS1,S2,S3
のいずれか一つをオンさせる選択信号C1,C2,C3
を形成するANDゲートG1,G2,G3とによって構
成されている。
The control circuit 3 includes hysteresis circuits 31a and 31b such as Schmitt trigger circuits, inverters 33a and 33b that receive output signals from the hysteresis circuits 31a and 31b, and hysteresis circuits 31a and 31b and inverters 33a and 33b.
The output signal of is used as the input signal, and the switches S1, S2, S3
Selection signal C1, C2, C3 that turns on any one of
It is constituted by AND gates G1, G2, and G3 forming a .

【0010】この実施例では、温度検出回路1a,1b
内のダイオードD1,D2の特性の温度依存性が他の素
子(抵抗やトランジスタ)に比べて顕著であり、周囲温
度が高くなるほどダイオードD1,D2を流れる電流が
多くなる。そのため、周囲温度がある所定の温度T1よ
りも低いときは、温度検出回路1a,1bの出力電圧が
ともにシュミットトリガ回路31a,31bのしきい値
電圧よりも低くなり、これによってシュミットトリガ回
路31a,31bの出力がともにハイレベルにされる。 その結果、ANDゲートG1の出力のみハイレベルにさ
れて、基準電圧発生回路2aの発生電圧V1と同一の電
源電圧Voutがバッファ回路4に供給され、内部回路
5は最も低い電圧で駆動される。
In this embodiment, temperature detection circuits 1a and 1b
The temperature dependence of the characteristics of the diodes D1 and D2 is more remarkable than that of other elements (resistors and transistors), and the higher the ambient temperature, the more current flows through the diodes D1 and D2. Therefore, when the ambient temperature is lower than a certain predetermined temperature T1, the output voltages of the temperature detection circuits 1a and 1b are both lower than the threshold voltages of the Schmitt trigger circuits 31a and 31b, and this causes the Schmitt trigger circuits 31a and 31b to have lower threshold voltages. Both outputs of 31b are set to high level. As a result, only the output of the AND gate G1 is set to high level, the power supply voltage Vout which is the same as the voltage V1 generated by the reference voltage generation circuit 2a is supplied to the buffer circuit 4, and the internal circuit 5 is driven at the lowest voltage.

【0011】一方、周囲温度がある所定の温度T1より
も高くなると(ただしT2よりも低い)、温度検出回路
1a,1bの出力電圧がともに上昇して先ず温度検出回
路1aの出力のみがシュミットトリガ回路31a,31
bのしきい値電圧よりも高くなり、これによってシュミ
ットトリガ回路31aの出力がロウレベル(シュミット
トリガ回路31bの出力はハイレベルのまま)にされる
。その結果、ANDゲートG2の出力のみハイレベルに
されて、基準電圧発生回路2bの発生電圧V2がバッフ
ァ回路4に供給され、内部回路5は中間の電圧で駆動さ
れる。
On the other hand, when the ambient temperature becomes higher than a certain predetermined temperature T1 (but lower than T2), both the output voltages of the temperature detection circuits 1a and 1b increase, and first only the output of the temperature detection circuit 1a becomes Schmitt trigger. Circuits 31a, 31
The voltage becomes higher than the threshold voltage of b, thereby causing the output of the Schmitt trigger circuit 31a to be at a low level (the output of the Schmitt trigger circuit 31b remains at a high level). As a result, only the output of AND gate G2 is set to high level, voltage V2 generated by reference voltage generating circuit 2b is supplied to buffer circuit 4, and internal circuit 5 is driven with an intermediate voltage.

【0012】さらに、周囲温度がある所定の温度T2よ
りも高くなると、温度検出回路1a,1bの出力電圧が
さらに上昇して温度検出回路1aおよび1bの出力がと
もにシュミットトリガ回路31a,31bのしきい値電
圧よりも高くなり、これによってシュミットトリガ回路
31aおよび31bの出力がともにロウレベルにされる
。その結果、ANDゲートG3の出力のみハイレベルに
されて、基準電圧発生回路2cの発生電圧V3がバッフ
ァ回路4に供給され、内部回路5は最も高い電圧で駆動
されるようになる。
Furthermore, when the ambient temperature becomes higher than a certain predetermined temperature T2, the output voltages of the temperature detection circuits 1a and 1b further increase, and the outputs of the temperature detection circuits 1a and 1b both exceed the Schmitt trigger circuits 31a and 31b. The voltage becomes higher than the threshold voltage, and thereby the outputs of Schmitt trigger circuits 31a and 31b are both set to low level. As a result, only the output of AND gate G3 is set to high level, voltage V3 generated by reference voltage generating circuit 2c is supplied to buffer circuit 4, and internal circuit 5 is driven at the highest voltage.

【0013】図2には上記実施例における周囲温度と供
給電圧Voutとの関係が示されている。同図より明ら
かなようにこの実施例に従うと、周囲温度が高くなるほ
ど内部回路は高い電圧で駆動されるため、広い温度範囲
に亘ってほぼ同一速度で動作するようになるので、集積
回路の性能を充分に活かしたシステム設計が可能になる
。 これとともに、低い温度では必要以上速い速度で動作す
ることがなく、電源電圧が下がることによって消費電力
が低減されるという利点もある。一方、高い温度では内
部回路が高い電圧で駆動されるため、温度上昇によって
動作速度が低下することがなく、スペックぎりぎりの設
計を行なっても動作マージンが低下することがないとい
う利点がある。
FIG. 2 shows the relationship between ambient temperature and supply voltage Vout in the above embodiment. As is clear from the figure, if this example is followed, the higher the ambient temperature, the higher the internal circuit will be driven at a higher voltage, so it will operate at almost the same speed over a wide temperature range, which will improve the performance of the integrated circuit. It becomes possible to design a system that takes full advantage of the Along with this, there is also the advantage that the device does not operate at an unnecessarily high speed at low temperatures, and power consumption is reduced by lowering the power supply voltage. On the other hand, since the internal circuitry is driven at a high voltage at high temperatures, there is an advantage that the operating speed does not decrease due to temperature rise, and the operating margin does not decrease even if the design is at the limit of the specifications.

【0014】さらに、上記実施例では温度検出回路の出
力をシュミットトリガ回路で受けるようにしているため
、温度の揺らぎ等によって温度検出回路の出力が変動し
ても内部回路への電源電圧電圧Voutを安定して供給
させることができる。
Furthermore, in the above embodiment, since the output of the temperature detection circuit is received by the Schmitt trigger circuit, even if the output of the temperature detection circuit fluctuates due to temperature fluctuations, the power supply voltage Vout to the internal circuit can be maintained. It can be stably supplied.

【0015】なお、上記実施例では基準電圧発生回路2
a,2b,2cの発生電圧V1,V2,V3のいずれか
一つを選択するスイッチS1,S2,S3を設けている
が、スイッチを設ける代わりに制御回路3からの信号に
よって例えば基準電圧発生回路内に設けられた電源スイ
ッチもしくは電流パス上に設けられたスイッチ等を選択
的にオンさせて、基準電圧発生回路2a,2b,2cの
いずれか一つを活性化させるように構成するようにして
もよい。あるいは基準電圧発生回路に設けられた抵抗等
の素子定数を制御回路からの信号によって変えてやるこ
とで発生される電圧そのものを変えるように構成するこ
ともできる。
Note that in the above embodiment, the reference voltage generation circuit 2
Switches S1, S2, and S3 are provided to select one of the generated voltages V1, V2, and V3 of a, 2b, and 2c. The reference voltage generation circuit 2a, 2b, or 2c is configured to activate one of the reference voltage generation circuits 2a, 2b, and 2c by selectively turning on a power switch provided therein or a switch provided on the current path. Good too. Alternatively, the voltage itself can be changed by changing element constants such as resistances provided in the reference voltage generating circuit according to signals from the control circuit.

【0016】また、上記実施例では周囲温度によって出
力する電圧が変化する複数の温度検出回路1a,1bを
設け、その出力電圧をしきい値電圧が同一のシュミット
トリガ回路31a,31bに入れるようにしているが、
周囲温度によって出力する電圧が変化する温度検出回路
を一つだけ設けその出力電圧をしきい値電圧が異なるよ
うに構成された複数のシュミットトリガ回路に供給する
ように構成してもよい。
Furthermore, in the above embodiment, a plurality of temperature detection circuits 1a and 1b whose output voltages change depending on the ambient temperature are provided, and their output voltages are input to Schmitt trigger circuits 31a and 31b having the same threshold voltage. Although,
It is also possible to provide only one temperature detection circuit whose output voltage changes depending on the ambient temperature and supply the output voltage to a plurality of Schmitt trigger circuits configured to have different threshold voltages.

【0017】さらに、上記実施例では高温時と低温時と
で基準電圧発生回路を切り替えるようにしているが、デ
ィレイ回路を有する半導体集積回路では時定数の異なる
複数のディレイ回路もしくは時定数の切換え可能なディ
レイ回路を設けておいて、高温時と低温時とで回路もし
くは時定数を切り替えるようにしてもよい。また、MO
S集積回路では、構成するMOSFETの定数のみ異な
り同一形式の回路を複数設けておいて高温時と低温時と
で回路を切り替えるようにしてもよい。
Furthermore, in the above embodiment, the reference voltage generation circuit is switched between high temperature and low temperature, but in a semiconductor integrated circuit having a delay circuit, it is possible to use a plurality of delay circuits with different time constants or switch the time constant. A delay circuit may be provided, and the circuit or time constant may be switched between high temperature and low temperature. Also, M.O.
In the S integrated circuit, a plurality of circuits of the same type, differing only in the constants of the MOSFETs constituting the circuit, may be provided, and the circuits may be switched between high temperature and low temperature.

【0018】以上説明したように、上記実施例は、温度
検出回路と、互いに発生する電圧の異なる複数の基準電
圧発生回路と、上記温度検出回路からの信号に基づいて
上記複数の基準電圧発生回路のうち一つを選択する信号
を形成する制御回路とを設けるようにしたので、集積回
路の使用環境の温度に応じて自動的に最適な基準電圧回
路が選択されるという作用により、集積回路の性能を充
分に活かした設計が可能になるとともに、幅広い温度に
対して回路の動作マージンが向上されるようになるとい
う効果がある。
As explained above, the above embodiment includes a temperature detection circuit, a plurality of reference voltage generation circuits that generate different voltages from each other, and a plurality of reference voltage generation circuits that generate voltages based on signals from the temperature detection circuit. Since a control circuit is provided to form a signal to select one of the reference voltage circuits, the optimum reference voltage circuit is automatically selected according to the temperature of the environment in which the integrated circuit is used. This has the effect of not only making it possible to design a device that takes full advantage of its performance, but also improving the operating margin of the circuit over a wide range of temperatures.

【0019】以上本発明者によってなされた発明を実施
例に基づき具体的に説明したが、本発明は上記実施例に
限定されるものではなく、その要旨を逸脱しない範囲で
種々変更可能であることはいうまでもない。例えば、上
記実施例では温度検出回路として内部回路と同一のチッ
プ上に形成されたダイオードと抵抗が直列接続されたも
のが使用されているが、他の形式の回路を用いたりダイ
オードの代わりにバリスタやサーミスタ等温度依存性の
顕著な他の素子を用いてもよいし、温度検出回路を外付
け回路で構成することも可能である。ただし、ダイオー
ドを使用すれば他の回路素子と同一の工程で形成するす
ることが容易であるため、プロセスの整合性が良い。
Although the invention made by the present inventor has been specifically explained above based on examples, the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. Needless to say. For example, in the above embodiment, a temperature detection circuit in which a diode and a resistor formed on the same chip as the internal circuit are connected in series is used, but other types of circuits may be used or a varistor may be used instead of the diode. It is also possible to use other elements with significant temperature dependence, such as a thermistor, or to configure the temperature detection circuit with an external circuit. However, if a diode is used, it can be easily formed in the same process as other circuit elements, resulting in good process consistency.

【0020】以上の説明では主として本発明者によって
なされた発明をその背景となった利用分野である論理集
積回路RAMに適用した場合について説明したが、この
発明はそれに限定されるものでなく、リニア集積回路そ
の他半導体集積回路一般に利用することができる。
In the above explanation, the invention made by the present inventor was mainly applied to the logic integrated circuit RAM, which is the background field of application, but the invention is not limited thereto, and is applicable to linear It can be used for integrated circuits and other semiconductor integrated circuits in general.

【0021】[0021]

【発明の効果】本願において開示される発明のうち代表
的なものによって得られる効果を簡単に説明すれば下記
のとおりである。すなわち、集積回路の性能を充分に活
かした設計を可能にするとともに、幅広い温度に対して
回路の動作マージンを向上させることができる。
Effects of the Invention The effects obtained by typical inventions disclosed in this application are briefly explained below. That is, it is possible to design a circuit that fully utilizes the performance of the integrated circuit, and to improve the operating margin of the circuit over a wide range of temperatures.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明に係る半導体集積回路の一実施例を示す
回路構成図である。
FIG. 1 is a circuit configuration diagram showing an embodiment of a semiconductor integrated circuit according to the present invention.

【図2】周囲温度と実施例の回路の出力電圧との関係を
示すグラフである。
FIG. 2 is a graph showing the relationship between ambient temperature and output voltage of the circuit of the example.

【符号の説明】[Explanation of symbols]

1a,1b  温度検出回路 2a,2b,2c  基準電圧発生回路3  制御回路 4  バッファ回路 31a,31b  ヒステリシス回路(シュミットトリ
ガ回路)
1a, 1b Temperature detection circuit 2a, 2b, 2c Reference voltage generation circuit 3 Control circuit 4 Buffer circuit 31a, 31b Hysteresis circuit (Schmitt trigger circuit)

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】  互いに特性の異なる複数の同一機能を
有する回路と、温度検出回路からの信号に基づいて上記
複数の同一機能回路のうち一つを選択する信号を形成す
る制御回路とを備えてなることを特徴とする半導体集積
回路。
1. A control circuit comprising: a plurality of circuits having the same function having different characteristics; and a control circuit forming a signal for selecting one of the plurality of circuits with the same function based on a signal from a temperature detection circuit. A semiconductor integrated circuit characterized by:
【請求項2】  温度検出回路と、互いに発生する電圧
の異なる複数の基準電圧発生回路と、上記温度検出回路
からの信号に基づいて上記複数の基準電圧発生回路のう
ち一つを選択する信号を形成する制御回路とを備えてな
ることを特徴とする半導体集積回路。
2. A temperature detection circuit, a plurality of reference voltage generation circuits generating different voltages from each other, and a signal for selecting one of the plurality of reference voltage generation circuits based on a signal from the temperature detection circuit. 1. A semiconductor integrated circuit comprising: a control circuit for forming a semiconductor integrated circuit;
【請求項3】  上記制御回路は、上記温度検出回路か
らの信号を識別するヒステリシス回路を備えていること
を特徴とする請求項1または2記載の半導体集積回路。
3. The semiconductor integrated circuit according to claim 1, wherein the control circuit includes a hysteresis circuit for identifying a signal from the temperature detection circuit.
JP10035991A 1991-04-05 1991-04-05 Semiconductor integrated circuit Pending JPH04307964A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10035991A JPH04307964A (en) 1991-04-05 1991-04-05 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10035991A JPH04307964A (en) 1991-04-05 1991-04-05 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH04307964A true JPH04307964A (en) 1992-10-30

Family

ID=14271888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10035991A Pending JPH04307964A (en) 1991-04-05 1991-04-05 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH04307964A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481210A (en) * 1993-11-26 1996-01-02 Temic Telefunken Microelectronic Gmbh Method for controlling clock frequency of a digital logic semiconductor according to temperature
JP2006235309A (en) * 2005-02-25 2006-09-07 Tohoku Pioneer Corp Device and method for driving display panel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481210A (en) * 1993-11-26 1996-01-02 Temic Telefunken Microelectronic Gmbh Method for controlling clock frequency of a digital logic semiconductor according to temperature
JP2006235309A (en) * 2005-02-25 2006-09-07 Tohoku Pioneer Corp Device and method for driving display panel

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