JPH04299669A - Clamping device - Google Patents

Abstract

PURPOSE:To secure the stability by controlling the responsiveness by the noise level at the time of clamping a video signal after quantization and giving a quick response in the case of the low noise level but giving a slow response in the case of the high noise level. CONSTITUTION:After a video signal is quantized by an AD 5, a first clamp error is obtained in an arithmetic circuit A 13, and the cumulative integration time constant of this clamp error is controlled by the noise level separated in a high-pass filter 14 to obtain a second clamp error. The second clamp error passes a DA 11 to control the preceding DC potential of the AD 5 and performs feedforward regeneration of the already quantized video output. The noise level is the positioner of the best point of responsiveness and precision for a feedback loop and feedforward regeneration.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clamping device for keeping the pedestal level of a quantized video signal constant. Here, the pedestal level refers to the DC voltage level at which a blanking signal is added to the output image signal from the television image pickup tube. The synchronization signal is on one of these levels, and the video signal is on the other.

0002

2. Description of the Related Art FIG. 2 is a block diagram showing an example of a conventional clamp device. In FIG. 2, a synchronization separation circuit 4 and a pulse generation circuit 9 are pulse generation means for generating a clamp pulse corresponding to the phase of the pedestal from an input video signal, and an AD5 is an AD5 that quantizes the input video signal to obtain a PCM video signal. /D conversion means, and the luminance separation circuit 7 and latch circuit 8 are means for extracting pedestal data 107 from the PCM video signal using a clamp pulse.
The subtraction circuit A10 is a means to obtain a PCM error signal 109 by subtracting a preset reference pedestal value 108 from the pedestal data 107, and DA11 feeds back the PCM error signal to the differential amplifier 3 provided at the front stage of AD5 and inputs it. The subtraction circuit B6 is a means for controlling the DC potential of the video signal, and the subtraction circuit B6 is a means for controlling the DC potential of the video signal.
This is means for subtracting the error signal 109.

This clamp device detects the PCM error signal, which is the error value of the pedestal data, from the quantized PCM signal and feeds it back to the A/D conversion means. It is not affected by drift and can completely eliminate errors over a long period of time, and when the DC potential of the input video signal changes sharply, the error is instantaneously eliminated by the feedforward effect of the subtraction circuit B6.

0004

[Problems to be Solved by the Invention] This conventional device can handle input video signals with little noise without any problems, but with regard to noisy video signals transmitted via analog lines or radio waves, the PCM error signal Since it is difficult to take a constant value, it is difficult to
There is a drawback that the result of subtracting the M error signal varies line by line, resulting in line flicker.

[0005]

Means for Solving the Problems The clamping device of the present invention includes a pulse generating means for generating a clamp pulse corresponding to the phase of a pedestal from an input video signal, and an A for quantizing the input video signal to obtain a PCM video signal. /D conversion means, and a first PCM error signal for obtaining a first PCM error signal by subtracting a preset pedestal potential from the PCM video signal.
a first average value detection means for calculating a line-by-line error average signal from the first PCM error signal using the clamp pulse; and a detection means for calculating a noise level from the first PCM error signal. and a second average value detection means for accumulating the line-by-line error average signal line by line and using the average value as a second PCM error signal, and the cumulative number of the second average value detection means is a control means for controlling based on a noise level; a second calculation means for subtracting the second PCM error signal from the PCM video signal;
converts the PCM error signal of
and D/A conversion means for feeding back to the conversion means.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the clamping device of the present invention. In FIG. 1, the same components as in the conventional example are given the same reference numerals as in FIG. That is, in this example,
The synchronization separation circuit 4 and the pulse generation circuit 9 are means for generating a clamp pulse corresponding to the phase of the pedestal from the input video signal, and the AD5 quantizes the input video signal and outputs a P
It is an A/D conversion means for obtaining a CM video signal, and an arithmetic circuit A10 subtracts a preset pedestal potential 108 from a PCM video signal 103 to obtain a first PCM error signal 1.
11, and the arithmetic circuit A13 is a first average value detection means for calculating the line-by-line error average signal 112 from the first PCM error signal 111 using the clamp pulse 106. 14 and an arithmetic circuit B15 are detection means for determining the noise level 113 from the first PCM error signal 111, and an arithmetic circuit C16 accumulates the line-by-line error average signal 112 for each line and calculates the average value to the second PCM error signal 111. It is a means that also serves as a control means for controlling the cumulative number of the second average value detection means and the second average value detection means to be used as the error signal 114 at the noise level 113,
The subtraction circuit B6 subtracts the PCM video signal 103 from the second PC.
A second calculation means for subtracting the M error signal 114;
A11 is a D/A conversion means that converts the second PCM error signal 114 into an analog signal and feeds it back to the A/D conversion means, and the differential amplifier 3 converts the output of the D/A conversion means from the input video signal 101. It is something to be deducted. An input video signal 101 is passed from an input terminal 1 to a buffer amplifier 2 to become a low impedance video signal 102. This signal is passed through a differential amplifier 3 and a synchronization separation circuit 4, and the output of the former is passed through an AD5 to provide a PCM video signal 10.
3, and the latter is passed through the synchronization separation circuit 4 and the pulse generation circuit 9 to obtain the clamp pulse 106. Subtraction circuit A10
is the first PCM error signal 111 by subtracting the preset pedestal potential 108 from the PCM video signal 103.
This is supplied to the arithmetic circuit A13 and the high-pass filter 14. The arithmetic circuit A13 cumulatively adds the first PCM error signal 111 in the section corresponding to the width of the clan pulse 106, and divides the value by the cumulative number to obtain the error average signal 112. divided into. The high-pass filter 14 removes low-frequency components, and the arithmetic circuit B15 cumulatively adds the absolute values of the first PCM error signal 111 in the section corresponding to the width of the clamp pulse 106, and divides the value by the cumulative number to generate noise. I'm looking for level 113. Arithmetic circuit C
Reference numeral 16 cumulatively adds the error average signal 112 line by line and obtains the average value, which is used as the second PCM error signal 114. The cumulative number is controlled to be large when the noise level 113 is high and small when the noise level 113 is low. Ru. The second PCM error signal 114 is supplied to subtraction circuits B6 and DA11, the former of which converts the PCM video signal 103 to the second PCM error signal 11.
The latter converts the second PCM error signal 114 into an analog signal and feeds it back to the differential amplifier 3 located before the AD5, and the second PCM error signal 114 is The operation is to control the value to zero.

[0007]

[Effects of the Invention] As explained above, the present invention controls the response based on the noise level, so it is possible to quickly respond to a signal with little noise, and to respond quickly to a signal with a lot of noise. This has the effect of slowing down and obtaining a signal with no level change from line to line.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of a clamp device of the present invention.

FIG. 2 is a block diagram showing an example of a conventional clamp device.

[Explanation of symbols]

1 Input terminal 2 Buffer amplifier 3 Differential amplifier 4 Synchronous separation circuit 5 AD 6 Subtraction circuit B 7 Luminance separation circuit 8 Latch circuit 9 Pulse generation circuit 10 Subtraction circuit A 11 DA 12 Output terminal 13 Arithmetic circuit A 14 High-pass filter 15 Arithmetic circuit B 16 Arithmetic circuit C 101 Input video signal 102 Low impedance video signal 103
PCM video signal 104 Brightness signal 105 Synchronization signal 106 Clamp pulse 107 PCM pedestal level signal 108
Pedestal potential 109 PCM error signal 110 Output PCM video signal 111 First PCM error signal 112 Error average signal 113 Noise level 114 Second PCM error signal

Claims (1)

[Claims] 1. Pulse generation means for generating a clamp pulse corresponding to the phase of a pedestal from an input video signal; A/D conversion means for quantizing the input video signal to obtain a PCM video signal; a first calculation means for obtaining a first PCM error signal by subtracting a preset pedestal potential; and a first average value for obtaining a line-by-line error average signal from the first PCM error signal using the clamp pulse. a detection means, and the first P
a detection means for determining a noise level from the CM error signal; a second average value detection means for accumulating the line-by-line error average signal line by line and setting the average value as a second PCM error signal; control means for controlling the cumulative number of mean value detection means for using the noise level; second calculation means for subtracting the second PCM error signal from the PCM video signal; D/A converting means for converting the converted data into a D/A converting means and feeding it back to the A/D converting means.