JP2754934B2 - Clamping device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clamp device for keeping a pedestal level of a quantized video signal constant. Here, the pedestal level refers to a DC voltage level that adds a blanking signal to an image signal output from a television image pickup tube. One of these levels is a synchronization signal and the other is a video signal.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing an example of a conventional clamping device. In FIG. 2, a sync separation circuit 4 and a pulse generation circuit 9 are pulse generation means for generating a clamp pulse corresponding to the phase of a pedestal from an input video signal, and AD5 quantizes the input video signal to obtain a PCM video signal. / D conversion means, and the luminance separation circuit 7 and the latch circuit 8 are means for extracting the pedestal data 107 from the PCM video signal using the clamp pulse,
The subtraction circuit A10 is means for obtaining a PCM error signal 109 by subtracting a preset reference pedestal value 108 from the pedestal data 107, and the DA11 feeds back the PCM error signal to the differential amplifier 3 provided in the preceding stage of the AD5 and inputs the same. This is a means for controlling the DC potential of the video signal.
This is a means for subtracting the error signal 109.

This clamp device detects a PCM error signal, which is an error value of pedestal data, from the quantized PCM signal and feeds it back to the A / D conversion means. The error can be completely eliminated in the long term without being affected by the drift. When the DC potential of the input video signal changes sharply, the error is instantly eliminated by the feedforward effect of the subtraction circuit B6.

[0004]

Although this conventional apparatus can cope with an input video signal having little noise without any problem, a PCM error signal can be applied to a video signal having much noise such as transmitted through an analog line or radio waves. Is difficult to take a constant value.
The result of subtracting the CM error signal fluctuates for each line,
There is a disadvantage of causing line flicker.

[0005]

According to the present invention, there is provided a clamp apparatus for generating a clamp pulse corresponding to the phase of a pedestal from an input video signal, and a PCM video signal obtained by quantizing the input video signal. / D conversion means, first calculation means for subtracting a preset pedestal potential from the PCM video signal to obtain a first PCM error signal, and line-by-line using the clamp pulse from the first PCM error signal. A first average value detecting means for obtaining an error average signal of the above, a detecting means for obtaining a noise level from the first PCM error signal, and an error average signal for each line, which is accumulated for each line, and the average value is obtained. 2
A second average value detecting means for providing a PCM error signal, a control means for controlling the cumulative number of the second average value detecting means at the noise level, and a second means for detecting the second average value from the PCM video signal.
A second calculating means for subtracting the PCM error signal of the second PCM error signal;
D / A conversion means for feeding back to the D conversion means.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the clamp device of the present invention. 1, the same components as in the conventional example are denoted by the same reference numerals as in FIG. That is, in this embodiment, the sync separation circuit 4 and the pulse generation circuit 9 are means for generating a clamp pulse corresponding to the phase of the pedestal from the input video signal, and AD5 quantizes the input video signal to obtain a PCM video signal. The arithmetic circuit A10 is a first arithmetic means for subtracting a preset pedestal potential 108 from the PCM video signal 103 to obtain a first PCM error signal 111, and the arithmetic circuit A13
Is the clamp pulse 10 from the first PCM error signal 111.
6, a high-pass filter 14 and an arithmetic circuit B15 are detection means for obtaining a noise level 113 from the first PCM error signal 111. Circuit C16
Is a second PCM error signal 114 obtained by accumulating the error average signal 112 in line units for each line.
The subtraction circuit B6 subtracts the second PCM error signal 114 from the PCM video signal 103 as a control means for controlling the accumulated number of the average value detection means and the second average value detection means at the noise level 113. DA 11 converts the second PCM error signal 114 into an analog signal and feeds it back to the A / D converter.
/ A conversion means, and the differential amplifier 3
The output of the D / A conversion means is subtracted from 01.
An input video signal 101 is passed from an input terminal 1 to a buffer amplifier 2 to become a low impedance video signal 102. This signal is passed through a differential amplifier 3 and a sync separation circuit 4, and the output of the former is passed through an AD5 to output a PCM video signal 1
03, the latter being the synchronization separation circuit 4 and the pulse generation circuit 9
To obtain a clamp pulse 106. Subtraction circuit A1
0 is a first PCM error signal 11 obtained by subtracting a preset pedestal potential 108 from the PCM video signal 103.
1, which is calculated by the arithmetic circuit A13 and the high-pass filter 14.
To supply. The arithmetic circuit A13 accumulatively adds the first PCM error signal 111 in a section corresponding to the width of the clan pulse 106 and divides the value by the accumulated number to obtain an error average signal 112. Is separated into The low-pass component is dropped by the high-pass filter 14, and the arithmetic circuit B 15 outputs the first PCM of the section corresponding to the width of the clamp pulse 106.
The noise level 113 is obtained by cumulatively adding the absolute value of the error signal 111 and dividing the value by the cumulative number. The arithmetic circuit C16 accumulatively adds the error average signal 112 line by line to obtain an average value to obtain a second PCM error signal 114. The number of accumulation is large when the noise level 113 is large and small when the noise level 113 is small. Controlled. The second PCM error signal 114 is supplied to a subtraction circuit B6 and a DA11, and the former is the second PCM error signal 1 from the PCM video signal 103.
14 to perform a feed-forward clamping operation. The latter converts the second PCM error signal 114 into an analog signal and feeds it back to the differential amplifier 3 located in the preceding stage of the AD5. The operation is to control the value to zero.

[0007]

As described above, according to the present invention, the responsiveness is controlled by the noise level, so that a quick response can be made to a signal with little noise and a response can be made to a signal with much noise. This has the effect of obtaining a signal with no level change for each line by delaying it.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a clamp device of the present invention.

FIG. 2 is a block diagram showing an example of a conventional clamping device.

[Explanation of symbols]

 Reference Signs List 1 input terminal 2 buffer amplifier 3 differential amplifier 4 synchronization separation circuit 5 AD 6 subtraction circuit B 7 luminance separation circuit 8 latch circuit 9 pulse generation circuit 10 subtraction circuit A 11 DA 12 output terminal 13 calculation circuit A 14 high-pass filter 15 calculation circuit B 16 arithmetic circuit C 101 input video signal 102 low impedance video signal 103 PCM video signal 104 luminance signal 105 synchronization signal 106 clamp pulse 107 PCM pedestal level signal 108 pedestal potential 109 PCM error signal 110 output PCM video signal 111 first PCM Error signal 112 Error average signal 113 Noise level 114 Second PCM error signal

Claims (1)

(57) [Claims] A pulse generating means for generating a clamp pulse corresponding to a phase of a pedestal from an input video signal;
A / D converter for quantizing the input video signal to obtain a PCM video signal, first arithmetic means for subtracting a preset pedestal potential from the PCM video signal to obtain a first PCM error signal, A first average value detecting means for obtaining an error average signal for each line from the one PCM error signal using the clamp pulse;
Detecting means for obtaining a noise level from the M error signal; second average value detecting means for accumulating the error average signal in line units for each line to obtain an average value as a second PCM error signal; Control means for controlling the cumulative number of average value detection means at the noise level, second calculation means for subtracting the second PCM error signal from the PCM video signal, and analog signal conversion of the second PCM error signal. And a D / A conversion means for converting the data into a digital signal and feeding it back to the A / D conversion means.