JPH04298721A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH04298721A
JPH04298721A JP3064127A JP6412791A JPH04298721A JP H04298721 A JPH04298721 A JP H04298721A JP 3064127 A JP3064127 A JP 3064127A JP 6412791 A JP6412791 A JP 6412791A JP H04298721 A JPH04298721 A JP H04298721A
Authority
JP
Japan
Prior art keywords
wiring electrode
mim
display
nonlinear resistance
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3064127A
Other languages
Japanese (ja)
Inventor
Tetsuya Iizuka
哲也 飯塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Development and Engineering Corp
Original Assignee
Toshiba Corp
Toshiba Electronic Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Electronic Engineering Co Ltd filed Critical Toshiba Corp
Priority to JP3064127A priority Critical patent/JPH04298721A/en
Priority to EP92104570A priority patent/EP0504792B1/en
Priority to DE69202893T priority patent/DE69202893T2/en
Priority to US07/854,095 priority patent/US5227901A/en
Priority to KR92004572A priority patent/KR960008980B1/en
Publication of JPH04298721A publication Critical patent/JPH04298721A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent a display MIM element at a divisional part of a wiring electrode from being destroyed by static electricity during a manufacture process by arranging a nonlinear resistance element for protection at least one divisional part of the wiring electrode. CONSTITUTION:The MIM(Metal-Insulator-Metal) element 18 which is connected to respective picture element electrodes is formed on at least one of two opposite substrates, the wiring electrode 12 is divided at the center position, and the nonlinear resistance element 19 for protection is arranged at at least one of the divisional parts of the wiring electrode 12. At the center part, the element 19 for protection which does not contribute to display operation is arranged at a place where discharge and breakage are easily caused. Consequently, even if static electricity is generated to generate a potential difference between the divisional parts, the element 19 for protection is broken first to reduce the potential difference, so the elements at picture element display electrode parts can be protected.

Description

【発明の詳細な説明】[Detailed description of the invention]

[発明の目的] [Purpose of the invention]

【0001】0001

【産業上の利用分野】この発明はスイッチング素子とし
てMIM素子を画素ごとに組み込んだ液晶表示装置に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device incorporating an MIM element as a switching element in each pixel.

【0002】0002

【従来の技術】近年、液晶表示装置は、時計・電卓等の
比較的簡単なものから、パ−ソナル・コンピュ−タ、ワ
−ドプロセッサ−、更にはOA用の端末機器、TV画像
表示等の大容量情報表示の用途に使用されている。従来
、液晶表示装置においては、マトリクス表示のマルチプ
レックス駆動方式、いわゆる単純マトリクス方式を用い
るのが一般的であった。しかしながら、この方式は走査
線数の増加に伴って、表示部分と非表示部分のコントラ
スト比が劣化するため、大規模なマトリクス表示には適
していないという欠点があった。
[Prior Art] In recent years, liquid crystal display devices have been used in everything from relatively simple devices such as watches and calculators to personal computers, word processors, office automation terminal equipment, TV image displays, etc. It is used for displaying large amounts of information. Conventionally, in liquid crystal display devices, it has been common to use a multiplex driving method for matrix display, a so-called simple matrix method. However, this method has the disadvantage that it is not suitable for large-scale matrix display because the contrast ratio between the display area and the non-display area deteriorates as the number of scanning lines increases.

【0003】そこで、この欠点を解決する一つの手段と
して、個々の画素をスイッチング素子によって駆動する
方法、いわゆるアクティブマトリクス方式が開発されて
いる。ここで、スイッチング素子として、薄膜トランジ
スタや非線形抵抗素子を用いるが、このうち非線形抵抗
素子は、基本的に二端子で構造が簡単なため、製造コス
トの面で有利である。
[0003] As a means of solving this drawback, a so-called active matrix method, which is a method in which each pixel is driven by a switching element, has been developed. Here, a thin film transistor or a nonlinear resistance element is used as the switching element, and among these, the nonlinear resistance element is advantageous in terms of manufacturing cost because it basically has two terminals and a simple structure.

【0004】非線形抵抗素子としては様々の方式が開発
されているが、そのなかで金属−絶縁物−金属(MIM
)構造を有するものが現在唯一実用化されている。この
MIM素子をスイッチング素子として用いた場合、表示
容量の増加に伴うコントラスト比の劣化は単純マトリク
ス方式のときより明らかに小さい。しかしながら、MI
M素子を用いても、走査線数が500本を超えるような
大規模なマトリクス表示を行う場合には、単純マトリク
ス方式の場合と同様なコントラスト比の劣化が発生する
。そこで、配線電極を中央で分割し独立に駆動すること
により、見掛けの走査線数を半分にする手法が取られる
ことがある。
Various methods have been developed for nonlinear resistance elements, among which metal-insulator-metal (MIM)
) structure is currently the only one in practical use. When this MIM element is used as a switching element, the deterioration of contrast ratio due to increase in display capacity is clearly smaller than in the case of a simple matrix method. However, M.I.
Even if M elements are used, when performing a large-scale matrix display with more than 500 scanning lines, the same deterioration in contrast ratio as in the case of a simple matrix method occurs. Therefore, a method is sometimes taken in which the wiring electrodes are divided in the center and driven independently to halve the apparent number of scanning lines.

【0005】図4はこの種のMIM素子アレイにおける
分割部分に隣接する二画素分の製造工程を示す平面図で
ある。まず、ガラス基板上にTaからなる第一の金属層
をスパッタリング法により薄膜形成した後、一回目のフ
ォトリソグラフィ―工程を用いて、図4(a)に示すよ
うに、MIM素子の下部金属1及び配線電極2にパタ―
ニングする。次に、陽極酸化法等を用いて、第一の金属
層の表面にMIM素子の絶縁膜となる酸化膜(図示せず
)を形成する。続いて、ガラス基板上に第二の金属層を
スパッタリング法により薄膜形成した後、二回目のフォ
トリソグラフィ―工程を用いて、図4(b)に示すよう
に、MIM素子の上部金属3にパタ―ニングする。次に
、ガラス基板上にITO膜を薄膜形成した後、三回目の
フォトリソグラフィ―工程を用いて、図4(c)に示す
ように、画素表示電極4にパタ―ニングして、工程が完
了する。
FIG. 4 is a plan view showing the manufacturing process for two pixels adjacent to the divided portion in this type of MIM element array. First, a first metal layer made of Ta is formed as a thin film on a glass substrate by sputtering, and then a first photolithography process is used to form the lower metal layer 1 of the MIM element, as shown in FIG. 4(a). And pattern on wiring electrode 2
ning. Next, an oxide film (not shown) that will become an insulating film of the MIM element is formed on the surface of the first metal layer using an anodic oxidation method or the like. Subsequently, after forming a thin film of the second metal layer on the glass substrate by sputtering, a second photolithography process is used to pattern the upper metal layer 3 of the MIM element, as shown in FIG. 4(b). - to ning. Next, after forming a thin ITO film on the glass substrate, a third photolithography process is used to pattern the pixel display electrode 4 as shown in FIG. 4(c), and the process is completed. do.

【0006】[0006]

【発明が解決しようとする課題】MIM素子をスイッチ
ング素子として用いる場合、素子の特性不良は画素単位
の表示欠陥、いわゆる点欠陥となる。素子の特性不良に
は様々な要因が考えられるが、MIM素子に関しては、
その絶縁膜が500〜700オングストロ―ム程度と薄
いため耐圧が低く、工程中に発生する静電気により絶縁
破壊を起こしやすい。液晶表示装置においては、基板上
に配向膜を形成した後、布で擦るラビング工程があり、
このとき、特に静電気が発生しやすくこの発生を完全に
抑えること困難である。一般に、電荷は端部に集中する
ため、上述したように配線電極を中央で分割した場合、
分割部分に電荷が集中する。このため、分割部を境とし
て電位差ができてしまい、配線電極端とこれに近接する
画素表示電極の間で放電が発生し、素子が絶縁破壊を起
こすことがある。この結果、分割部分に点欠陥が集中す
るという不良が発生する。
Problems to be Solved by the Invention When an MIM element is used as a switching element, a characteristic defect of the element becomes a display defect in pixel units, or a so-called point defect. Various factors can be considered for defective device characteristics, but regarding MIM devices,
Since the insulating film is as thin as about 500 to 700 angstroms, it has a low breakdown voltage and is susceptible to dielectric breakdown due to static electricity generated during the process. In liquid crystal display devices, after forming an alignment film on a substrate, there is a rubbing process in which it is rubbed with a cloth.
At this time, static electricity is particularly likely to be generated and it is difficult to completely suppress this generation. Generally, charges are concentrated at the ends, so if the wiring electrode is divided in the center as described above,
Electric charge is concentrated in the divided portion. Therefore, a potential difference is created across the dividing portion, and a discharge occurs between the end of the wiring electrode and the pixel display electrode adjacent thereto, which may cause dielectric breakdown of the element. As a result, a defect occurs in which point defects are concentrated in the divided portion.

【0007】図5はMIM素子アレイにおける配線電極
2の分割部分に隣接する画素の不良の発生の様子の一例
を示す平面図であり、図4と対応する部分には同一の符
号を付してある。図5において、矢印は発生した静電気
の流れを表し、○は正常な画素、×は欠陥画素を示して
いる。図5からわかるように、配線電極2の分割部分で
は全画素のうち半分が欠陥画素となっている。
FIG. 5 is a plan view showing an example of how a defect occurs in a pixel adjacent to the divided portion of the wiring electrode 2 in the MIM element array, and parts corresponding to those in FIG. 4 are given the same reference numerals. be. In FIG. 5, arrows indicate the flow of generated static electricity, ◯ indicates a normal pixel, and × indicates a defective pixel. As can be seen from FIG. 5, half of all pixels in the divided portion of the wiring electrode 2 are defective pixels.

【0008】この発明はこのような従来の事情に鑑みな
されたものであり、静電気による分割部分における表示
欠陥の発生を抑える構造の液晶表示装置を提供すること
を目的とする。 [発明の構成]
The present invention has been made in view of the above-mentioned conventional circumstances, and it is an object of the present invention to provide a liquid crystal display device having a structure that suppresses the occurrence of display defects in divided portions due to static electricity. [Structure of the invention]

【0009】[0009]

【課題を解決するための手段】この発明は、相対向する
2枚の基板のうち少なくとも一方の基板に、複数の画素
電極及びその各々に電気的に接続したMIM素子を形成
し、配線電極によりMIM素子を行ごとに接続せしめ且
つ配線電極を中央部分で分割してなる液晶表示装置につ
いてのものであり、配線電極の分割部分の少なくとも一
方に保護用の非線形抵抗素子を配置している。
[Means for Solving the Problems] This invention forms a plurality of pixel electrodes and an MIM element electrically connected to each of the pixel electrodes on at least one of two opposing substrates, and connects them to wiring electrodes. This relates to a liquid crystal display device in which MIM elements are connected row by row and wiring electrodes are divided at the center, and a protective nonlinear resistance element is arranged in at least one of the divided parts of the wiring electrodes.

【0010】0010

【作用】この発明では、中央の分割部分に表示に寄与し
ない保護用の素子を放電・破壊されやすい位置に配置し
てあるため、工程中に静電気が発生して分割部分で電位
差が生じても、保護用の素子が先に破壊されて電位差を
緩和するため、画素表示電極部分の素子を保護すること
が可能となる。
[Function] In this invention, the protective element that does not contribute to display is placed in the center divided part in a position where it is easily discharged and destroyed, so even if static electricity is generated during the process and a potential difference occurs in the divided part. Since the protective element is destroyed first and the potential difference is alleviated, it is possible to protect the element in the pixel display electrode portion.

【0011】[0011]

【実施例】以下、この発明の詳細を図面を参照して説明
する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be explained below with reference to the drawings.

【0012】図1はこの発明の一実施例を説明するため
の図であり、図1(a)〜(c)はこの実施例における
MIM素子アレイの分割部分に隣接する二画素分の製造
工程を示す平面図、図1(d)は図1(c)のA−A´
面に相当するこの実施例の断面図を表している。
FIG. 1 is a diagram for explaining one embodiment of the present invention, and FIGS. 1(a) to 1(c) show the manufacturing process for two pixels adjacent to the divided portion of the MIM element array in this embodiment. 1(d) is a plan view showing AA' in FIG. 1(c).
Figure 3 represents a cross-sectional view of this embodiment corresponding to a plane.

【0013】図1において製造工程に従って説明すると
、例えばガラスからなる基板10上に、例えばTaから
なる第一の金属層をスパッタリング法により薄膜形成し
た後、一回目のフォトリソグラフィ―工程を用いて、図
1(a)に示すように、表示用のMIM素子の下部金属
11、配線電極12、及び保護用の非線形抵抗素子の下
部金属13にパタ―ニングする。次に、陽極酸化法等を
用いて、第一の金属層の表面に表示用のMIM素子の絶
縁膜となる酸化膜14と、保護用の非線形抵抗素子の絶
縁膜となる酸化膜15とを形成する。続いて、基板10
上に第二の金属層をスパッタリング法により薄膜形成し
た後、二回目のフォトリソグラフィ―工程を用いて、図
1(b)に示すように、表示用のMIM素子の上部金属
16と、保護用の非線形抵抗素子の上部金属17とにパ
タ―ニングする。こうして、下部金属11−酸化膜14
−上部金属16構造のMIM素子18と、下部金属13
−酸化膜15−上部金属17構造の保護用の非線形抵抗
素子19が完成する。次に、基板10上にITO膜を薄
膜形成した後、三回目のフォトリソグラフィ―工程を用
いて、図1(c)に示すように、画素表示電極20にパ
タ―ニングして、工程が完了する。
To explain the manufacturing process in FIG. 1, a first metal layer made of, for example, Ta is formed as a thin film by sputtering on a substrate 10 made of, for example, glass, and then a first photolithography process is used to form a thin film of a first metal layer made of, for example, Ta. As shown in FIG. 1A, the lower metal 11 of the display MIM element, the wiring electrode 12, and the lower metal 13 of the protective nonlinear resistance element are patterned. Next, using an anodic oxidation method or the like, an oxide film 14 that will serve as an insulating film for a display MIM element and an oxide film 15 that will serve as an insulating film for a protective nonlinear resistance element are formed on the surface of the first metal layer. Form. Subsequently, the substrate 10
After forming a second metal layer thereon by sputtering, a second photolithography process is used to form the upper metal 16 of the display MIM element and the protective layer, as shown in FIG. 1(b). The upper metal 17 of the nonlinear resistance element is patterned. In this way, the lower metal 11-oxide film 14
- MIM element 18 with upper metal 16 structure and lower metal 13
A nonlinear resistance element 19 for protecting the -oxide film 15-upper metal 17 structure is completed. Next, after forming a thin ITO film on the substrate 10, a third photolithography process is used to pattern the pixel display electrode 20 as shown in FIG. 1(c), and the process is completed. do.

【0014】一方別に、図1(d)に示すように、例え
ばガラスからなる基板21上に、例えばITOからなる
走査電極22を配線電極12と直交する方向に形成する
。そして、基板10,21を5〜20μmの間隔を保っ
て保持させ、この間隙に液晶23を注入する。こうして
、所望の液晶表示装置が完成する。
Separately, as shown in FIG. 1D, scanning electrodes 22 made of, for example, ITO are formed on a substrate 21 made of, for example, glass in a direction perpendicular to the wiring electrodes 12. Then, the substrates 10 and 21 are held with a gap of 5 to 20 μm maintained, and liquid crystal 23 is injected into this gap. In this way, a desired liquid crystal display device is completed.

【0015】図2はこの実施例において静電気が発生し
たときの様子を示す図であり、図1と対応する部分には
同一の符号を付してある。図2においては図5と同様に
、矢印は発生した静電気の流れを表し、○は正常な画素
、×は欠陥画素を示している。この実施例では、表示に
寄与しない非線形抵抗素子19を配線電極12の分割部
分に対向する形で配置しているため、配線電極12の分
割部分で電位差が発生して放電が起きたとき、非線形抵
抗素子19が静電破壊を起こしMIM素子18が保護さ
れる。この結果、図2からわかるように、この実施例で
は図5に示した従来例に比べ、欠陥画素が全くなくなっ
ている。
FIG. 2 is a diagram showing how static electricity is generated in this embodiment, and parts corresponding to those in FIG. 1 are given the same reference numerals. In FIG. 2, similarly to FIG. 5, arrows indicate the flow of generated static electricity, ◯ indicates a normal pixel, and × indicates a defective pixel. In this embodiment, since the nonlinear resistance element 19 that does not contribute to display is arranged to face the divided portion of the wiring electrode 12, when a potential difference occurs in the divided portion of the wiring electrode 12 and discharge occurs, the nonlinear resistance element 19 Resistance element 19 is damaged by electrostatic discharge, and MIM element 18 is protected. As a result, as can be seen from FIG. 2, there are no defective pixels in this example compared to the conventional example shown in FIG.

【0016】なお、図1において、対向する非線形抵抗
素子19間の放電を起こりやすくするために、対向する
上部金属17間のギャップd1 は、対向する画素表示
電極20間のギャップd2 に比べ狭くすることが望ま
しい。
In FIG. 1, the gap d1 between the opposing upper metals 17 is made narrower than the gap d2 between the opposing pixel display electrodes 20 in order to facilitate the occurrence of discharge between the opposing nonlinear resistance elements 19. This is desirable.

【0017】図3はこの発明の他の実施例におけるMI
M素子アレイの分割部分に隣接する二画素分を示す平面
図であり、図1と対応する部分には同一の符号を付して
ある。図3(a)の例では、保護用の非線形抵抗素子1
9が配線電極12の分割部分の一方のみに設けられてい
るが、この場合にも、図1に示した実施例と同様の効果
を有する。図3(b)の例では、保護用の非線形抵抗素
子19における上部金属17の先端を尖らせ、対向する
非線形抵抗素子19間で放電を起こりやすくしてあるた
め、図1に示した実施例の場合よりも、MIM素子18
を保護する効果を強めることができる。
FIG. 3 shows MI in another embodiment of the present invention.
FIG. 2 is a plan view showing two pixels adjacent to a divided portion of the M-element array, in which portions corresponding to those in FIG. 1 are given the same reference numerals. In the example of FIG. 3(a), the protective nonlinear resistance element 1
9 is provided only on one of the divided portions of the wiring electrode 12, but even in this case, the same effect as the embodiment shown in FIG. 1 is obtained. In the example shown in FIG. 3(b), the tip of the upper metal 17 of the protective nonlinear resistance element 19 is sharpened to facilitate discharge between the opposing nonlinear resistance elements 19, which is different from the embodiment shown in FIG. than in the case of MIM element 18
The effect of protecting can be strengthened.

【0018】[0018]

【発明の効果】この発明では、配線電極の分割部分の少
なくとも一方に保護用の非線形抵抗素子を配置している
ので、配線電極の分割部分の表示用のMIM素子が製造
工程中に発生する静電気により破壊するのを防ぐことが
できる。
Effects of the Invention In this invention, since a protective nonlinear resistance element is disposed on at least one of the divided portions of the wiring electrode, the MIM element for displaying the divided portion of the wiring electrode is free from static electricity generated during the manufacturing process. This can prevent it from being destroyed.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】この発明の一実施例を説明するための平面図及
び断面図である。
FIG. 1 is a plan view and a sectional view for explaining an embodiment of the present invention.

【図2】図1に示した実施例において静電気が発生した
ときの様子を示す図である。
FIG. 2 is a diagram showing a situation when static electricity is generated in the embodiment shown in FIG. 1;

【図3】この発明の他の実施例におけるMIM素子アレ
イを示す平面図である。
FIG. 3 is a plan view showing an MIM element array in another embodiment of the invention.

【図4】従来のMIM素子アレイの製造工程の一例を示
す平面図である。
FIG. 4 is a plan view showing an example of the manufacturing process of a conventional MIM element array.

【図5】従来のMIM素子アレイにおける画素の不良の
発生の様子の一例を示す平面図である。
FIG. 5 is a plan view showing an example of how pixel defects occur in a conventional MIM element array.

【符号の説明】[Explanation of symbols]

10,21……基板 12……配線電極 18……MIM素子 19……非線形抵抗素子 10, 21...Substrate 12... Wiring electrode 18...MIM element 19...Nonlinear resistance element

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  相対向する2枚の基板のうち少なくと
も一方の基板に、複数の画素電極及びその各々に電気的
に接続した金属ー絶縁体ー金属構造のMIM(Meta
l−Insulator−Metal )素子を形成し
、配線電極により前記MIM素子を行ごとに接続せしめ
且つ前記配線電極を中央部分で分割してなる液晶表示装
置において、前記配線電極の分割部分の少なくとも一方
に保護用の非線形抵抗素子を配置することを特徴とする
液晶表示装置。
1. At least one of two opposing substrates is provided with a plurality of pixel electrodes and a metal-insulator-metal structure electrically connected to each pixel electrode.
1-Insulator-Metal) element is formed, the MIM elements are connected row by row by wiring electrodes, and the wiring electrode is divided at a central portion, in which at least one of the divided portions of the wiring electrode is A liquid crystal display device characterized by arranging a protective nonlinear resistance element.
JP3064127A 1991-03-20 1991-03-28 Liquid crystal display device Pending JPH04298721A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP3064127A JPH04298721A (en) 1991-03-28 1991-03-28 Liquid crystal display device
EP92104570A EP0504792B1 (en) 1991-03-20 1992-03-17 Liquid crystal display device
DE69202893T DE69202893T2 (en) 1991-03-20 1992-03-17 Liquid crystal display device.
US07/854,095 US5227901A (en) 1991-03-20 1992-03-19 Liquid crystal display device
KR92004572A KR960008980B1 (en) 1991-03-20 1992-03-19 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3064127A JPH04298721A (en) 1991-03-28 1991-03-28 Liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH04298721A true JPH04298721A (en) 1992-10-22

Family

ID=13249099

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3064127A Pending JPH04298721A (en) 1991-03-20 1991-03-28 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH04298721A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8928907B2 (en) 2012-12-03 2015-01-06 Samsung Electronics Co., Ltd. Method of sensing connection of USB device in power save mode and image forming apparatus for performing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8928907B2 (en) 2012-12-03 2015-01-06 Samsung Electronics Co., Ltd. Method of sensing connection of USB device in power save mode and image forming apparatus for performing the same
US9696783B2 (en) 2012-12-03 2017-07-04 S-Printing Solution Co., Ltd. Method of sensing connection of USB device in power save mode and image forming apparatus for performing the same

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