JPH04298362A - Printing control circuit of printer - Google Patents

Abstract

PURPOSE:To shorten a printing time when printing is performed with resolving power of l/n times of usual one. CONSTITUTION:In a usual printing mode, a switch 24 is closed by a mode control signal 117 and all of element registers 22a are connected. In a double-speed printing mode, the switch 24 is opened (a bypass path is formed) and an inputted printing data 108 to skip and shift the odd element register 22a. After the completion of skipping and shifting, the switch 24 is opened and a second clock 112 is subsequently applied and printing data is shifted from the odd element register 22a to the even element register 22a. Before and after this shift, a first latch signal 114 and a second latch signal 116 are given to a latch circuit 26.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention is applicable to thermal printers and
The present invention relates to a print control circuit that controls printing in a printer such as an ED printer.

0002

[Prior Art] Printers are used as output terminals for computers, word processors, etc.
There is a demand for printers that can print even faster. Various types of printers have been proposed in the past, such as thermal printers and LED printers, which have been put into practical use and used in various fields. FIG. 5 shows a circuit diagram of a print control circuit in a thermal printer as an example of a conventional printer. In the figure, reference numeral 10 denotes a heating element array consisting of a plurality of heating elements 10a, and each heating element 10a generates heat to print dots on the image receiving paper.

In this conventional example, print data 100 for printing is serially transmitted and sequentially fetched into the shift register 12. This shift register 1
2 is composed of a plurality of element registers 12a corresponding to each heating element 10a. And print data 1
00 is sequentially sent to each element register in synchronization with a predetermined clock 102.

[0004] When the print data is stored in all the element registers 12a, a latch signal 104 is input, and the latch circuit 14 performs its latching operation. In other words, this latch circuit 14 is connected to each element register 12.
It is divided into sections corresponding to a, and print data is output independently from each section.

Each print data is sent to a driver circuit 16 provided for each heating element 10a. Here, each driver circuit 16 is controlled by a predetermined enable signal 106, and in the driver circuit 16 from which the enable signal is obtained, the latched print data is driven to the heating element 10.
Apply current to a. As a result, the heating element 10a generates heat and printing is performed.

In this conventional printer, the heating element 1
For example, 1024 Oa's are arranged in an array. Therefore,
Normally, the operation of each heating element 10a is determined by 1024 pieces of print data.

However, in such a printer,
For example, 1024*1536 image data and 512
*768 image data, it is necessary to replenish the print data input to the shift register 12 when printing with a smaller resolution.

Therefore, conventionally, for example, by inputting two of each of the 512 pieces of print data to the shift register 12, equivalently 1024 pieces of print data are inputted.
print data were given to the shift register 12.

[0009]

[Problem to be Solved by the Invention] Therefore, in the print control circuit of such a conventional printer, when printing multiple items with different resolutions, it is necessary to always prepare the number of print data that matches the number of element registers. In addition, there is a problem in that no matter what resolution printing is performed, the clock 102 must be received as many times as there are element registers to perform the operation.

That is, in the past, there was a problem in that the printing operation time of the printer could not be shortened despite the difference in resolution.

The present invention has been made in view of the above-mentioned conventional problems, and its object is to provide a print control circuit for a printer that can increase the printing speed in accordance with the number of print data when lowering the print resolution. It is about providing.

0012

[Means for Solving the Problems] In order to achieve the above object, the present invention connects m printing elements and m element registers corresponding to each of the printing elements, and prints data. a shift register that serially accepts the print data and outputs the print data in parallel, and a latch circuit that includes m latch elements corresponding to each of the printing elements and latches the output from each of the element registers. The print control circuit includes a print setting means for switching between normal printing and n-times speed printing, and in a predetermined all-connection mode, all of the element registers are connected, and in a predetermined skip-connection mode, every n-th element register is connected. a connection switching means for connecting only the element registers, and when the n-times speed printing is set, the print data is taken into the shift register in the skip connection mode and then changed to the full connection mode. The latch circuit is characterized in that the latch circuit is switched to shift all of the captured print data n-1 times to supply m pieces of print data to the latch circuit.

[0013]

[Operation] According to the above configuration, the following printing control can be performed.

That is, when n times speed printing is set, first, every nth element register is connected in the skip connection mode, and in this state, print data consisting of m/n pieces is sequentially shifted. captured in the register. After this, all element registers are concatenated in a fully concatenated mode, and all the captured print data is shifted n-1 times. Here, by latching the outputs of the element registers each storing the data at the completion of the fetching and at each shift stage, the m print data supplemented with data are finally converted into m print data. It becomes possible to apply this to the printing element.

As described above, according to the present invention, the print data can be taken into the shift register with approximately the same number of clocks as the number of pieces of print data to be taken in, so that as a result, normal printing Printing that is n times faster than that is achieved. For example, when the number of printing elements and element registers is m=1024, and the number of input print data m/n=512 (n=2), approximately 2
Double speed printing is possible.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a print control circuit for a printer according to the present invention. In the figure, a heating element array 20
This is formed by arranging a plurality of heating elements 20a, which are printing elements, in an array.

Print data 108 for printing provided to this heating element array 20 is sequentially taken into a shift register 22.

Here, the shift register 22 is composed of, for example, 1024 element registers 22a, and between each element register 22a there is a register for switching between a full concatenation mode and a skip concatenation mode, which will be described later. A switch 24 is arranged. Note that the configuration and operation of this switch 24 will be described in detail later.

In this embodiment, each element register 22
A first clock 110 and second clock 112 are alternately supplied to each clock. These clocks 110,1
12 controls the operation of the element registers.

In the figure, the latch circuit 26 has the same number of latch elements 26 as the heating element 20a and the element register 22a.
It is composed of a. That is, each latch element 2
6a is supplied with the output signal of each element register 22a, and the output signal of each latch element 26a is supplied with the driver circuit .

In the latch circuit 26, each latch element 2
In this embodiment, the first latch signal 114 and the second latch signal 116 are alternately supplied to the signal 6a. That is, each latch element 26a latches the output signal of the element register 22a, which is the input signal, when the latch signal 114 or 116 is input.

The driver circuit 28 receives the output signal from the latch circuit 26 and supplies current to the heating element 20a in accordance with a predetermined enable signal 118, as in the conventional example. That is, when the enable signal 118 is "L", the signal output from the latch element 26a is output to the heating element 20a as a drive signal.

In FIG. 1, the above-mentioned switch 24 is supplied with a mode control signal 117, and the switch 24 performs its on/off operation according to the state of this mode control signal 117.

FIG. 2 shows the shift register 2 shown in FIG.
2 and switch 24 are specifically shown.

In this embodiment, the element register 22a is composed of a D-type flip-flop. Further, the switch 24 in this embodiment is composed of three switching elements 24a, 24b, and 24c. Switching element 2 provided before element register 22a
4a is for blocking input print data, while the switching element 24c provided at the subsequent stage is for blocking output print data. On the other hand, the bypass path 2 extends from the front stage of the switching element 24 to the rear stage of the switching element 24c.
00 is formed, and the bypass route 200 is
A switching element 24b is arranged. Here, bypass paths 200 are formed for every other element register 22a.

The mode control signal 117 is supplied to the three switching elements 24a, 24b, and 24c mentioned above. That is, the mode control signal 11
6 is "H", switching elements 24a and 2
4c is turned on, mode control signal 117
When is "L", only the switching element 24b is turned on. That is, when the mode control signal 117 is "H", all the element registers 22a are connected, while the mode control signal 117 is "L".
”, every other element register 22a will be electrically connected. Therefore, by varying the state of the mode control signal 117, the entire connection mode for the element register 22a and every other element register 22a will be electrically connected. You can switch between skip concatenation mode.

In FIG. 1, mode control signal 1
17, first and second clocks 110, 112, first and second latches 114, 116, and enable signal 118
is supplied from a controller (not shown). This controller switches between normal printing (high-resolution printing) and double-speed printing, which will be described later, and also controls each circuit.

The printer print control circuit of this embodiment has the above configuration, and its operation will be explained below.

FIG. 3 shows a timing chart of each signal in the high resolution mode, and FIG. 4 shows a timing chart of each signal in the double speed mode.

In FIG. 3, in the high resolution mode, the mode control signal 117 is fixed at "H" by a controller (not shown). At the same time, a first clock 110 and a second clock 112 having a period 2T whose phases differ from each other by half a cycle are output.

In such a state, as shown in FIG. 1, when the print data 108 is input to the shift register 22, each element register 22a starts receiving the data by inputting the first clock and the second clock. At the same time, the data is shifted, and as a result, a total of 1024 clocks are inputted as the first and second clocks.
Storage of all print data (1024 pieces) is completed. After this, the first latch signal 114 and the second latch signal 1
16 to the latch circuit 26 (step 100 in FIG. 3), all print data stored in the shift register 22 is latched and sent to the driver circuit 28.

On the other hand, in FIG. 4, in the double speed mode, the mode control signal 117 is first fixed at "L" by a controller (not shown). At the same time, the period of the first clock is fixed to T. When the print data 108 is input in this state, each print data is sequentially shifted through every other element register 22a, and in this embodiment, five
By inputting the 12 first clocks, 512 pieces of print data are stored in the odd-numbered element registers 22a counting from the left. This state is shown in step 101 in FIG.

After 512 pieces of print data have been stored, first in step 102, a first latch signal 114 is output. As a result, the odd-numbered latch elements 26a in the latch circuit 26 perform a latch operation. Next, the mode control signal 117 is fixed at "H" by the action of a controller (not shown). This results in
As mentioned above, switch 24 will open the bypass path. Then, as shown in step 104,
When the second clock 112 is applied, all the print data stored in the odd-numbered element registers 22a are simultaneously shifted to the element register 22a next to the right. Therefore, as shown in step 105, by applying the second latch signal 116 to the even-numbered latch elements 26a in the latch circuit 26, the print data stored in the even-numbered element registers 22a in the shift register 22 are changed to correspond to each other. The signal is latched by the latch element 26a and further sent to the driver 28.

Therefore, when step 105 is executed, all latch elements 26a constituting the latch circuit 26
The print data supplemented with data is output in parallel according to its contents.

Thereafter, according to enable signal 118,
The driver 28 operates, and as a result, the heating element 20a corresponding to the print data "H" generates heat, and printing is performed.

As described above, according to the print control circuit of this embodiment, when printing is performed at half the normal resolution,
In the shift register 22, print data consisting of one-half the normal size is skip-shifted and taken in, and then all the taken-in print data is transferred to one size.
Data can be replenished (interpolated) by shifting the data, so there is an advantage that printing can be executed in about half the time compared to the conventional example. In particular, this effect becomes greater as the number of heating elements 20a increases.

In this embodiment, in the high resolution mode, the phases of the first clock and the second clock are shifted by half a cycle, but this is not limited to this, and only one clock may be supplied to each element register 22a. It is also possible to configure such a configuration.

Generally, in current printers, the clock frequency is set within the operating limit frequency range of, for example, a shift register, in order to achieve high-speed printing as much as possible, but according to this embodiment, Although assuming such a limit frequency of the clock, it is possible to eliminate unnecessary clock operations and realize efficient printing.

In this embodiment, the print control circuits are shown for cases in which the number of print data is 1024 and 512, but the circuit is not limited to this, and circuits for other combinations may also be realized. It is. For example, when handling print data that is 1/n of normal print data, in the shift register 22, every nth element register 22a is connected, that is, by forming a bypass path, it is possible to It is possible to obtain the following effects. In such a case, of course, the number of clocks and the number of latch signals may be adjusted to n accordingly.

[0040]

[Effects of the Invention] As explained above, according to the present invention,
When printing at a resolution of 1/n, it is possible to print at approximately n times the speed, which makes it possible to eliminate unnecessary operations in the print control circuit and realize efficient print control. . Therefore, when printing at a resolution of 1/n, it is possible to improve the printing speed by about n times compared to the conventional method.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a print control circuit of a printer according to the present invention.

FIG. 2 is a block diagram showing a specific configuration of a shift register 22 and a switch 24. FIG.

FIG. 3 is a timing chart diagram showing each signal in high resolution mode.

FIG. 4 is a timing chart showing each signal in double speed mode.

FIG. 5 is a block diagram showing the configuration of a print control circuit of a conventional printer.

[Explanation of symbols]

20 Heating element array 20a Heating element 22 Shift register 24 Switch 26 Latch circuit 28 Driver circuit

Claims (1)

[Claims] 1. A shift register comprising m printing elements connected to m element registers corresponding to each printing element, which receives print data serially and outputs the print data in parallel. , a latch circuit for latching the output from each element register, which is composed of m latch elements corresponding to each of the printing elements, and is capable of performing normal printing and n times speed printing. a print setting means for switching settings, and a connection switching means for connecting all of the element registers in a predetermined all-connection mode, and connecting only every nth element register in a predetermined skip connection mode, If n times speed printing is set, after importing the print data into the shift register in the skip connection mode,
Switching to the all-connection mode, shifting all the captured print data n-1 times to the latch circuit m
What is claimed is: 1. A print control circuit for a printer, characterized in that it supplies print data of 1.